src/gallium/drivers/nv50/nv50_vbo.c

   1 /*
   2  * Copyright 2008 Ben Skeggs
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "pipe/p_context.h"
  24 #include "pipe/p_state.h"
  25 #include "pipe/p_inlines.h"
  26
  27 #include "util/u_format.h"
  28
  29 #include "nv50_context.h"
  30
  31 static boolean
  32 nv50_push_elements_u08(struct nv50_context *, uint8_t *, unsigned);
  33
  34 static boolean
  35 nv50_push_elements_u16(struct nv50_context *, uint16_t *, unsigned);
  36
  37 static boolean
  38 nv50_push_elements_u32(struct nv50_context *, uint32_t *, unsigned);
  39
  40 static boolean
  41 nv50_push_arrays(struct nv50_context *, unsigned, unsigned);
  42
  43 static INLINE unsigned
  44 nv50_prim(unsigned mode)
  45 {
  46         switch (mode) {
  47         case PIPE_PRIM_POINTS: return NV50TCL_VERTEX_BEGIN_POINTS;
  48         case PIPE_PRIM_LINES: return NV50TCL_VERTEX_BEGIN_LINES;
  49         case PIPE_PRIM_LINE_LOOP: return NV50TCL_VERTEX_BEGIN_LINE_LOOP;
  50         case PIPE_PRIM_LINE_STRIP: return NV50TCL_VERTEX_BEGIN_LINE_STRIP;
  51         case PIPE_PRIM_TRIANGLES: return NV50TCL_VERTEX_BEGIN_TRIANGLES;
  52         case PIPE_PRIM_TRIANGLE_STRIP:
  53                 return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP;
  54         case PIPE_PRIM_TRIANGLE_FAN: return NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN;
  55         case PIPE_PRIM_QUADS: return NV50TCL_VERTEX_BEGIN_QUADS;
  56         case PIPE_PRIM_QUAD_STRIP: return NV50TCL_VERTEX_BEGIN_QUAD_STRIP;
  57         case PIPE_PRIM_POLYGON: return NV50TCL_VERTEX_BEGIN_POLYGON;
  58         case PIPE_PRIM_LINES_ADJACENCY:
  59                 return NV50TCL_VERTEX_BEGIN_LINES_ADJACENCY;
  60         case PIPE_PRIM_LINE_STRIP_ADJACENCY:
  61                 return NV50TCL_VERTEX_BEGIN_LINE_STRIP_ADJACENCY;
  62         case PIPE_PRIM_TRIANGLES_ADJACENCY:
  63                 return NV50TCL_VERTEX_BEGIN_TRIANGLES_ADJACENCY;
  64         case PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY:
  65                 return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP_ADJACENCY;
  66         default:
  67                 break;
  68         }
  69
  70         NOUVEAU_ERR("invalid primitive type %d\n", mode);
  71         return NV50TCL_VERTEX_BEGIN_POINTS;
  72 }
  73
  74 static INLINE uint32_t
  75 nv50_vbo_type_to_hw(enum pipe_format format)
  76 {
  77         const struct util_format_description *desc;
  78
  79         desc = util_format_description(format);
  80         assert(desc);
  81
  82         switch (desc->channel[0].type) {
  83         case UTIL_FORMAT_TYPE_FLOAT:
  84                 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_FLOAT;
  85         case UTIL_FORMAT_TYPE_UNSIGNED:
  86                 if (desc->channel[0].normalized) {
  87                         return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UNORM;
  88                 }
  89                 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_USCALED;
  90         case UTIL_FORMAT_TYPE_SIGNED:
  91                 if (desc->channel[0].normalized) {
  92                         return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SNORM;
  93                 }
  94                 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SSCALED;
  95         /*
  96         case PIPE_FORMAT_TYPE_UINT:
  97                 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UINT;
  98         case PIPE_FORMAT_TYPE_SINT:
  99                 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SINT; */
 100         default:
 101                 return 0;
 102         }
 103 }
 104
 105 static INLINE uint32_t
 106 nv50_vbo_size_to_hw(unsigned size, unsigned nr_c)
 107 {
 108         static const uint32_t hw_values[] = {
 109                 0, 0, 0, 0,
 110                 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8,
 111                 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8,
 112                 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8_8,
 113                 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8_8_8,
 114                 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16,
 115                 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16,
 116                 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16_16,
 117                 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16_16_16,
 118                 0, 0, 0, 0,
 119                 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32,
 120                 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32,
 121                 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32_32,
 122                 NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32_32_32 };
 123
 124         /* we'd also have R11G11B10 and R10G10B10A2 */
 125
 126         assert(nr_c > 0 && nr_c <= 4);
 127
 128         if (size > 32)
 129                 return 0;
 130         size >>= (3 - 2);
 131
 132         return hw_values[size + (nr_c - 1)];
 133 }
 134
 135 static INLINE uint32_t
 136 nv50_vbo_vtxelt_to_hw(struct pipe_vertex_element *ve)
 137 {
 138         uint32_t hw_type, hw_size;
 139         enum pipe_format pf = ve->src_format;
 140         const struct util_format_description *desc;
 141         unsigned size;
 142
 143         desc = util_format_description(pf);
 144         assert(desc);
 145
 146         size = util_format_get_component_bits(pf, UTIL_FORMAT_COLORSPACE_RGB, 0);
 147
 148         hw_type = nv50_vbo_type_to_hw(pf);
 149         hw_size = nv50_vbo_size_to_hw(size, ve->nr_components);
 150
 151         if (!hw_type || !hw_size) {
 152                 NOUVEAU_ERR("unsupported vbo format: %s\n", pf_name(pf));
 153                 abort();
 154                 return 0x24e80000;
 155         }
 156
 157         if (desc->swizzle[0] == UTIL_FORMAT_SWIZZLE_Z) /* BGRA */
 158                 hw_size |= (1 << 31); /* no real swizzle bits :-( */
 159
 160         return (hw_type | hw_size);
 161 }
 162
 163 void
 164 nv50_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start,
 165                  unsigned count)
 166 {
 167         struct nv50_context *nv50 = nv50_context(pipe);
 168         struct nouveau_channel *chan = nv50->screen->tesla->channel;
 169         struct nouveau_grobj *tesla = nv50->screen->tesla;
 170         boolean ret;
 171
 172         nv50_state_validate(nv50);
 173
 174         BEGIN_RING(chan, tesla, 0x142c, 1);
 175         OUT_RING  (chan, 0);
 176         BEGIN_RING(chan, tesla, 0x142c, 1);
 177         OUT_RING  (chan, 0);
 178
 179         BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
 180         OUT_RING  (chan, nv50_prim(mode));
 181
 182         if (nv50->vbo_fifo)
 183                 ret = nv50_push_arrays(nv50, start, count);
 184         else {
 185                 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BUFFER_FIRST, 2);
 186                 OUT_RING  (chan, start);
 187                 OUT_RING  (chan, count);
 188                 ret = TRUE;
 189         }
 190         BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
 191         OUT_RING  (chan, 0);
 192
 193         /* XXX: not sure what to do if ret != TRUE: flush and retry?
 194          */
 195         assert(ret);
 196 }
 197
 198 static INLINE boolean
 199 nv50_draw_elements_inline_u08(struct nv50_context *nv50, uint8_t *map,
 200                               unsigned start, unsigned count)
 201 {
 202         struct nouveau_channel *chan = nv50->screen->tesla->channel;
 203         struct nouveau_grobj *tesla = nv50->screen->tesla;
 204
 205         map += start;
 206
 207         if (nv50->vbo_fifo)
 208                 return nv50_push_elements_u08(nv50, map, count);
 209
 210         if (count & 1) {
 211                 BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U32, 1);
 212                 OUT_RING  (chan, map[0]);
 213                 map++;
 214                 count--;
 215         }
 216
 217         while (count) {
 218                 unsigned nr = count > 2046 ? 2046 : count;
 219                 int i;
 220
 221                 BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U16 | 0x40000000, nr >> 1);
 222                 for (i = 0; i < nr; i += 2)
 223                         OUT_RING  (chan, (map[i + 1] << 16) | map[i]);
 224
 225                 count -= nr;
 226                 map += nr;
 227         }
 228         return TRUE;
 229 }
 230
 231 static INLINE boolean
 232 nv50_draw_elements_inline_u16(struct nv50_context *nv50, uint16_t *map,
 233                               unsigned start, unsigned count)
 234 {
 235         struct nouveau_channel *chan = nv50->screen->tesla->channel;
 236         struct nouveau_grobj *tesla = nv50->screen->tesla;
 237
 238         map += start;
 239
 240         if (nv50->vbo_fifo)
 241                 return nv50_push_elements_u16(nv50, map, count);
 242
 243         if (count & 1) {
 244                 BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U32, 1);
 245                 OUT_RING  (chan, map[0]);
 246                 map++;
 247                 count--;
 248         }
 249
 250         while (count) {
 251                 unsigned nr = count > 2046 ? 2046 : count;
 252                 int i;
 253
 254                 BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U16 | 0x40000000, nr >> 1);
 255                 for (i = 0; i < nr; i += 2)
 256                         OUT_RING  (chan, (map[i + 1] << 16) | map[i]);
 257
 258                 count -= nr;
 259                 map += nr;
 260         }
 261         return TRUE;
 262 }
 263
 264 static INLINE boolean
 265 nv50_draw_elements_inline_u32(struct nv50_context *nv50, uint32_t *map,
 266                               unsigned start, unsigned count)
 267 {
 268         struct nouveau_channel *chan = nv50->screen->tesla->channel;
 269         struct nouveau_grobj *tesla = nv50->screen->tesla;
 270
 271         map += start;
 272
 273         if (nv50->vbo_fifo)
 274                 return nv50_push_elements_u32(nv50, map, count);
 275
 276         while (count) {
 277                 unsigned nr = count > 2047 ? 2047 : count;
 278
 279                 BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U32 | 0x40000000, nr);
 280                 OUT_RINGp (chan, map, nr);
 281
 282                 count -= nr;
 283                 map += nr;
 284         }
 285         return TRUE;
 286 }
 287
 288 void
 289 nv50_draw_elements(struct pipe_context *pipe,
 290                    struct pipe_buffer *indexBuffer, unsigned indexSize,
 291                    unsigned mode, unsigned start, unsigned count)
 292 {
 293         struct nv50_context *nv50 = nv50_context(pipe);
 294         struct nouveau_channel *chan = nv50->screen->tesla->channel;
 295         struct nouveau_grobj *tesla = nv50->screen->tesla;
 296         struct pipe_screen *pscreen = pipe->screen;
 297         void *map;
 298         boolean ret;
 299
 300         map = pipe_buffer_map(pscreen, indexBuffer, PIPE_BUFFER_USAGE_CPU_READ);
 301
 302         nv50_state_validate(nv50);
 303
 304         BEGIN_RING(chan, tesla, 0x142c, 1);
 305         OUT_RING  (chan, 0);
 306         BEGIN_RING(chan, tesla, 0x142c, 1);
 307         OUT_RING  (chan, 0);
 308
 309         BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
 310         OUT_RING  (chan, nv50_prim(mode));
 311         switch (indexSize) {
 312         case 1:
 313                 ret = nv50_draw_elements_inline_u08(nv50, map, start, count);
 314                 break;
 315         case 2:
 316                 ret = nv50_draw_elements_inline_u16(nv50, map, start, count);
 317                 break;
 318         case 4:
 319                 ret = nv50_draw_elements_inline_u32(nv50, map, start, count);
 320                 break;
 321         default:
 322                 assert(0);
 323                 ret = FALSE;
 324                 break;
 325         }
 326         BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
 327         OUT_RING  (chan, 0);
 328
 329         pipe_buffer_unmap(pscreen, indexBuffer);
 330
 331         /* XXX: what to do if ret != TRUE?  Flush and retry?
 332          */
 333         assert(ret);
 334 }
 335
 336 static INLINE boolean
 337 nv50_vbo_static_attrib(struct nv50_context *nv50, unsigned attrib,
 338                        struct nouveau_stateobj **pso,
 339                        struct pipe_vertex_element *ve,
 340                        struct pipe_vertex_buffer *vb)
 341
 342 {
 343         struct nouveau_stateobj *so;
 344         struct nouveau_grobj *tesla = nv50->screen->tesla;
 345         struct nouveau_bo *bo = nouveau_bo(vb->buffer);
 346         float *v;
 347         int ret;
 348         enum pipe_format pf = ve->src_format;
 349         const struct util_format_description *desc;
 350
 351         desc = util_format_description(pf);
 352         assert(desc);
 353
 354         if ((desc->channel[0].type != UTIL_FORMAT_TYPE_FLOAT) ||
 355             util_format_get_component_bits(pf, UTIL_FORMAT_COLORSPACE_RGB, 0) != 32)
 356                 return FALSE;
 357
 358         ret = nouveau_bo_map(bo, NOUVEAU_BO_RD);
 359         if (ret)
 360                 return FALSE;
 361         v = (float *)(bo->map + (vb->buffer_offset + ve->src_offset));
 362
 363         so = *pso;
 364         if (!so)
 365                 *pso = so = so_new(nv50->vtxelt_nr, nv50->vtxelt_nr * 4, 0);
 366
 367         switch (ve->nr_components) {
 368         case 4:
 369                 so_method(so, tesla, NV50TCL_VTX_ATTR_4F_X(attrib), 4);
 370                 so_data  (so, fui(v[0]));
 371                 so_data  (so, fui(v[1]));
 372                 so_data  (so, fui(v[2]));
 373                 so_data  (so, fui(v[3]));
 374                 break;
 375         case 3:
 376                 so_method(so, tesla, NV50TCL_VTX_ATTR_3F_X(attrib), 3);
 377                 so_data  (so, fui(v[0]));
 378                 so_data  (so, fui(v[1]));
 379                 so_data  (so, fui(v[2]));
 380                 break;
 381         case 2:
 382                 so_method(so, tesla, NV50TCL_VTX_ATTR_2F_X(attrib), 2);
 383                 so_data  (so, fui(v[0]));
 384                 so_data  (so, fui(v[1]));
 385                 break;
 386         case 1:
 387                 if (attrib == nv50->vertprog->cfg.edgeflag_in) {
 388                         so_method(so, tesla, NV50TCL_EDGEFLAG_ENABLE, 1);
 389                         so_data  (so, v[0] ? 1 : 0);
 390                 }
 391                 so_method(so, tesla, NV50TCL_VTX_ATTR_1F(attrib), 1);
 392                 so_data  (so, fui(v[0]));
 393                 break;
 394         default:
 395                 nouveau_bo_unmap(bo);
 396                 return FALSE;
 397         }
 398
 399         nouveau_bo_unmap(bo);
 400         return TRUE;
 401 }
 402
 403 void
 404 nv50_vbo_validate(struct nv50_context *nv50)
 405 {
 406         struct nouveau_grobj *tesla = nv50->screen->tesla;
 407         struct nouveau_stateobj *vtxbuf, *vtxfmt, *vtxattr;
 408         unsigned i, n_ve;
 409
 410         /* don't validate if Gallium took away our buffers */
 411         if (nv50->vtxbuf_nr == 0)
 412                 return;
 413         nv50->vbo_fifo = 0;
 414
 415         for (i = 0; i < nv50->vtxbuf_nr; ++i)
 416                 if (nv50->vtxbuf[i].stride &&
 417                     !(nv50->vtxbuf[i].buffer->usage & PIPE_BUFFER_USAGE_VERTEX))
 418                         nv50->vbo_fifo = 0xffff;
 419
 420         if (nv50->vertprog->cfg.edgeflag_in < 16)
 421                 nv50->vbo_fifo = 0xffff; /* vertprog can't set edgeflag */
 422
 423         n_ve = MAX2(nv50->vtxelt_nr, nv50->state.vtxelt_nr);
 424
 425         vtxattr = NULL;
 426         vtxbuf = so_new(n_ve * 2, n_ve * 5, nv50->vtxelt_nr * 4);
 427         vtxfmt = so_new(1, n_ve, 0);
 428         so_method(vtxfmt, tesla, NV50TCL_VERTEX_ARRAY_ATTRIB(0), n_ve);
 429
 430         for (i = 0; i < nv50->vtxelt_nr; i++) {
 431                 struct pipe_vertex_element *ve = &nv50->vtxelt[i];
 432                 struct pipe_vertex_buffer *vb =
 433                         &nv50->vtxbuf[ve->vertex_buffer_index];
 434                 struct nouveau_bo *bo = nouveau_bo(vb->buffer);
 435                 uint32_t hw = nv50_vbo_vtxelt_to_hw(ve);
 436
 437                 if (!vb->stride &&
 438                     nv50_vbo_static_attrib(nv50, i, &vtxattr, ve, vb)) {
 439                         so_data(vtxfmt, hw | (1 << 4));
 440
 441                         so_method(vtxbuf, tesla,
 442                                   NV50TCL_VERTEX_ARRAY_FORMAT(i), 1);
 443                         so_data  (vtxbuf, 0);
 444
 445                         nv50->vbo_fifo &= ~(1 << i);
 446                         continue;
 447                 }
 448                 so_data(vtxfmt, hw | i);
 449
 450                 if (nv50->vbo_fifo) {
 451                         so_method(vtxbuf, tesla,
 452                                   NV50TCL_VERTEX_ARRAY_FORMAT(i), 1);
 453                         so_data  (vtxbuf, 0);
 454                         continue;
 455                 }
 456
 457                 so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 3);
 458                 so_data  (vtxbuf, 0x20000000 | vb->stride);
 459                 so_reloc (vtxbuf, bo, vb->buffer_offset +
 460                           ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
 461                           NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 462                 so_reloc (vtxbuf, bo, vb->buffer_offset +
 463                           ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
 464                           NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 465
 466                 /* vertex array limits */
 467                 so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_LIMIT_HIGH(i), 2);
 468                 so_reloc (vtxbuf, bo, vb->buffer->size - 1,
 469                           NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD |
 470                           NOUVEAU_BO_HIGH, 0, 0);
 471                 so_reloc (vtxbuf, bo, vb->buffer->size - 1,
 472                           NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD |
 473                           NOUVEAU_BO_LOW, 0, 0);
 474         }
 475         for (; i < n_ve; ++i) {
 476                 so_data  (vtxfmt, 0x7e080010);
 477
 478                 so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 1);
 479                 so_data  (vtxbuf, 0);
 480         }
 481         nv50->state.vtxelt_nr = nv50->vtxelt_nr;
 482
 483         so_ref (vtxfmt, &nv50->state.vtxfmt);
 484         so_ref (vtxbuf, &nv50->state.vtxbuf);
 485         so_ref (vtxattr, &nv50->state.vtxattr);
 486         so_ref (NULL, &vtxbuf);
 487         so_ref (NULL, &vtxfmt);
 488         so_ref (NULL, &vtxattr);
 489 }
 490
 491 typedef void (*pfn_push)(struct nouveau_channel *, void *);
 492
 493 struct nv50_vbo_emitctx
 494 {
 495         pfn_push push[16];
 496         void *map[16];
 497         unsigned stride[16];
 498         unsigned nr_ve;
 499         unsigned vtx_dwords;
 500         unsigned vtx_max;
 501
 502         float edgeflag;
 503         unsigned ve_edgeflag;
 504 };
 505
 506 static INLINE void
 507 emit_vtx_next(struct nouveau_channel *chan, struct nv50_vbo_emitctx *emit)
 508 {
 509         unsigned i;
 510
 511         for (i = 0; i < emit->nr_ve; ++i) {
 512                 emit->push[i](chan, emit->map[i]);
 513                 emit->map[i] += emit->stride[i];
 514         }
 515 }
 516
 517 static INLINE void
 518 emit_vtx(struct nouveau_channel *chan, struct nv50_vbo_emitctx *emit,
 519          uint32_t vi)
 520 {
 521         unsigned i;
 522
 523         for (i = 0; i < emit->nr_ve; ++i)
 524                 emit->push[i](chan, emit->map[i] + emit->stride[i] * vi);
 525 }
 526
 527 static INLINE boolean
 528 nv50_map_vbufs(struct nv50_context *nv50)
 529 {
 530         int i;
 531
 532         for (i = 0; i < nv50->vtxbuf_nr; ++i) {
 533                 struct pipe_vertex_buffer *vb = &nv50->vtxbuf[i];
 534                 unsigned size, delta;
 535
 536                 if (nouveau_bo(vb->buffer)->map)
 537                         continue;
 538
 539                 size = vb->stride * (vb->max_index + 1);
 540                 delta = vb->buffer_offset;
 541
 542                 if (!size)
 543                         size = vb->buffer->size - vb->buffer_offset;
 544
 545                 if (nouveau_bo_map_range(nouveau_bo(vb->buffer),
 546                                          delta, size, NOUVEAU_BO_RD))
 547                         break;
 548         }
 549
 550         if (i == nv50->vtxbuf_nr)
 551                 return TRUE;
 552         for (; i >= 0; --i)
 553                 nouveau_bo_unmap(nouveau_bo(nv50->vtxbuf[i].buffer));
 554         return FALSE;
 555 }
 556
 557 static INLINE void
 558 nv50_unmap_vbufs(struct nv50_context *nv50)
 559 {
 560         unsigned i;
 561
 562         for (i = 0; i < nv50->vtxbuf_nr; ++i)
 563                 if (nouveau_bo(nv50->vtxbuf[i].buffer)->map)
 564                         nouveau_bo_unmap(nouveau_bo(nv50->vtxbuf[i].buffer));
 565 }
 566
 567 static void
 568 emit_b32_1(struct nouveau_channel *chan, void *data)
 569 {
 570         uint32_t *v = data;
 571
 572         OUT_RING(chan, v[0]);
 573 }
 574
 575 static void
 576 emit_b32_2(struct nouveau_channel *chan, void *data)
 577 {
 578         uint32_t *v = data;
 579
 580         OUT_RING(chan, v[0]);
 581         OUT_RING(chan, v[1]);
 582 }
 583
 584 static void
 585 emit_b32_3(struct nouveau_channel *chan, void *data)
 586 {
 587         uint32_t *v = data;
 588
 589         OUT_RING(chan, v[0]);
 590         OUT_RING(chan, v[1]);
 591         OUT_RING(chan, v[2]);
 592 }
 593
 594 static void
 595 emit_b32_4(struct nouveau_channel *chan, void *data)
 596 {
 597         uint32_t *v = data;
 598
 599         OUT_RING(chan, v[0]);
 600         OUT_RING(chan, v[1]);
 601         OUT_RING(chan, v[2]);
 602         OUT_RING(chan, v[3]);
 603 }
 604
 605 static void
 606 emit_b16_1(struct nouveau_channel *chan, void *data)
 607 {
 608         uint16_t *v = data;
 609
 610         OUT_RING(chan, v[0]);
 611 }
 612
 613 static void
 614 emit_b16_3(struct nouveau_channel *chan, void *data)
 615 {
 616         uint16_t *v = data;
 617
 618         OUT_RING(chan, (v[1] << 16) | v[0]);
 619         OUT_RING(chan, v[2]);
 620 }
 621
 622 static void
 623 emit_b08_1(struct nouveau_channel *chan, void *data)
 624 {
 625         uint8_t *v = data;
 626
 627         OUT_RING(chan, v[0]);
 628 }
 629
 630 static void
 631 emit_b08_3(struct nouveau_channel *chan, void *data)
 632 {
 633         uint8_t *v = data;
 634
 635         OUT_RING(chan, (v[2] << 16) | (v[1] << 8) | v[0]);
 636 }
 637
 638 static boolean
 639 emit_prepare(struct nv50_context *nv50, struct nv50_vbo_emitctx *emit,
 640              unsigned start)
 641 {
 642         unsigned i;
 643
 644         if (nv50_map_vbufs(nv50) == FALSE)
 645                 return FALSE;
 646
 647         emit->ve_edgeflag = nv50->vertprog->cfg.edgeflag_in;
 648
 649         emit->edgeflag = 0.5f;
 650         emit->nr_ve = 0;
 651         emit->vtx_dwords = 0;
 652
 653         for (i = 0; i < nv50->vtxelt_nr; ++i) {
 654                 struct pipe_vertex_element *ve;
 655                 struct pipe_vertex_buffer *vb;
 656                 unsigned n, size;
 657                 const struct util_format_description *desc;
 658
 659                 ve = &nv50->vtxelt[i];
 660                 vb = &nv50->vtxbuf[ve->vertex_buffer_index];
 661                 if (!(nv50->vbo_fifo & (1 << i)))
 662                         continue;
 663                 n = emit->nr_ve++;
 664
 665                 emit->stride[n] = vb->stride;
 666                 emit->map[n] = nouveau_bo(vb->buffer)->map +
 667                         (start * vb->stride + ve->src_offset);
 668
 669                 desc = util_format_description(ve->src_format);
 670                 assert(desc);
 671
 672                 size = util_format_get_component_bits(
 673                         ve->src_format, UTIL_FORMAT_COLORSPACE_RGB, 0);
 674
 675                 assert(ve->nr_components > 0 && ve->nr_components <= 4);
 676
 677                 /* It shouldn't be necessary to push the implicit 1s
 678                  * for case 3 and size 8 cases 1, 2, 3.
 679                  */
 680                 switch (size) {
 681                 default:
 682                         NOUVEAU_ERR("unsupported vtxelt size: %u\n", size);
 683                         return FALSE;
 684                 case 32:
 685                         switch (ve->nr_components) {
 686                         case 1: emit->push[n] = emit_b32_1; break;
 687                         case 2: emit->push[n] = emit_b32_2; break;
 688                         case 3: emit->push[n] = emit_b32_3; break;
 689                         case 4: emit->push[n] = emit_b32_4; break;
 690                         }
 691                         emit->vtx_dwords += ve->nr_components;
 692                         break;
 693                 case 16:
 694                         switch (ve->nr_components) {
 695                         case 1: emit->push[n] = emit_b16_1; break;
 696                         case 2: emit->push[n] = emit_b32_1; break;
 697                         case 3: emit->push[n] = emit_b16_3; break;
 698                         case 4: emit->push[n] = emit_b32_2; break;
 699                         }
 700                         emit->vtx_dwords += (ve->nr_components + 1) >> 1;
 701                         break;
 702                 case 8:
 703                         switch (ve->nr_components) {
 704                         case 1: emit->push[n] = emit_b08_1; break;
 705                         case 2: emit->push[n] = emit_b16_1; break;
 706                         case 3: emit->push[n] = emit_b08_3; break;
 707                         case 4: emit->push[n] = emit_b32_1; break;
 708                         }
 709                         emit->vtx_dwords += 1;
 710                         break;
 711                 }
 712         }
 713
 714         emit->vtx_max = 512 / emit->vtx_dwords;
 715         if (emit->ve_edgeflag < 16)
 716                 emit->vtx_max = 1;
 717
 718         return TRUE;
 719 }
 720
 721 static INLINE void
 722 set_edgeflag(struct nouveau_channel *chan,
 723              struct nouveau_grobj *tesla,
 724              struct nv50_vbo_emitctx *emit, uint32_t index)
 725 {
 726         unsigned i = emit->ve_edgeflag;
 727
 728         if (i < 16) {
 729                 float f = *((float *)(emit->map[i] + index * emit->stride[i]));
 730
 731                 if (emit->edgeflag != f) {
 732                         emit->edgeflag = f;
 733
 734                         BEGIN_RING(chan, tesla, 0x15e4, 1);
 735                         OUT_RING  (chan, f ? 1 : 0);
 736                 }
 737         }
 738 }
 739
 740 static boolean
 741 nv50_push_arrays(struct nv50_context *nv50, unsigned start, unsigned count)
 742 {
 743         struct nouveau_channel *chan = nv50->screen->base.channel;
 744         struct nouveau_grobj *tesla = nv50->screen->tesla;
 745         struct nv50_vbo_emitctx emit;
 746
 747         if (emit_prepare(nv50, &emit, start) == FALSE)
 748                 return FALSE;
 749
 750         while (count) {
 751                 unsigned i, dw, nr = MIN2(count, emit.vtx_max);
 752                 dw = nr * emit.vtx_dwords;
 753
 754                 set_edgeflag(chan, tesla, &emit, 0); /* nr will be 1 */
 755
 756                 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_DATA | 0x40000000, dw);
 757                 for (i = 0; i < nr; ++i)
 758                         emit_vtx_next(chan, &emit);
 759
 760                 count -= nr;
 761         }
 762         nv50_unmap_vbufs(nv50);
 763
 764         return TRUE;
 765 }
 766
 767 static boolean
 768 nv50_push_elements_u32(struct nv50_context *nv50, uint32_t *map, unsigned count)
 769 {
 770         struct nouveau_channel *chan = nv50->screen->base.channel;
 771         struct nouveau_grobj *tesla = nv50->screen->tesla;
 772         struct nv50_vbo_emitctx emit;
 773
 774         if (emit_prepare(nv50, &emit, 0) == FALSE)
 775                 return FALSE;
 776
 777         while (count) {
 778                 unsigned i, dw, nr = MIN2(count, emit.vtx_max);
 779                 dw = nr * emit.vtx_dwords;
 780
 781                 set_edgeflag(chan, tesla, &emit, *map);
 782
 783                 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_DATA | 0x40000000, dw);
 784                 for (i = 0; i < nr; ++i)
 785                         emit_vtx(chan, &emit, *map++);
 786
 787                 count -= nr;
 788         }
 789         nv50_unmap_vbufs(nv50);
 790
 791         return TRUE;
 792 }
 793
 794 static boolean
 795 nv50_push_elements_u16(struct nv50_context *nv50, uint16_t *map, unsigned count)
 796 {
 797         struct nouveau_channel *chan = nv50->screen->base.channel;
 798         struct nouveau_grobj *tesla = nv50->screen->tesla;
 799         struct nv50_vbo_emitctx emit;
 800
 801         if (emit_prepare(nv50, &emit, 0) == FALSE)
 802                 return FALSE;
 803
 804         while (count) {
 805                 unsigned i, dw, nr = MIN2(count, emit.vtx_max);
 806                 dw = nr * emit.vtx_dwords;
 807
 808                 set_edgeflag(chan, tesla, &emit, *map);
 809
 810                 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_DATA | 0x40000000, dw);
 811                 for (i = 0; i < nr; ++i)
 812                         emit_vtx(chan, &emit, *map++);
 813
 814                 count -= nr;
 815         }
 816         nv50_unmap_vbufs(nv50);
 817
 818         return TRUE;
 819 }
 820
 821 static boolean
 822 nv50_push_elements_u08(struct nv50_context *nv50, uint8_t *map, unsigned count)
 823 {
 824         struct nouveau_channel *chan = nv50->screen->base.channel;
 825         struct nouveau_grobj *tesla = nv50->screen->tesla;
 826         struct nv50_vbo_emitctx emit;
 827
 828         if (emit_prepare(nv50, &emit, 0) == FALSE)
 829                 return FALSE;
 830
 831         while (count) {
 832                 unsigned i, dw, nr = MIN2(count, emit.vtx_max);
 833                 dw = nr * emit.vtx_dwords;
 834
 835                 set_edgeflag(chan, tesla, &emit, *map);
 836
 837                 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_DATA | 0x40000000, dw);
 838                 for (i = 0; i < nr; ++i)
 839                         emit_vtx(chan, &emit, *map++);
 840
 841                 count -= nr;
 842         }
 843         nv50_unmap_vbufs(nv50);
 844
 845         return TRUE;
 846 }