Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
[mesa.git] / src / gallium / drivers / nv50 / nv50_vbo.c
1 /*
2 * Copyright 2008 Ben Skeggs
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include "pipe/p_context.h"
24 #include "pipe/p_state.h"
25 #include "pipe/p_inlines.h"
26
27 #include "nv50_context.h"
28
29 static INLINE unsigned
30 nv50_prim(unsigned mode)
31 {
32 switch (mode) {
33 case PIPE_PRIM_POINTS: return NV50TCL_VERTEX_BEGIN_POINTS;
34 case PIPE_PRIM_LINES: return NV50TCL_VERTEX_BEGIN_LINES;
35 case PIPE_PRIM_LINE_LOOP: return NV50TCL_VERTEX_BEGIN_LINE_LOOP;
36 case PIPE_PRIM_LINE_STRIP: return NV50TCL_VERTEX_BEGIN_LINE_STRIP;
37 case PIPE_PRIM_TRIANGLES: return NV50TCL_VERTEX_BEGIN_TRIANGLES;
38 case PIPE_PRIM_TRIANGLE_STRIP:
39 return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP;
40 case PIPE_PRIM_TRIANGLE_FAN: return NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN;
41 case PIPE_PRIM_QUADS: return NV50TCL_VERTEX_BEGIN_QUADS;
42 case PIPE_PRIM_QUAD_STRIP: return NV50TCL_VERTEX_BEGIN_QUAD_STRIP;
43 case PIPE_PRIM_POLYGON: return NV50TCL_VERTEX_BEGIN_POLYGON;
44 default:
45 break;
46 }
47
48 NOUVEAU_ERR("invalid primitive type %d\n", mode);
49 return NV50TCL_VERTEX_BEGIN_POINTS;
50 }
51
52 static INLINE uint32_t
53 nv50_vbo_type_to_hw(unsigned type)
54 {
55 switch (type) {
56 case PIPE_FORMAT_TYPE_FLOAT:
57 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_FLOAT;
58 case PIPE_FORMAT_TYPE_UNORM:
59 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UNORM;
60 case PIPE_FORMAT_TYPE_SNORM:
61 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SNORM;
62 case PIPE_FORMAT_TYPE_USCALED:
63 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_USCALED;
64 case PIPE_FORMAT_TYPE_SSCALED:
65 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SSCALED;
66 /*
67 case PIPE_FORMAT_TYPE_UINT:
68 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UINT;
69 case PIPE_FORMAT_TYPE_SINT:
70 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SINT; */
71 default:
72 return 0;
73 }
74 }
75
76 static INLINE uint32_t
77 nv50_vbo_size_to_hw(unsigned size, unsigned nr_c)
78 {
79 static const uint32_t hw_values[] = {
80 0, 0, 0, 0,
81 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8,
82 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8_8,
83 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8_8_8,
84 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8_8_8_8,
85 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16,
86 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16_16,
87 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16_16_16,
88 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16_16_16_16,
89 0, 0, 0, 0,
90 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32,
91 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32_32,
92 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32_32_32,
93 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32_32_32_32 };
94
95 /* we'd also have R11G11B10 and R10G10B10A2 */
96
97 assert(nr_c > 0 && nr_c <= 4);
98
99 if (size > 32)
100 return 0;
101 size >>= (3 - 2);
102
103 return hw_values[size + (nr_c - 1)];
104 }
105
106 static INLINE uint32_t
107 nv50_vbo_vtxelt_to_hw(struct pipe_vertex_element *ve)
108 {
109 uint32_t hw_type, hw_size;
110 enum pipe_format pf = ve->src_format;
111 unsigned size = pf_size_x(pf) << pf_exp2(pf);
112
113 hw_type = nv50_vbo_type_to_hw(pf_type(pf));
114 hw_size = nv50_vbo_size_to_hw(size, ve->nr_components);
115
116 if (!hw_type || !hw_size) {
117 NOUVEAU_ERR("unsupported vbo format: %s\n", pf_name(pf));
118 abort();
119 return 0x24e80000;
120 }
121
122 if (pf_swizzle_x(pf) == 2) /* BGRA */
123 hw_size |= (1 << 31); /* no real swizzle bits :-( */
124
125 return (hw_type | hw_size);
126 }
127
128 boolean
129 nv50_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start,
130 unsigned count)
131 {
132 struct nv50_context *nv50 = nv50_context(pipe);
133 struct nouveau_channel *chan = nv50->screen->tesla->channel;
134 struct nouveau_grobj *tesla = nv50->screen->tesla;
135
136 nv50_state_validate(nv50);
137
138 BEGIN_RING(chan, tesla, 0x142c, 1);
139 OUT_RING (chan, 0);
140 BEGIN_RING(chan, tesla, 0x142c, 1);
141 OUT_RING (chan, 0);
142 BEGIN_RING(chan, tesla, 0x1440, 1);
143 OUT_RING (chan, 0);
144 BEGIN_RING(chan, tesla, 0x1334, 1);
145 OUT_RING (chan, 0);
146
147 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
148 OUT_RING (chan, nv50_prim(mode));
149 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BUFFER_FIRST, 2);
150 OUT_RING (chan, start);
151 OUT_RING (chan, count);
152 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
153 OUT_RING (chan, 0);
154
155 pipe->flush(pipe, 0, NULL);
156 return TRUE;
157 }
158
159 static INLINE void
160 nv50_draw_elements_inline_u08(struct nv50_context *nv50, uint8_t *map,
161 unsigned start, unsigned count)
162 {
163 struct nouveau_channel *chan = nv50->screen->tesla->channel;
164 struct nouveau_grobj *tesla = nv50->screen->tesla;
165
166 map += start;
167
168 if (count & 1) {
169 BEGIN_RING(chan, tesla, 0x15e8, 1);
170 OUT_RING (chan, map[0]);
171 map++;
172 count--;
173 }
174
175 while (count) {
176 unsigned nr = count > 2046 ? 2046 : count;
177 int i;
178
179 BEGIN_RING(chan, tesla, 0x400015f0, nr >> 1);
180 for (i = 0; i < nr; i += 2)
181 OUT_RING (chan, (map[i + 1] << 16) | map[i]);
182
183 count -= nr;
184 map += nr;
185 }
186 }
187
188 static INLINE void
189 nv50_draw_elements_inline_u16(struct nv50_context *nv50, uint16_t *map,
190 unsigned start, unsigned count)
191 {
192 struct nouveau_channel *chan = nv50->screen->tesla->channel;
193 struct nouveau_grobj *tesla = nv50->screen->tesla;
194
195 map += start;
196
197 if (count & 1) {
198 BEGIN_RING(chan, tesla, 0x15e8, 1);
199 OUT_RING (chan, map[0]);
200 map++;
201 count--;
202 }
203
204 while (count) {
205 unsigned nr = count > 2046 ? 2046 : count;
206 int i;
207
208 BEGIN_RING(chan, tesla, 0x400015f0, nr >> 1);
209 for (i = 0; i < nr; i += 2)
210 OUT_RING (chan, (map[i + 1] << 16) | map[i]);
211
212 count -= nr;
213 map += nr;
214 }
215 }
216
217 static INLINE void
218 nv50_draw_elements_inline_u32(struct nv50_context *nv50, uint32_t *map,
219 unsigned start, unsigned count)
220 {
221 struct nouveau_channel *chan = nv50->screen->tesla->channel;
222 struct nouveau_grobj *tesla = nv50->screen->tesla;
223
224 map += start;
225
226 while (count) {
227 unsigned nr = count > 2047 ? 2047 : count;
228
229 BEGIN_RING(chan, tesla, 0x400015e8, nr);
230 OUT_RINGp (chan, map, nr);
231
232 count -= nr;
233 map += nr;
234 }
235 }
236
237 boolean
238 nv50_draw_elements(struct pipe_context *pipe,
239 struct pipe_buffer *indexBuffer, unsigned indexSize,
240 unsigned mode, unsigned start, unsigned count)
241 {
242 struct nv50_context *nv50 = nv50_context(pipe);
243 struct nouveau_channel *chan = nv50->screen->tesla->channel;
244 struct nouveau_grobj *tesla = nv50->screen->tesla;
245 struct pipe_screen *pscreen = pipe->screen;
246 void *map;
247
248 map = pipe_buffer_map(pscreen, indexBuffer, PIPE_BUFFER_USAGE_CPU_READ);
249
250 nv50_state_validate(nv50);
251
252 BEGIN_RING(chan, tesla, 0x142c, 1);
253 OUT_RING (chan, 0);
254 BEGIN_RING(chan, tesla, 0x142c, 1);
255 OUT_RING (chan, 0);
256
257 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
258 OUT_RING (chan, nv50_prim(mode));
259 switch (indexSize) {
260 case 1:
261 nv50_draw_elements_inline_u08(nv50, map, start, count);
262 break;
263 case 2:
264 nv50_draw_elements_inline_u16(nv50, map, start, count);
265 break;
266 case 4:
267 nv50_draw_elements_inline_u32(nv50, map, start, count);
268 break;
269 default:
270 assert(0);
271 }
272 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1);
273 OUT_RING (chan, 0);
274
275 pipe_buffer_unmap(pscreen, indexBuffer);
276 pipe->flush(pipe, 0, NULL);
277 return TRUE;
278 }
279
280 static INLINE boolean
281 nv50_vbo_static_attrib(struct nv50_context *nv50, unsigned attrib,
282 struct nouveau_stateobj **pso,
283 struct pipe_vertex_element *ve,
284 struct pipe_vertex_buffer *vb)
285
286 {
287 struct nouveau_stateobj *so;
288 struct nouveau_grobj *tesla = nv50->screen->tesla;
289 struct nouveau_bo *bo = nouveau_bo(vb->buffer);
290 float *v;
291 int ret;
292 enum pipe_format pf = ve->src_format;
293
294 if ((pf_type(pf) != PIPE_FORMAT_TYPE_FLOAT) ||
295 (pf_size_x(pf) << pf_exp2(pf)) != 32)
296 return FALSE;
297
298 ret = nouveau_bo_map(bo, NOUVEAU_BO_RD);
299 if (ret)
300 return FALSE;
301 v = (float *)(bo->map + (vb->buffer_offset + ve->src_offset));
302
303 so = *pso;
304 if (!so)
305 *pso = so = so_new(nv50->vtxelt_nr * 5, 0);
306
307 switch (ve->nr_components) {
308 case 4:
309 so_method(so, tesla, NV50TCL_VTX_ATTR_4F_X(attrib), 4);
310 so_data (so, fui(v[0]));
311 so_data (so, fui(v[1]));
312 so_data (so, fui(v[2]));
313 so_data (so, fui(v[3]));
314 break;
315 case 3:
316 so_method(so, tesla, NV50TCL_VTX_ATTR_3F_X(attrib), 3);
317 so_data (so, fui(v[0]));
318 so_data (so, fui(v[1]));
319 so_data (so, fui(v[2]));
320 break;
321 case 2:
322 so_method(so, tesla, NV50TCL_VTX_ATTR_2F_X(attrib), 2);
323 so_data (so, fui(v[0]));
324 so_data (so, fui(v[1]));
325 break;
326 case 1:
327 so_method(so, tesla, NV50TCL_VTX_ATTR_1F(attrib), 1);
328 so_data (so, fui(v[0]));
329 break;
330 default:
331 nouveau_bo_unmap(bo);
332 return FALSE;
333 }
334
335 nouveau_bo_unmap(bo);
336 return TRUE;
337 }
338
339 void
340 nv50_vbo_validate(struct nv50_context *nv50)
341 {
342 struct nouveau_grobj *tesla = nv50->screen->tesla;
343 struct nouveau_stateobj *vtxbuf, *vtxfmt, *vtxattr;
344 unsigned i;
345
346 /* don't validate if Gallium took away our buffers */
347 if (nv50->vtxbuf_nr == 0)
348 return;
349
350 vtxattr = NULL;
351 vtxbuf = so_new(nv50->vtxelt_nr * 7, nv50->vtxelt_nr * 4);
352 vtxfmt = so_new(nv50->vtxelt_nr + 1, 0);
353 so_method(vtxfmt, tesla, NV50TCL_VERTEX_ARRAY_ATTRIB(0),
354 nv50->vtxelt_nr);
355
356 for (i = 0; i < nv50->vtxelt_nr; i++) {
357 struct pipe_vertex_element *ve = &nv50->vtxelt[i];
358 struct pipe_vertex_buffer *vb =
359 &nv50->vtxbuf[ve->vertex_buffer_index];
360 struct nouveau_bo *bo = nouveau_bo(vb->buffer);
361 uint32_t hw = nv50_vbo_vtxelt_to_hw(ve);
362
363 if (!vb->stride &&
364 nv50_vbo_static_attrib(nv50, i, &vtxattr, ve, vb)) {
365 so_data(vtxfmt, hw | (1 << 4));
366
367 so_method(vtxbuf, tesla,
368 NV50TCL_VERTEX_ARRAY_FORMAT(i), 1);
369 so_data (vtxbuf, 0);
370 continue;
371 }
372 so_data(vtxfmt, hw | i);
373
374 so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 3);
375 so_data (vtxbuf, 0x20000000 | vb->stride);
376 so_reloc (vtxbuf, bo, vb->buffer_offset +
377 ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
378 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
379 so_reloc (vtxbuf, bo, vb->buffer_offset +
380 ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
381 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
382
383 /* vertex array limits */
384 so_method(vtxbuf, tesla, 0x1080 + (i * 8), 2);
385 so_reloc (vtxbuf, bo, vb->buffer->size - 1,
386 NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD |
387 NOUVEAU_BO_HIGH, 0, 0);
388 so_reloc (vtxbuf, bo, vb->buffer->size - 1,
389 NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD |
390 NOUVEAU_BO_LOW, 0, 0);
391 }
392
393 so_ref (vtxfmt, &nv50->state.vtxfmt);
394 so_ref (vtxbuf, &nv50->state.vtxbuf);
395 so_ref (vtxattr, &nv50->state.vtxattr);
396 so_ref (NULL, &vtxbuf);
397 so_ref (NULL, &vtxfmt);
398 so_ref (NULL, &vtxattr);
399 }
400