2 * Copyright 2010 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #define NOUVEAU_DEBUG 1
26 #include "nvc0_program.h"
29 nvc0_ir_reverse_cc(uint8_t cc
)
31 static const uint8_t cc_swapped
[8] = { 0, 4, 2, 6, 1, 5, 3, 7 };
33 return cc_swapped
[cc
& 7] | (cc
& ~7);
37 nvc0_insn_can_load(struct nv_instruction
*nvi
, int s
,
38 struct nv_instruction
*ld
)
42 if (ld
->opcode
== NV_OP_MOV
&& ld
->src
[0]->value
->reg
.file
== NV_FILE_IMM
) {
43 if (s
> 1 || !(nvc0_op_info_table
[nvi
->opcode
].immediate
& (1 << s
)))
45 if (!(nvc0_op_info_table
[nvi
->opcode
].immediate
& 4))
46 if (ld
->src
[0]->value
->reg
.imm
.u32
& 0xfff)
49 if (!(nvc0_op_info_table
[nvi
->opcode
].memory
& (1 << s
)))
52 if (ld
->indirect
>= 0)
55 /* a few ops can use g[] sources directly, but we don't support g[] yet */
56 if (ld
->src
[0]->value
->reg
.file
== NV_FILE_MEM_L
||
57 ld
->src
[0]->value
->reg
.file
== NV_FILE_MEM_G
)
60 for (i
= 0; i
< 3 && nvi
->src
[i
]; ++i
)
61 if (nvi
->src
[i
]->value
->reg
.file
== NV_FILE_IMM
)
67 /* Return whether this instruction can be executed conditionally. */
69 nvc0_insn_is_predicateable(struct nv_instruction
*nvi
)
71 if (nvi
->predicate
>= 0) /* already predicated */
73 if (!nvc0_op_info_table
[nvi
->opcode
].predicate
&&
74 !nvc0_op_info_table
[nvi
->opcode
].pseudo
)
80 nvc0_insn_refcount(struct nv_instruction
*nvi
)
84 for (i
= 0; i
< 5 && nvi
->def
[i
]; ++i
) {
87 rc
+= nvi
->def
[i
]->refc
;
93 nvc0_pc_replace_value(struct nv_pc
*pc
,
94 struct nv_value
*old_val
,
95 struct nv_value
*new_val
)
99 if (old_val
== new_val
)
100 return old_val
->refc
;
102 for (i
= 0, n
= 0; i
< pc
->num_refs
; ++i
) {
103 if (pc
->refs
[i
]->value
== old_val
) {
105 for (s
= 0; s
< 6 && pc
->refs
[i
]->insn
->src
[s
]; ++s
)
106 if (pc
->refs
[i
]->insn
->src
[s
] == pc
->refs
[i
])
109 nv_reference(pc
, pc
->refs
[i
]->insn
, s
, new_val
);
115 static INLINE boolean
116 is_gpr63(struct nv_value
*val
)
118 return (val
->reg
.file
== NV_FILE_GPR
&& val
->reg
.id
== 63);
122 nvc0_pc_find_constant(struct nv_ref
*ref
)
124 struct nv_value
*src
;
130 while (src
->insn
&& src
->insn
->opcode
== NV_OP_MOV
) {
131 assert(!src
->insn
->src
[0]->mod
);
132 src
= src
->insn
->src
[0]->value
;
134 if ((src
->reg
.file
== NV_FILE_IMM
) || is_gpr63(src
) ||
136 src
->insn
->opcode
== NV_OP_LD
&&
137 src
->insn
->src
[0]->value
->reg
.file
>= NV_FILE_MEM_C(0) &&
138 src
->insn
->src
[0]->value
->reg
.file
<= NV_FILE_MEM_C(15)))
144 nvc0_pc_find_immediate(struct nv_ref
*ref
)
146 struct nv_value
*src
= nvc0_pc_find_constant(ref
);
148 return (src
&& (src
->reg
.file
== NV_FILE_IMM
|| is_gpr63(src
))) ? src
: NULL
;
152 nv_pc_free_refs(struct nv_pc
*pc
)
155 for (i
= 0; i
< pc
->num_refs
; i
+= 64)
161 edge_name(ubyte type
)
164 case CFG_EDGE_FORWARD
: return "forward";
165 case CFG_EDGE_BACK
: return "back";
166 case CFG_EDGE_LOOP_ENTER
: return "loop";
167 case CFG_EDGE_LOOP_LEAVE
: return "break";
168 case CFG_EDGE_FAKE
: return "fake";
175 nvc0_pc_pass_in_order(struct nv_basic_block
*root
, nv_pc_pass_func f
,
178 struct nv_basic_block
*bb
[64], *bbb
[16], *b
;
189 for (j
= 1; j
>= 0; --j
) {
193 switch (b
->out_kind
[j
]) {
196 case CFG_EDGE_FORWARD
:
198 if (++b
->out
[j
]->priv
== b
->out
[j
]->num_in
)
201 case CFG_EDGE_LOOP_ENTER
:
204 case CFG_EDGE_LOOP_LEAVE
:
205 if (!b
->out
[j
]->priv
) {
206 bbb
[pp
++] = b
->out
[j
];
221 bb
[pp
- 1] = bbb
[pp
- 1];
227 nv_do_print_function(void *priv
, struct nv_basic_block
*b
)
229 struct nv_instruction
*i
;
231 debug_printf("=== BB %i ", b
->id
);
233 debug_printf("[%s -> %i] ", edge_name(b
->out_kind
[0]), b
->out
[0]->id
);
235 debug_printf("[%s -> %i] ", edge_name(b
->out_kind
[1]), b
->out
[1]->id
);
236 debug_printf("===\n");
241 for (; i
; i
= i
->next
)
242 nvc0_print_instruction(i
);
246 nvc0_print_function(struct nv_basic_block
*root
)
248 if (root
->subroutine
)
249 debug_printf("SUBROUTINE %i\n", root
->subroutine
);
251 debug_printf("MAIN\n");
253 nvc0_pc_pass_in_order(root
, nv_do_print_function
, root
);
257 nvc0_print_program(struct nv_pc
*pc
)
260 for (i
= 0; i
< pc
->num_subroutines
+ 1; ++i
)
262 nvc0_print_function(pc
->root
[i
]);
265 #if NOUVEAU_DEBUG > 1
267 nv_do_print_cfgraph(struct nv_pc
*pc
, FILE *f
, struct nv_basic_block
*b
)
271 b
->pass_seq
= pc
->pass_seq
;
273 fprintf(f
, "\t%i [shape=box]\n", b
->id
);
275 for (i
= 0; i
< 2; ++i
) {
278 switch (b
->out_kind
[i
]) {
279 case CFG_EDGE_FORWARD
:
280 fprintf(f
, "\t%i -> %i;\n", b
->id
, b
->out
[i
]->id
);
282 case CFG_EDGE_LOOP_ENTER
:
283 fprintf(f
, "\t%i -> %i [color=green];\n", b
->id
, b
->out
[i
]->id
);
285 case CFG_EDGE_LOOP_LEAVE
:
286 fprintf(f
, "\t%i -> %i [color=red];\n", b
->id
, b
->out
[i
]->id
);
289 fprintf(f
, "\t%i -> %i;\n", b
->id
, b
->out
[i
]->id
);
292 fprintf(f
, "\t%i -> %i [style=dotted];\n", b
->id
, b
->out
[i
]->id
);
298 if (b
->out
[i
]->pass_seq
< pc
->pass_seq
)
299 nv_do_print_cfgraph(pc
, f
, b
->out
[i
]);
303 /* Print the control flow graph of subroutine @subr (0 == MAIN) to a file. */
305 nv_print_cfgraph(struct nv_pc
*pc
, const char *filepath
, int subr
)
309 f
= fopen(filepath
, "a");
313 fprintf(f
, "digraph G {\n");
317 nv_do_print_cfgraph(pc
, f
, pc
->root
[subr
]);
326 nvc0_pc_print_binary(struct nv_pc
*pc
)
330 NOUVEAU_DBG("nvc0_pc_print_binary(%u ops)\n", pc
->emit_size
/ 8);
332 for (i
= 0; i
< pc
->emit_size
/ 4; i
+= 2) {
333 debug_printf("0x%08x ", pc
->emit
[i
+ 0]);
334 debug_printf("0x%08x ", pc
->emit
[i
+ 1]);
342 nvc0_emit_program(struct nv_pc
*pc
)
344 uint32_t *code
= pc
->emit
;
347 NOUVEAU_DBG("emitting program: size = %u\n", pc
->emit_size
);
350 for (n
= 0; n
< pc
->num_blocks
; ++n
) {
351 struct nv_instruction
*i
;
352 struct nv_basic_block
*b
= pc
->bb_list
[n
];
354 for (i
= b
->entry
; i
; i
= i
->next
) {
355 nvc0_emit_instruction(pc
, i
);
360 assert(pc
->emit
== &code
[pc
->emit_size
/ 4]);
362 pc
->emit
[0] = 0x00001de7;
363 pc
->emit
[1] = 0x80000000;
369 nvc0_pc_print_binary(pc
);
371 debug_printf("not printing binary\n");
377 nvc0_generate_code(struct nvc0_translation_info
*ti
)
383 pc
= CALLOC_STRUCT(nv_pc
);
387 pc
->is_fragprog
= ti
->prog
->type
== PIPE_SHADER_FRAGMENT
;
389 pc
->root
= CALLOC(ti
->num_subrs
+ 1, sizeof(pc
->root
[0]));
394 pc
->num_subroutines
= ti
->num_subrs
;
396 ret
= nvc0_tgsi_to_nc(pc
, ti
);
399 #if NOUVEAU_DEBUG > 1
400 nvc0_print_program(pc
);
403 pc
->opt_reload_elim
= ti
->require_stores
? FALSE
: TRUE
;
406 ret
= nvc0_pc_exec_pass0(pc
);
410 nvc0_print_program(pc
);
413 /* register allocation */
414 ret
= nvc0_pc_exec_pass1(pc
);
417 #if NOUVEAU_DEBUG > 1
418 nvc0_print_program(pc
);
419 nv_print_cfgraph(pc
, "nvc0_shader_cfgraph.dot", 0);
422 /* prepare for emission */
423 ret
= nvc0_pc_exec_pass2(pc
);
426 assert(!(pc
->emit_size
% 8));
428 pc
->emit
= CALLOC(pc
->emit_size
/ 4 + 2, 4);
433 ret
= nvc0_emit_program(pc
);
437 ti
->prog
->code
= pc
->emit
;
438 ti
->prog
->code_base
= 0;
439 ti
->prog
->code_size
= pc
->emit_size
;
440 ti
->prog
->parm_size
= 0;
442 ti
->prog
->max_gpr
= MAX2(4, pc
->max_reg
[NV_FILE_GPR
] + 1);
444 ti
->prog
->relocs
= pc
->reloc_entries
;
445 ti
->prog
->num_relocs
= pc
->num_relocs
;
447 NOUVEAU_DBG("SHADER TRANSLATION - %s\n", ret
? "failure" : "success");
452 for (i
= 0; i
< pc
->num_blocks
; ++i
)
453 FREE(pc
->bb_list
[i
]);
457 /* on success, these will be referenced by struct nvc0_program */
462 if (pc
->reloc_entries
)
463 FREE(pc
->reloc_entries
);
470 nvbb_insert_phi(struct nv_basic_block
*b
, struct nv_instruction
*i
)
477 assert(!b
->entry
->prev
&& b
->exit
);
485 if (b
->entry
->opcode
== NV_OP_PHI
) { /* insert after entry */
486 assert(b
->entry
== b
->exit
);
491 } else { /* insert before entry */
492 assert(b
->entry
->prev
&& b
->exit
);
494 i
->prev
= b
->entry
->prev
;
502 nvc0_insn_append(struct nv_basic_block
*b
, struct nv_instruction
*i
)
504 if (i
->opcode
== NV_OP_PHI
) {
505 nvbb_insert_phi(b
, i
);
514 if (i
->prev
&& i
->prev
->opcode
== NV_OP_PHI
)
519 b
->num_instructions
++;
521 if (i
->prev
&& i
->prev
->terminator
)
522 nvc0_insns_permute(i
->prev
, i
);
526 nvc0_insn_insert_after(struct nv_instruction
*at
, struct nv_instruction
*ni
)
529 nvc0_insn_append(at
->bb
, ni
);
537 ni
->bb
->num_instructions
++;
541 nvc0_insn_insert_before(struct nv_instruction
*at
, struct nv_instruction
*ni
)
543 nvc0_insn_insert_after(at
, ni
);
544 nvc0_insns_permute(at
, ni
);
548 nvc0_insn_delete(struct nv_instruction
*nvi
)
550 struct nv_basic_block
*b
= nvi
->bb
;
553 /* debug_printf("REM: "); nv_print_instruction(nvi); */
555 for (s
= 0; s
< 6 && nvi
->src
[s
]; ++s
)
556 nv_reference(NULL
, nvi
, s
, NULL
);
559 nvi
->next
->prev
= nvi
->prev
;
561 assert(nvi
== b
->exit
);
566 nvi
->prev
->next
= nvi
->next
;
568 if (nvi
== b
->entry
) {
569 /* PHIs don't get hooked to b->entry */
570 b
->entry
= nvi
->next
;
571 assert(!nvi
->prev
|| nvi
->prev
->opcode
== NV_OP_PHI
);
575 if (nvi
->opcode
!= NV_OP_PHI
)
576 NOUVEAU_DBG("NOTE: b->phi points to non-PHI instruction\n");
579 if (!nvi
->next
|| nvi
->next
->opcode
!= NV_OP_PHI
)
587 nvc0_insns_permute(struct nv_instruction
*i1
, struct nv_instruction
*i2
)
589 struct nv_basic_block
*b
= i1
->bb
;
591 assert(i1
->opcode
!= NV_OP_PHI
&&
592 i2
->opcode
!= NV_OP_PHI
);
593 assert(i1
->next
== i2
);
613 nvc0_bblock_attach(struct nv_basic_block
*parent
,
614 struct nv_basic_block
*b
, ubyte edge_kind
)
616 assert(b
->num_in
< 8);
618 if (parent
->out
[0]) {
619 assert(!parent
->out
[1]);
621 parent
->out_kind
[1] = edge_kind
;
624 parent
->out_kind
[0] = edge_kind
;
627 b
->in
[b
->num_in
] = parent
;
628 b
->in_kind
[b
->num_in
++] = edge_kind
;
631 /* NOTE: all BRKs are treated as conditional, so there are 2 outgoing BBs */
634 nvc0_bblock_dominated_by(struct nv_basic_block
*b
, struct nv_basic_block
*d
)
641 for (j
= 0; j
< b
->num_in
; ++j
)
642 if ((b
->in_kind
[j
] != CFG_EDGE_BACK
) &&
643 !nvc0_bblock_dominated_by(b
->in
[j
], d
))
646 return j
? TRUE
: FALSE
;
649 /* check if @bf (future) can be reached from @bp (past), stop at @bt */
651 nvc0_bblock_reachable_by(struct nv_basic_block
*bf
, struct nv_basic_block
*bp
,
652 struct nv_basic_block
*bt
)
654 struct nv_basic_block
*q
[NV_PC_MAX_BASIC_BLOCKS
], *b
;
668 assert(n
<= (1024 - 2));
670 for (i
= 0; i
< 2; ++i
) {
671 if (b
->out
[i
] && !IS_WALL_EDGE(b
->out_kind
[i
]) && !b
->out
[i
]->priv
) {
677 for (--n
; n
>= 0; --n
)
683 static struct nv_basic_block
*
684 nvbb_find_dom_frontier(struct nv_basic_block
*b
, struct nv_basic_block
*df
)
686 struct nv_basic_block
*out
;
689 if (!nvc0_bblock_dominated_by(df
, b
)) {
690 for (i
= 0; i
< df
->num_in
; ++i
) {
691 if (df
->in_kind
[i
] == CFG_EDGE_BACK
)
693 if (nvc0_bblock_dominated_by(df
->in
[i
], b
))
697 for (i
= 0; i
< 2 && df
->out
[i
]; ++i
) {
698 if (df
->out_kind
[i
] == CFG_EDGE_BACK
)
700 if ((out
= nvbb_find_dom_frontier(b
, df
->out
[i
])))
706 struct nv_basic_block
*
707 nvc0_bblock_dom_frontier(struct nv_basic_block
*b
)
709 struct nv_basic_block
*df
;
712 for (i
= 0; i
< 2 && b
->out
[i
]; ++i
)
713 if ((df
= nvbb_find_dom_frontier(b
, b
->out
[i
])))