src/gallium/drivers/nvc0/nvc0_program.c

   1 /*
   2  * Copyright 2010 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "pipe/p_shader_tokens.h"
  24 #include "pipe/p_defines.h"
  25
  26 #define NOUVEAU_DEBUG
  27
  28 #include "tgsi/tgsi_parse.h"
  29 #include "tgsi/tgsi_util.h"
  30 #include "tgsi/tgsi_dump.h"
  31
  32 #include "nvc0_context.h"
  33 #include "nvc0_pc.h"
  34
  35 static unsigned
  36 nvc0_tgsi_src_mask(const struct tgsi_full_instruction *inst, int c)
  37 {
  38    unsigned mask = inst->Dst[0].Register.WriteMask;
  39
  40    switch (inst->Instruction.Opcode) {
  41    case TGSI_OPCODE_COS:
  42    case TGSI_OPCODE_SIN:
  43       return (mask & 0x8) | ((mask & 0x7) ? 0x1 : 0x0);
  44    case TGSI_OPCODE_DP3:
  45       return 0x7;
  46    case TGSI_OPCODE_DP4:
  47    case TGSI_OPCODE_DPH:
  48    case TGSI_OPCODE_KIL: /* WriteMask ignored */
  49       return 0xf;
  50    case TGSI_OPCODE_DST:
  51       return mask & (c ? 0xa : 0x6);
  52    case TGSI_OPCODE_EX2:
  53    case TGSI_OPCODE_EXP:
  54    case TGSI_OPCODE_LG2:
  55    case TGSI_OPCODE_LOG:
  56    case TGSI_OPCODE_POW:
  57    case TGSI_OPCODE_RCP:
  58    case TGSI_OPCODE_RSQ:
  59    case TGSI_OPCODE_SCS:
  60       return 0x1;
  61    case TGSI_OPCODE_IF:
  62       return 0x1;
  63    case TGSI_OPCODE_LIT:
  64       return 0xb;
  65    case TGSI_OPCODE_TEX:
  66    case TGSI_OPCODE_TXB:
  67    case TGSI_OPCODE_TXL:
  68    case TGSI_OPCODE_TXP:
  69    {
  70       const struct tgsi_instruction_texture *tex;
  71
  72       assert(inst->Instruction.Texture);
  73       tex = &inst->Texture;
  74
  75       mask = 0x7;
  76       if (inst->Instruction.Opcode != TGSI_OPCODE_TEX &&
  77           inst->Instruction.Opcode != TGSI_OPCODE_TXD)
  78          mask |= 0x8; /* bias, lod or proj */
  79
  80       switch (tex->Texture) {
  81       case TGSI_TEXTURE_1D:
  82          mask &= 0x9;
  83          break;
  84       case TGSI_TEXTURE_SHADOW1D:
  85          mask &= 0x5;
  86          break;
  87       case TGSI_TEXTURE_2D:
  88          mask &= 0xb;
  89          break;
  90       default:
  91          break;
  92       }
  93    }
  94            return mask;
  95    case TGSI_OPCODE_XPD:
  96    {
  97       unsigned x = 0;
  98       if (mask & 1) x |= 0x6;
  99       if (mask & 2) x |= 0x5;
 100       if (mask & 4) x |= 0x3;
 101       return x;
 102    }
 103    default:
 104       break;
 105    }
 106
 107    return mask;
 108 }
 109
 110 static void
 111 nvc0_indirect_inputs(struct nvc0_translation_info *ti, int id)
 112 {
 113    int i, c;
 114
 115    for (i = 0; i < PIPE_MAX_SHADER_INPUTS; ++i)
 116       for (c = 0; c < 4; ++c)
 117          ti->input_access[i][c] = id;
 118
 119    ti->indirect_inputs = TRUE;
 120 }
 121
 122 static void
 123 nvc0_indirect_outputs(struct nvc0_translation_info *ti, int id)
 124 {
 125    int i, c;
 126
 127    for (i = 0; i < PIPE_MAX_SHADER_OUTPUTS; ++i)
 128       for (c = 0; c < 4; ++c)
 129          ti->output_access[i][c] = id;
 130
 131    ti->indirect_outputs = TRUE;
 132 }
 133
 134 static INLINE unsigned
 135 nvc0_system_value_location(unsigned sn, unsigned si, boolean *is_input)
 136 {
 137    /* NOTE: locations 0xfxx indicate special regs */
 138    switch (sn) {
 139       /*
 140    case TGSI_SEMANTIC_VERTEXID:
 141       *is_input = TRUE;
 142       return 0x2fc;
 143       */
 144    case TGSI_SEMANTIC_PRIMID:
 145       *is_input = TRUE;
 146       return 0x60;
 147       /*
 148    case TGSI_SEMANTIC_LAYER_INDEX:
 149       return 0x64;
 150    case TGSI_SEMANTIC_VIEWPORT_INDEX:
 151       return 0x68;
 152       */
 153    case TGSI_SEMANTIC_INSTANCEID:
 154       *is_input = TRUE;
 155       return 0x2f8;
 156    case TGSI_SEMANTIC_FACE:
 157       *is_input = TRUE;
 158       return 0x3fc;
 159       /*
 160    case TGSI_SEMANTIC_INVOCATIONID:
 161       return 0xf11;
 162       */
 163    default:
 164       assert(0);
 165       return 0x000;
 166    }
 167 }
 168
 169 static INLINE unsigned
 170 nvc0_varying_location(unsigned sn, unsigned si)
 171 {
 172    switch (sn) {
 173    case TGSI_SEMANTIC_POSITION:
 174       return 0x70;
 175    case TGSI_SEMANTIC_COLOR:
 176       return 0x280 + (si * 16); /* are these hard-wired ? */
 177    case TGSI_SEMANTIC_BCOLOR:
 178       return 0x2a0 + (si * 16);
 179    case TGSI_SEMANTIC_FOG:
 180       return 0x270;
 181    case TGSI_SEMANTIC_PSIZE:
 182       return 0x6c;
 183       /*
 184    case TGSI_SEMANTIC_PNTC:
 185       return 0x2e0;
 186       */
 187    case TGSI_SEMANTIC_GENERIC:
 188       assert(si < 31);
 189       return 0x80 + (si * 16);
 190    case TGSI_SEMANTIC_NORMAL:
 191       return 0x360;
 192    case TGSI_SEMANTIC_PRIMID:
 193       return 0x40;
 194    case TGSI_SEMANTIC_FACE:
 195       return 0x3fc;
 196       /*
 197    case TGSI_SEMANTIC_CLIP_DISTANCE:
 198       return 0x2c0 + (si * 4);
 199       */
 200    default:
 201       assert(0);
 202       return 0x000;
 203    }
 204 }
 205
 206 static INLINE unsigned
 207 nvc0_interp_mode(const struct tgsi_full_declaration *decl)
 208 {
 209    unsigned mode;
 210
 211    if (decl->Declaration.Interpolate == TGSI_INTERPOLATE_CONSTANT)
 212       mode = NVC0_INTERP_FLAT;
 213    else
 214    if (decl->Declaration.Interpolate == TGSI_INTERPOLATE_PERSPECTIVE)
 215       mode = NVC0_INTERP_PERSPECTIVE;
 216    else
 217       mode = NVC0_INTERP_LINEAR;
 218
 219    if (decl->Declaration.Centroid)
 220       mode |= NVC0_INTERP_CENTROID;
 221
 222    return mode;
 223 }
 224
 225 static void
 226 prog_immediate(struct nvc0_translation_info *ti,
 227                const struct tgsi_full_immediate *imm)
 228 {
 229    int c;
 230    unsigned n = ti->immd32_nr++;
 231
 232    assert(ti->immd32_nr <= ti->scan.immediate_count);
 233
 234    for (c = 0; c < 4; ++c)
 235       ti->immd32[n * 4 + c] = imm->u[c].Uint;
 236
 237    ti->immd32_ty[n] = imm->Immediate.DataType;
 238 }
 239
 240 static boolean
 241 prog_decl(struct nvc0_translation_info *ti,
 242           const struct tgsi_full_declaration *decl)
 243 {
 244    unsigned i, c;
 245    unsigned sn = TGSI_SEMANTIC_GENERIC;
 246    unsigned si = 0;
 247    const unsigned first = decl->Range.First;
 248    const unsigned last = decl->Range.Last;
 249
 250    if (decl->Declaration.Semantic) {
 251       sn = decl->Semantic.Name;
 252       si = decl->Semantic.Index;
 253    }
 254
 255    switch (decl->Declaration.File) {
 256    case TGSI_FILE_INPUT:
 257       for (i = first; i <= last; ++i) {
 258          if (ti->prog->type == PIPE_SHADER_VERTEX) {
 259             sn = TGSI_SEMANTIC_GENERIC;
 260             si = i;
 261          }
 262          for (c = 0; c < 4; ++c)
 263             ti->input_loc[i][c] = nvc0_varying_location(sn, si) + c * 4;
 264
 265          if (ti->prog->type == PIPE_SHADER_FRAGMENT)
 266             ti->interp_mode[i] = nvc0_interp_mode(decl);
 267       }
 268       break;
 269    case TGSI_FILE_OUTPUT:
 270       for (i = first; i <= last; ++i, ++si) {
 271          if (ti->prog->type == PIPE_SHADER_FRAGMENT) {
 272             si = i;
 273             if (i == ti->fp_depth_output) {
 274                ti->output_loc[i][2] = (ti->scan.num_outputs - 1) * 4;
 275             } else {
 276                if (i > ti->fp_depth_output)
 277                   si -= 1;
 278                for (c = 0; c < 4; ++c)
 279                   ti->output_loc[i][c] = si * 4 + c;
 280             }
 281          } else {
 282             for (c = 0; c < 4; ++c)
 283                ti->output_loc[i][c] = nvc0_varying_location(sn, si) + c * 4;
 284          }
 285       }
 286       break;
 287    case TGSI_FILE_SYSTEM_VALUE:
 288       ti->sysval_loc[i] = nvc0_system_value_location(sn, si, &ti->sysval_in[i]);
 289       assert(first == last);
 290       break;
 291    case TGSI_FILE_NULL:
 292    case TGSI_FILE_CONSTANT:
 293    case TGSI_FILE_TEMPORARY:
 294    case TGSI_FILE_SAMPLER:
 295    case TGSI_FILE_ADDRESS:
 296    case TGSI_FILE_IMMEDIATE:
 297    case TGSI_FILE_PREDICATE:
 298       break;
 299    default:
 300       NOUVEAU_ERR("unhandled TGSI_FILE %d\n", decl->Declaration.File);
 301       return FALSE;
 302    }
 303    return TRUE;
 304 }
 305
 306 static void
 307 prog_inst(struct nvc0_translation_info *ti,
 308           const struct tgsi_full_instruction *inst, int id)
 309 {
 310    const struct tgsi_dst_register *dst;
 311    const struct tgsi_src_register *src;
 312    int s, c, k;
 313    unsigned mask;
 314
 315    if (inst->Instruction.Opcode == TGSI_OPCODE_BGNSUB) {
 316       ti->subr[ti->num_subrs].first_insn = id - 1;
 317       ti->subr[ti->num_subrs].id = ti->num_subrs + 1; /* id 0 is main program */
 318       ++ti->num_subrs;
 319    }
 320
 321    if (inst->Dst[0].Register.File == TGSI_FILE_OUTPUT) {
 322       dst = &inst->Dst[0].Register;
 323
 324       for (c = 0; c < 4; ++c) {
 325          if (dst->Indirect)
 326             nvc0_indirect_outputs(ti, id);
 327          if (!(dst->WriteMask & (1 << c)))
 328             continue;
 329          ti->output_access[dst->Index][c] = id;
 330       }
 331
 332       if (inst->Instruction.Opcode == TGSI_OPCODE_MOV &&
 333           inst->Src[0].Register.File == TGSI_FILE_INPUT &&
 334           dst->Index == ti->edgeflag_out)
 335          ti->prog->vp.edgeflag = inst->Src[0].Register.Index;
 336    } else
 337    if (inst->Dst[0].Register.File == TGSI_FILE_TEMPORARY) {
 338       if (inst->Dst[0].Register.Indirect)
 339          ti->require_stores = TRUE;
 340    }
 341
 342    for (s = 0; s < inst->Instruction.NumSrcRegs; ++s) {
 343       src = &inst->Src[s].Register;
 344       if (src->File == TGSI_FILE_TEMPORARY)
 345          if (inst->Src[s].Register.Indirect)
 346             ti->require_stores = TRUE;
 347       if (src->File != TGSI_FILE_INPUT)
 348          continue;
 349       mask = nvc0_tgsi_src_mask(inst, s);
 350
 351       if (inst->Src[s].Register.Indirect)
 352          nvc0_indirect_inputs(ti, id);
 353
 354       for (c = 0; c < 4; ++c) {
 355          if (!(mask & (1 << c)))
 356             continue;
 357          k = tgsi_util_get_full_src_register_swizzle(&inst->Src[s], c);
 358          if (k <= TGSI_SWIZZLE_W)
 359             ti->input_access[src->Index][k] = id;
 360       }
 361    }
 362 }
 363
 364 /* Probably should introduce something like struct tgsi_function_declaration
 365  * instead of trying to guess inputs/outputs.
 366  */
 367 static void
 368 prog_subroutine_inst(struct nvc0_subroutine *subr,
 369                      const struct tgsi_full_instruction *inst)
 370 {
 371    const struct tgsi_dst_register *dst;
 372    const struct tgsi_src_register *src;
 373    int s, c, k;
 374    unsigned mask;
 375
 376    for (s = 0; s < inst->Instruction.NumSrcRegs; ++s) {
 377       src = &inst->Src[s].Register;
 378       if (src->File != TGSI_FILE_TEMPORARY)
 379          continue;
 380       mask = nvc0_tgsi_src_mask(inst, s);
 381
 382       for (c = 0; c < 4; ++c) {
 383          k = tgsi_util_get_full_src_register_swizzle(&inst->Src[s], c);
 384
 385          if ((mask & (1 << c)) && k < TGSI_SWIZZLE_W)
 386             if (!(subr->retv[src->Index / 32][k] & (1 << (src->Index % 32))))
 387                subr->argv[src->Index / 32][k] |= 1 << (src->Index % 32);
 388       }
 389    }
 390
 391    if (inst->Dst[0].Register.File == TGSI_FILE_TEMPORARY) {
 392       dst = &inst->Dst[0].Register;
 393
 394       for (c = 0; c < 4; ++c)
 395          if (dst->WriteMask & (1 << c))
 396             subr->retv[dst->Index / 32][c] |= 1 << (dst->Index % 32);
 397    }
 398 }
 399
 400 static int
 401 nvc0_vp_gp_gen_header(struct nvc0_program *vp, struct nvc0_translation_info *ti)
 402 {
 403    int i, c;
 404    unsigned a;
 405
 406    for (a = 0x80/4, i = 0; i <= ti->scan.file_max[TGSI_FILE_INPUT]; ++i) {
 407       for (c = 0; c < 4; ++c, ++a)
 408          if (ti->input_access[i][c])
 409             vp->hdr[5 + a / 32] |= 1 << (a % 32); /* VP_ATTR_EN */
 410    }
 411
 412    for (i = 0; i <= ti->scan.file_max[TGSI_FILE_OUTPUT]; ++i) {
 413       a = (ti->output_loc[i][0] - 0x40) / 4;
 414       for (c = 0; c < 4; ++c, ++a) {
 415          if (!ti->output_access[i][c])
 416             continue;
 417          vp->hdr[13 + a / 32] |= 1 << (a % 32); /* VP_EXPORT_EN */
 418       }
 419    }
 420
 421    for (i = 0; i < TGSI_SEMANTIC_COUNT; ++i) {
 422       a = ti->sysval_loc[i] / 4;
 423       if (a > 0 && a < (0xf00 / 4))
 424          vp->hdr[(ti->sysval_in[i] ? 5 : 13) + a / 32] |= 1 << (a % 32);
 425    }
 426
 427    return 0;
 428 }
 429
 430 static int
 431 nvc0_vp_gen_header(struct nvc0_program *vp, struct nvc0_translation_info *ti)
 432 {
 433    vp->hdr[0] = 0x20461;
 434    vp->hdr[4] = 0xff000;
 435
 436    vp->hdr[18] = (1 << vp->vp.num_ucps) - 1;
 437
 438    return nvc0_vp_gp_gen_header(vp, ti);
 439 }
 440
 441 static int
 442 nvc0_gp_gen_header(struct nvc0_program *gp, struct nvc0_translation_info *ti)
 443 {
 444    unsigned invocations = 1;
 445    unsigned max_output_verts, output_prim;
 446    unsigned i;
 447
 448    gp->hdr[0] = 0x21061;
 449
 450    for (i = 0; i < ti->scan.num_properties; ++i) {
 451       switch (ti->scan.properties[i].name) {
 452       case TGSI_PROPERTY_GS_OUTPUT_PRIM:
 453          output_prim = ti->scan.properties[i].data[0];
 454          break;
 455       case TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES:
 456          max_output_verts = ti->scan.properties[i].data[0];
 457          assert(max_output_verts < 512);
 458          break;
 459          /*
 460       case TGSI_PROPERTY_GS_INVOCATIONS:
 461          invocations = ti->scan.properties[i].data[0];
 462          assert(invocations <= 32);
 463          break;
 464          */
 465       default:
 466          break;
 467       }
 468    }
 469
 470    gp->hdr[2] = MIN2(invocations, 32) << 24;
 471
 472    switch (output_prim) {
 473    case PIPE_PRIM_POINTS:
 474       gp->hdr[3] = 0x01000000;
 475       gp->hdr[0] |= 0xf0000000;
 476       break;
 477    case PIPE_PRIM_LINE_STRIP:
 478       gp->hdr[3] = 0x06000000;
 479       gp->hdr[0] |= 0x10000000;
 480       break;
 481    case PIPE_PRIM_TRIANGLE_STRIP:
 482       gp->hdr[3] = 0x07000000;
 483       gp->hdr[0] |= 0x10000000;
 484       break;
 485    default:
 486       assert(0);
 487       break;
 488    }
 489
 490    gp->hdr[4] = max_output_verts & 0x1ff;
 491
 492    return nvc0_vp_gp_gen_header(gp, ti);
 493 }
 494
 495 static int
 496 nvc0_fp_gen_header(struct nvc0_program *fp, struct nvc0_translation_info *ti)
 497 {
 498    int i, c;
 499    unsigned a, m;
 500
 501    fp->hdr[0] = 0x21462;
 502    fp->hdr[5] = 0x80000000; /* getting a trap if FRAG_COORD_UMASK.w = 0 */
 503
 504    if (ti->scan.uses_kill)
 505       fp->hdr[0] |= 0x8000;
 506    if (ti->scan.writes_z) {
 507       fp->hdr[19] |= 0x2;
 508       if (ti->scan.num_outputs > 2)
 509          fp->hdr[0] |= 0x4000; /* FP_MULTIPLE_COLOR_OUTPUTS */
 510    } else {
 511    if (ti->scan.num_outputs > 1)
 512       fp->hdr[0] |= 0x4000; /* FP_MULTIPLE_COLOR_OUTPUTS */
 513    }
 514
 515    for (i = 0; i <= ti->scan.file_max[TGSI_FILE_INPUT]; ++i) {
 516       m = ti->interp_mode[i];
 517       for (c = 0; c < 4; ++c) {
 518          if (!ti->input_access[i][c])
 519             continue;
 520          a = ti->input_loc[i][c] / 2;
 521          if ((a & ~7) == 0x70/2)
 522             fp->hdr[5] |= 1 << (28 + (a & 7) / 2); /* FRAG_COORD_UMASK */
 523          else
 524             fp->hdr[4 + a / 32] |= m << (a % 32);
 525       }
 526    }
 527
 528    for (i = 0; i <= ti->scan.file_max[TGSI_FILE_OUTPUT]; ++i) {
 529       if (i != ti->fp_depth_output)
 530          fp->hdr[18] |= 0xf << ti->output_loc[i][0];
 531    }
 532
 533    for (i = 0; i < TGSI_SEMANTIC_COUNT; ++i) {
 534       a = ti->sysval_loc[i] / 2;
 535       if ((a > 0) && (a < 0xf00 / 2))
 536          fp->hdr[4 + a / 32] |= NVC0_INTERP_FLAT << (a % 32);
 537    }
 538
 539    return 0;
 540 }
 541
 542 static boolean
 543 nvc0_prog_scan(struct nvc0_translation_info *ti)
 544 {
 545    struct nvc0_program *prog = ti->prog;
 546    struct tgsi_parse_context parse;
 547    int ret;
 548    unsigned i;
 549
 550 #ifdef NOUVEAU_DEBUG
 551    tgsi_dump(prog->pipe.tokens, 0);
 552 #endif
 553
 554    tgsi_scan_shader(prog->pipe.tokens, &ti->scan);
 555
 556    if (ti->prog->type == PIPE_SHADER_FRAGMENT) {
 557       ti->fp_depth_output = 255;
 558       for (i = 0; i < ti->scan.num_outputs; ++i)
 559          if (ti->scan.output_semantic_name[i] == TGSI_SEMANTIC_POSITION)
 560             ti->fp_depth_output = i;
 561    }
 562
 563    ti->subr =
 564       CALLOC(ti->scan.opcode_count[TGSI_OPCODE_BGNSUB], sizeof(ti->subr[0]));
 565
 566    ti->immd32 = (uint32_t *)MALLOC(ti->scan.immediate_count * 16);
 567    ti->immd32_ty = (ubyte *)MALLOC(ti->scan.immediate_count * sizeof(ubyte));
 568
 569    ti->insns = MALLOC(ti->scan.num_instructions * sizeof(ti->insns[0]));
 570
 571    tgsi_parse_init(&parse, prog->pipe.tokens);
 572    while (!tgsi_parse_end_of_tokens(&parse)) {
 573       tgsi_parse_token(&parse);
 574
 575       switch (parse.FullToken.Token.Type) {
 576       case TGSI_TOKEN_TYPE_IMMEDIATE:
 577          prog_immediate(ti, &parse.FullToken.FullImmediate);
 578          break;
 579       case TGSI_TOKEN_TYPE_DECLARATION:
 580          prog_decl(ti, &parse.FullToken.FullDeclaration);
 581          break;
 582       case TGSI_TOKEN_TYPE_INSTRUCTION:
 583          ti->insns[ti->num_insns] = parse.FullToken.FullInstruction;
 584          prog_inst(ti, &parse.FullToken.FullInstruction, ++ti->num_insns);
 585          break;
 586       default:
 587          break;
 588       }
 589    }
 590
 591    for (i = 0; i < ti->num_subrs; ++i) {
 592       unsigned pc = ti->subr[i].id;
 593       while (ti->insns[pc].Instruction.Opcode != TGSI_OPCODE_ENDSUB)
 594          prog_subroutine_inst(&ti->subr[i], &ti->insns[pc++]);
 595    }
 596
 597    switch (prog->type) {
 598    case PIPE_SHADER_VERTEX:
 599       ti->input_file = NV_FILE_MEM_A;
 600       ti->output_file = NV_FILE_MEM_V;
 601       ret = nvc0_vp_gen_header(prog, ti);
 602       break;
 603       /*
 604    case PIPE_SHADER_TESSELLATION_CONTROL:
 605       ret = nvc0_tcp_gen_header(ti);
 606       break;
 607    case PIPE_SHADER_TESSELLATION_EVALUATION:
 608       ret = nvc0_tep_gen_header(ti);
 609       break;
 610    case PIPE_SHADER_GEOMETRY:
 611       ret = nvc0_gp_gen_header(ti);
 612       break;
 613       */
 614    case PIPE_SHADER_FRAGMENT:
 615       ti->input_file = NV_FILE_MEM_V;
 616       ti->output_file = NV_FILE_GPR;
 617
 618       if (ti->scan.writes_z)
 619          prog->flags[0] = 0x11; /* ? */
 620       else
 621       if (!ti->global_stores)
 622          prog->fp.early_z = 1;
 623
 624       ret = nvc0_fp_gen_header(prog, ti);
 625       break;
 626    default:
 627       assert(!"unsupported program type");
 628       ret = -1;
 629       break;
 630    }
 631
 632    assert(!ret);
 633    return ret;
 634 }
 635
 636 boolean
 637 nvc0_program_translate(struct nvc0_program *prog)
 638 {
 639    struct nvc0_translation_info *ti;
 640    int ret;
 641
 642    ti = CALLOC_STRUCT(nvc0_translation_info);
 643    ti->prog = prog;
 644
 645    ti->edgeflag_out = PIPE_MAX_SHADER_OUTPUTS;
 646
 647    if (prog->type == PIPE_SHADER_VERTEX && prog->vp.num_ucps)
 648       ti->append_ucp = TRUE;
 649
 650    ret = nvc0_prog_scan(ti);
 651    if (ret) {
 652       NOUVEAU_ERR("unsupported shader program\n");
 653       goto out;
 654    }
 655
 656    ret = nvc0_generate_code(ti);
 657    if (ret)
 658       NOUVEAU_ERR("shader translation failed\n");
 659
 660    {
 661       unsigned i;
 662       for (i = 0; i < sizeof(prog->hdr) / sizeof(prog->hdr[0]); ++i)
 663          debug_printf("HDR[%02lx] = 0x%08x\n",
 664                       i * sizeof(prog->hdr[0]), prog->hdr[i]);
 665    }
 666
 667 out:
 668    if (ti->immd32)
 669       FREE(ti->immd32);
 670    if (ti->immd32_ty)
 671       FREE(ti->immd32_ty);
 672    if (ti->insns)
 673       FREE(ti->insns);
 674    if (ti->subr)
 675       FREE(ti->subr);
 676    FREE(ti);
 677    return ret ? FALSE : TRUE;
 678 }
 679
 680 void
 681 nvc0_program_destroy(struct nvc0_context *nvc0, struct nvc0_program *prog)
 682 {
 683    if (prog->res)
 684       nouveau_resource_free(&prog->res);
 685
 686    if (prog->code)
 687       FREE(prog->code);
 688    if (prog->relocs)
 689       FREE(prog->relocs);
 690
 691    memset(prog->hdr, 0, sizeof(prog->hdr));
 692
 693    prog->translated = FALSE;
 694 }