nvc0: identify VERTEX_QUARANTINE
[mesa.git] / src / gallium / drivers / nvc0 / nvc0_push2.c
1
2 #if 0 /* not used, kept for now to compare with util/translate */
3
4 #include "pipe/p_context.h"
5 #include "pipe/p_state.h"
6 #include "util/u_inlines.h"
7 #include "util/u_format.h"
8 #include "translate/translate.h"
9
10 #include "nvc0_context.h"
11 #include "nvc0_resource.h"
12
13 #include "nvc0_3d.xml.h"
14
15 struct push_context {
16 struct nvc0_context *nvc0;
17
18 uint vertex_size;
19
20 void *idxbuf;
21 uint idxsize;
22
23 float edgeflag;
24 int edgeflag_input;
25
26 struct {
27 void *map;
28 void (*push)(struct nouveau_channel *, void *);
29 uint32_t stride;
30 uint32_t divisor;
31 uint32_t step;
32 } attr[32];
33 int num_attrs;
34 };
35
36 static void
37 emit_b32_1(struct nouveau_channel *chan, void *data)
38 {
39 uint32_t *v = data;
40
41 OUT_RING(chan, v[0]);
42 }
43
44 static void
45 emit_b32_2(struct nouveau_channel *chan, void *data)
46 {
47 uint32_t *v = data;
48
49 OUT_RING(chan, v[0]);
50 OUT_RING(chan, v[1]);
51 }
52
53 static void
54 emit_b32_3(struct nouveau_channel *chan, void *data)
55 {
56 uint32_t *v = data;
57
58 OUT_RING(chan, v[0]);
59 OUT_RING(chan, v[1]);
60 OUT_RING(chan, v[2]);
61 }
62
63 static void
64 emit_b32_4(struct nouveau_channel *chan, void *data)
65 {
66 uint32_t *v = data;
67
68 OUT_RING(chan, v[0]);
69 OUT_RING(chan, v[1]);
70 OUT_RING(chan, v[2]);
71 OUT_RING(chan, v[3]);
72 }
73
74 static void
75 emit_b16_1(struct nouveau_channel *chan, void *data)
76 {
77 uint16_t *v = data;
78
79 OUT_RING(chan, v[0]);
80 }
81
82 static void
83 emit_b16_3(struct nouveau_channel *chan, void *data)
84 {
85 uint16_t *v = data;
86
87 OUT_RING(chan, (v[1] << 16) | v[0]);
88 OUT_RING(chan, v[2]);
89 }
90
91 static void
92 emit_b08_1(struct nouveau_channel *chan, void *data)
93 {
94 uint8_t *v = data;
95
96 OUT_RING(chan, v[0]);
97 }
98
99 static void
100 emit_b08_3(struct nouveau_channel *chan, void *data)
101 {
102 uint8_t *v = data;
103
104 OUT_RING(chan, (v[2] << 16) | (v[1] << 8) | v[0]);
105 }
106
107 static void
108 emit_b64_1(struct nouveau_channel *chan, void *data)
109 {
110 double *v = data;
111
112 OUT_RINGf(chan, v[0]);
113 }
114
115 static void
116 emit_b64_2(struct nouveau_channel *chan, void *data)
117 {
118 double *v = data;
119
120 OUT_RINGf(chan, v[0]);
121 OUT_RINGf(chan, v[1]);
122 }
123
124 static void
125 emit_b64_3(struct nouveau_channel *chan, void *data)
126 {
127 double *v = data;
128
129 OUT_RINGf(chan, v[0]);
130 OUT_RINGf(chan, v[1]);
131 OUT_RINGf(chan, v[2]);
132 }
133
134 static void
135 emit_b64_4(struct nouveau_channel *chan, void *data)
136 {
137 double *v = data;
138
139 OUT_RINGf(chan, v[0]);
140 OUT_RINGf(chan, v[1]);
141 OUT_RINGf(chan, v[2]);
142 OUT_RINGf(chan, v[3]);
143 }
144
145 static INLINE void
146 emit_vertex(struct push_context *ctx, unsigned n)
147 {
148 struct nouveau_channel *chan = ctx->nvc0->screen->base.channel;
149 int i;
150
151 if (ctx->edgeflag_input < 32) {
152 /* TODO */
153 }
154
155 BEGIN_RING_NI(chan, RING_3D(VERTEX_DATA), ctx->vertex_size);
156 for (i = 0; i < ctx->num_attrs; ++i)
157 ctx->attr[i].push(chan,
158 (uint8_t *)ctx->attr[i].map + n * ctx->attr[i].stride);
159 }
160
161 static void
162 emit_edgeflag(struct push_context *ctx, boolean enabled)
163 {
164 struct nouveau_channel *chan = ctx->nvc0->screen->base.channel;
165
166 IMMED_RING(chan, RING_3D(EDGEFLAG_ENABLE), enabled);
167 }
168
169 static void
170 emit_elt08(struct push_context *ctx, unsigned start, unsigned count)
171 {
172 uint8_t *idxbuf = ctx->idxbuf;
173
174 while (count--)
175 emit_vertex(ctx, idxbuf[start++]);
176 }
177
178 static void
179 emit_elt16(struct push_context *ctx, unsigned start, unsigned count)
180 {
181 uint16_t *idxbuf = ctx->idxbuf;
182
183 while (count--)
184 emit_vertex(ctx, idxbuf[start++]);
185 }
186
187 static void
188 emit_elt32(struct push_context *ctx, unsigned start, unsigned count)
189 {
190 uint32_t *idxbuf = ctx->idxbuf;
191
192 while (count--)
193 emit_vertex(ctx, idxbuf[start++]);
194 }
195
196 static void
197 emit_seq(struct push_context *ctx, unsigned start, unsigned count)
198 {
199 while (count--)
200 emit_vertex(ctx, start++);
201 }
202
203 #define NVC0_PRIM_GL_CASE(n) \
204 case PIPE_PRIM_##n: return NVC0_3D_VERTEX_BEGIN_GL_PRIMITIVE_##n
205
206 static INLINE unsigned
207 nvc0_prim_gl(unsigned prim)
208 {
209 switch (prim) {
210 NVC0_PRIM_GL_CASE(POINTS);
211 NVC0_PRIM_GL_CASE(LINES);
212 NVC0_PRIM_GL_CASE(LINE_LOOP);
213 NVC0_PRIM_GL_CASE(LINE_STRIP);
214 NVC0_PRIM_GL_CASE(TRIANGLES);
215 NVC0_PRIM_GL_CASE(TRIANGLE_STRIP);
216 NVC0_PRIM_GL_CASE(TRIANGLE_FAN);
217 NVC0_PRIM_GL_CASE(QUADS);
218 NVC0_PRIM_GL_CASE(QUAD_STRIP);
219 NVC0_PRIM_GL_CASE(POLYGON);
220 NVC0_PRIM_GL_CASE(LINES_ADJACENCY);
221 NVC0_PRIM_GL_CASE(LINE_STRIP_ADJACENCY);
222 NVC0_PRIM_GL_CASE(TRIANGLES_ADJACENCY);
223 NVC0_PRIM_GL_CASE(TRIANGLE_STRIP_ADJACENCY);
224 /*
225 NVC0_PRIM_GL_CASE(PATCHES); */
226 default:
227 return NVC0_3D_VERTEX_BEGIN_GL_PRIMITIVE_POINTS;
228 break;
229 }
230 }
231
232 void
233 nvc0_push_vbo2(struct nvc0_context *nvc0, const struct pipe_draw_info *info)
234 {
235 struct push_context ctx;
236 unsigned i, n;
237 unsigned inst = info->instance_count;
238 unsigned prim = nvc0_prim_gl(info->mode);
239
240 ctx.nvc0 = nvc0;
241 ctx.vertex_size = nvc0->vertex->vtx_size;
242 ctx.idxbuf = NULL;
243 ctx.num_attrs = 0;
244 ctx.edgeflag = 0.5f;
245 ctx.edgeflag_input = 32;
246
247 for (i = 0; i < nvc0->vertex->num_elements; ++i) {
248 struct pipe_vertex_element *ve = &nvc0->vertex->element[i].pipe;
249 struct pipe_vertex_buffer *vb = &nvc0->vtxbuf[ve->vertex_buffer_index];
250 struct nouveau_bo *bo = nvc0_resource(vb->buffer)->bo;
251 unsigned nr_components;
252
253 if (!(nvc0->vbo_fifo & (1 << i)))
254 continue;
255 n = ctx.num_attrs++;
256
257 if (nouveau_bo_map(bo, NOUVEAU_BO_RD))
258 return;
259 ctx.attr[n].map = (uint8_t *)bo->map + vb->buffer_offset + ve->src_offset;
260
261 nouveau_bo_unmap(bo);
262
263 ctx.attr[n].stride = vb->stride;
264 ctx.attr[n].divisor = ve->instance_divisor;
265
266 nr_components = util_format_get_nr_components(ve->src_format);
267 switch (util_format_get_component_bits(ve->src_format,
268 UTIL_FORMAT_COLORSPACE_RGB, 0)) {
269 case 8:
270 switch (nr_components) {
271 case 1: ctx.attr[n].push = emit_b08_1; break;
272 case 2: ctx.attr[n].push = emit_b16_1; break;
273 case 3: ctx.attr[n].push = emit_b08_3; break;
274 case 4: ctx.attr[n].push = emit_b32_1; break;
275 }
276 break;
277 case 16:
278 switch (nr_components) {
279 case 1: ctx.attr[n].push = emit_b16_1; break;
280 case 2: ctx.attr[n].push = emit_b32_1; break;
281 case 3: ctx.attr[n].push = emit_b16_3; break;
282 case 4: ctx.attr[n].push = emit_b32_2; break;
283 }
284 break;
285 case 32:
286 switch (nr_components) {
287 case 1: ctx.attr[n].push = emit_b32_1; break;
288 case 2: ctx.attr[n].push = emit_b32_2; break;
289 case 3: ctx.attr[n].push = emit_b32_3; break;
290 case 4: ctx.attr[n].push = emit_b32_4; break;
291 }
292 break;
293 default:
294 assert(0);
295 break;
296 }
297 }
298
299 if (info->indexed) {
300 struct nvc0_resource *res = nvc0_resource(nvc0->idxbuf.buffer);
301 if (!res || nouveau_bo_map(res->bo, NOUVEAU_BO_RD))
302 return;
303 ctx.idxbuf = (uint8_t *)res->bo->map + nvc0->idxbuf.offset + res->offset;
304 nouveau_bo_unmap(res->bo);
305 ctx.idxsize = nvc0->idxbuf.index_size;
306 } else {
307 ctx.idxsize = 0;
308 }
309
310 while (inst--) {
311 BEGIN_RING(nvc0->screen->base.channel, RING_3D(VERTEX_BEGIN_GL), 1);
312 OUT_RING (nvc0->screen->base.channel, prim);
313 switch (ctx.idxsize) {
314 case 0:
315 emit_seq(&ctx, info->start, info->count);
316 break;
317 case 1:
318 emit_elt08(&ctx, info->start, info->count);
319 break;
320 case 2:
321 emit_elt16(&ctx, info->start, info->count);
322 break;
323 case 4:
324 emit_elt32(&ctx, info->start, info->count);
325 break;
326 }
327 IMMED_RING(nvc0->screen->base.channel, RING_3D(VERTEX_END_GL), 0);
328
329 prim |= NVC0_3D_VERTEX_BEGIN_GL_INSTANCE_NEXT;
330 }
331 }
332
333 #endif