src/gallium/drivers/nvc0/nvc0_resource.h

   1
   2 #ifndef __NVC0_RESOURCE_H__
   3 #define __NVC0_RESOURCE_H__
   4
   5 #include "util/u_transfer.h"
   6 #include "util/u_double_list.h"
   7 #define NOUVEAU_NVC0
   8 #include "nouveau/nouveau_winsys.h"
   9 #undef NOUVEAU_NVC0
  10
  11 #include "nvc0_fence.h"
  12
  13 struct pipe_resource;
  14 struct nouveau_bo;
  15
  16 /* Resources, if mapped into the GPU's address space, are guaranteed to
  17  * have constant virtual addresses.
  18  * The address of a resource will lie within the nouveau_bo referenced,
  19  * and this bo should be added to the memory manager's validation list.
  20  */
  21 struct nvc0_resource {
  22    struct pipe_resource base;
  23    const struct u_resource_vtbl *vtbl;
  24    uint64_t address;
  25
  26    uint8_t *data;
  27    struct nouveau_bo *bo;
  28    uint32_t offset;
  29
  30    uint8_t status;
  31    uint8_t domain;
  32
  33    int16_t score; /* low if mapped very often, if high can move to VRAM */
  34
  35    struct nvc0_fence *fence;
  36    struct nvc0_fence *fence_wr;
  37
  38    struct nvc0_mm_allocation *mm;
  39 };
  40
  41 /* XXX: wait for fence (atm only using this for vertex push) */
  42 static INLINE void *
  43 nvc0_resource_map_offset(struct nvc0_resource *res, uint32_t offset,
  44                          uint32_t flags)
  45 {
  46    void *map;
  47
  48    if (res->domain == 0)
  49       return res->data + offset;
  50
  51    if (nouveau_bo_map_range(res->bo, res->offset + offset,
  52                             res->base.width0, flags | NOUVEAU_BO_NOSYNC))
  53       return NULL;
  54
  55    /* With suballocation, the same bo can be mapped several times, so unmap
  56     * immediately. Maps are guaranteed to persist. */
  57    map = res->bo->map;
  58    nouveau_bo_unmap(res->bo);
  59    return map;
  60 }
  61
  62 static INLINE void
  63 nvc0_resource_unmap(struct nvc0_resource *res)
  64 {
  65    if (res->domain != 0 && 0)
  66       nouveau_bo_unmap(res->bo);
  67 }
  68
  69 #define NVC0_TILE_DIM_SHIFT(m, d) (((m) >> (d * 4)) & 0xf)
  70
  71 #define NVC0_TILE_PITCH(m)  (64 << NVC0_TILE_DIM_SHIFT(m, 0))
  72 #define NVC0_TILE_HEIGHT(m) ( 8 << NVC0_TILE_DIM_SHIFT(m, 1))
  73 #define NVC0_TILE_DEPTH(m)  ( 1 << NVC0_TILE_DIM_SHIFT(m, 2))
  74
  75 #define NVC0_TILE_SIZE_2D(m) (((64 * 8) <<                     \
  76                                NVC0_TILE_DIM_SHIFT(m, 0)) <<   \
  77                               NVC0_TILE_DIM_SHIFT(m, 1))
  78
  79 #define NVC0_TILE_SIZE(m) (NVC0_TILE_SIZE_2D(m) << NVC0_TILE_DIM_SHIFT(m, 2))
  80
  81 struct nvc0_miptree_level {
  82    uint32_t offset;
  83    uint32_t pitch;
  84    uint32_t tile_mode;
  85 };
  86
  87 #define NVC0_MAX_TEXTURE_LEVELS 16
  88
  89 struct nvc0_miptree {
  90    struct nvc0_resource base;
  91    struct nvc0_miptree_level level[NVC0_MAX_TEXTURE_LEVELS];
  92    uint32_t total_size;
  93    uint32_t layer_stride;
  94    boolean layout_3d; /* TRUE if layer count varies with mip level */
  95 };
  96
  97 static INLINE struct nvc0_miptree *
  98 nvc0_miptree(struct pipe_resource *pt)
  99 {
 100    return (struct nvc0_miptree *)pt;
 101 }
 102
 103 static INLINE struct nvc0_resource *
 104 nvc0_resource(struct pipe_resource *resource)
 105 {
 106    return (struct nvc0_resource *)resource;
 107 }
 108
 109 /* is resource mapped into the GPU's address space (i.e. VRAM or GART) ? */
 110 static INLINE boolean
 111 nvc0_resource_mapped_by_gpu(struct pipe_resource *resource)
 112 {
 113    return nvc0_resource(resource)->domain != 0;
 114 }
 115
 116 void
 117 nvc0_init_resource_functions(struct pipe_context *pcontext);
 118
 119 void
 120 nvc0_screen_init_resource_functions(struct pipe_screen *pscreen);
 121
 122 /* Internal functions:
 123  */
 124 struct pipe_resource *
 125 nvc0_miptree_create(struct pipe_screen *pscreen,
 126                     const struct pipe_resource *tmp);
 127
 128 struct pipe_resource *
 129 nvc0_miptree_from_handle(struct pipe_screen *pscreen,
 130                          const struct pipe_resource *template,
 131                          struct winsys_handle *whandle);
 132
 133 struct pipe_resource *
 134 nvc0_buffer_create(struct pipe_screen *pscreen,
 135                    const struct pipe_resource *templ);
 136
 137 struct pipe_resource *
 138 nvc0_user_buffer_create(struct pipe_screen *screen,
 139                         void *ptr,
 140                         unsigned bytes,
 141                         unsigned usage);
 142
 143
 144 struct pipe_surface *
 145 nvc0_miptree_surface_new(struct pipe_context *,
 146                          struct pipe_resource *,
 147                          const struct pipe_surface *templ);
 148
 149 void
 150 nvc0_miptree_surface_del(struct pipe_context *, struct pipe_surface *);
 151
 152 struct nvc0_context;
 153
 154 boolean
 155 nvc0_buffer_migrate(struct nvc0_context *,
 156                     struct nvc0_resource *, unsigned domain);
 157
 158 boolean
 159 nvc0_migrate_vertices(struct nvc0_resource *buf, unsigned base, unsigned size);
 160
 161 #endif