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79c3e36b8f93890faae0971190aff81597a5eb7c
[mesa.git] / src / gallium / drivers / nvc0 / nvc0_screen.c
1 /*
2 * Copyright 2010 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include "util/u_format.h"
24 #include "util/u_format_s3tc.h"
25 #include "pipe/p_screen.h"
26
27 #include "vl/vl_decoder.h"
28 #include "vl/vl_video_buffer.h"
29
30 #include "nvc0_context.h"
31 #include "nvc0_screen.h"
32
33 #include "nouveau/nv_object.xml.h"
34 #include "nvc0_graph_macros.h"
35
36 static boolean
37 nvc0_screen_is_format_supported(struct pipe_screen *pscreen,
38 enum pipe_format format,
39 enum pipe_texture_target target,
40 unsigned sample_count,
41 unsigned bindings)
42 {
43 if (!(0x117 & (1 << sample_count))) /* 0, 1, 2, 4 or 8 */
44 return FALSE;
45
46 if (!util_format_is_supported(format, bindings))
47 return FALSE;
48
49 switch (format) {
50 case PIPE_FORMAT_R8G8B8A8_UNORM:
51 case PIPE_FORMAT_R8G8B8X8_UNORM:
52 /* HACK: GL requires equal formats for MS resolve and window is BGRA */
53 if (bindings & PIPE_BIND_RENDER_TARGET)
54 return FALSE;
55 default:
56 break;
57 }
58
59 /* transfers & shared are always supported */
60 bindings &= ~(PIPE_BIND_TRANSFER_READ |
61 PIPE_BIND_TRANSFER_WRITE |
62 PIPE_BIND_SHARED);
63
64 return (nvc0_format_table[format].usage & bindings) == bindings;
65 }
66
67 static int
68 nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
69 {
70 switch (param) {
71 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
72 return 64;
73 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
74 return 13;
75 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
76 return 10;
77 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
78 return 13;
79 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
80 return 8192;
81 case PIPE_CAP_MIN_TEXEL_OFFSET:
82 return -8;
83 case PIPE_CAP_MAX_TEXEL_OFFSET:
84 return 7;
85 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
86 case PIPE_CAP_TEXTURE_SWIZZLE:
87 case PIPE_CAP_TEXTURE_SHADOW_MAP:
88 case PIPE_CAP_NPOT_TEXTURES:
89 case PIPE_CAP_ANISOTROPIC_FILTER:
90 case PIPE_CAP_SEAMLESS_CUBE_MAP:
91 return 1;
92 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
93 return 0;
94 case PIPE_CAP_TWO_SIDED_STENCIL:
95 case PIPE_CAP_DEPTH_CLAMP:
96 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
97 case PIPE_CAP_POINT_SPRITE:
98 return 1;
99 case PIPE_CAP_SM3:
100 return 1;
101 case PIPE_CAP_MAX_RENDER_TARGETS:
102 return 8;
103 case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
104 return 1;
105 case PIPE_CAP_TIMER_QUERY:
106 case PIPE_CAP_OCCLUSION_QUERY:
107 return 1;
108 case PIPE_CAP_STREAM_OUTPUT:
109 return 0;
110 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
111 case PIPE_CAP_INDEP_BLEND_ENABLE:
112 case PIPE_CAP_INDEP_BLEND_FUNC:
113 return 1;
114 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
115 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
116 return 1;
117 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
118 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
119 return 0;
120 case PIPE_CAP_SHADER_STENCIL_EXPORT:
121 return 0;
122 case PIPE_CAP_PRIMITIVE_RESTART:
123 case PIPE_CAP_TGSI_INSTANCEID:
124 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
125 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
126 case PIPE_CAP_CONDITIONAL_RENDER:
127 case PIPE_CAP_TEXTURE_BARRIER:
128 return 1;
129 default:
130 NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
131 return 0;
132 }
133 }
134
135 static int
136 nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
137 enum pipe_shader_cap param)
138 {
139 switch (shader) {
140 case PIPE_SHADER_VERTEX:
141 /*
142 case PIPE_SHADER_TESSELLATION_CONTROL:
143 case PIPE_SHADER_TESSELLATION_EVALUATION:
144 */
145 case PIPE_SHADER_GEOMETRY:
146 case PIPE_SHADER_FRAGMENT:
147 break;
148 default:
149 return 0;
150 }
151
152 switch (param) {
153 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
154 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
155 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
156 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
157 return 16384;
158 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
159 return 16;
160 case PIPE_SHADER_CAP_MAX_INPUTS:
161 if (shader == PIPE_SHADER_VERTEX)
162 return 32;
163 return 0x300 / 16;
164 case PIPE_SHADER_CAP_MAX_CONSTS:
165 return 65536 / 16;
166 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
167 return 14;
168 case PIPE_SHADER_CAP_MAX_ADDRS:
169 return 1;
170 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
171 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
172 return shader != PIPE_SHADER_FRAGMENT;
173 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
174 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
175 return 1;
176 case PIPE_SHADER_CAP_MAX_PREDS:
177 return 0;
178 case PIPE_SHADER_CAP_MAX_TEMPS:
179 return NVC0_CAP_MAX_PROGRAM_TEMPS;
180 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
181 return 1;
182 case PIPE_SHADER_CAP_SUBROUTINES:
183 return 1; /* but inlining everything, we need function declarations */
184 case PIPE_SHADER_CAP_INTEGERS:
185 return 1;
186 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
187 return 32;
188 default:
189 NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param);
190 return 0;
191 }
192 }
193
194 static float
195 nvc0_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
196 {
197 switch (param) {
198 case PIPE_CAPF_MAX_LINE_WIDTH:
199 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
200 return 10.0f;
201 case PIPE_CAPF_MAX_POINT_WIDTH:
202 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
203 return 64.0f;
204 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
205 return 16.0f;
206 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
207 return 4.0f;
208 default:
209 NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
210 return 0.0f;
211 }
212 }
213
214 static void
215 nvc0_screen_destroy(struct pipe_screen *pscreen)
216 {
217 struct nvc0_screen *screen = nvc0_screen(pscreen);
218
219 if (screen->base.fence.current) {
220 nouveau_fence_wait(screen->base.fence.current);
221 nouveau_fence_ref(NULL, &screen->base.fence.current);
222 }
223 if (screen->base.channel)
224 screen->base.channel->user_private = NULL;
225
226 if (screen->blitctx)
227 FREE(screen->blitctx);
228
229 nouveau_bo_ref(NULL, &screen->text);
230 nouveau_bo_ref(NULL, &screen->tls);
231 nouveau_bo_ref(NULL, &screen->txc);
232 nouveau_bo_ref(NULL, &screen->fence.bo);
233 nouveau_bo_ref(NULL, &screen->vfetch_cache);
234
235 nouveau_resource_destroy(&screen->lib_code);
236 nouveau_resource_destroy(&screen->text_heap);
237
238 if (screen->tic.entries)
239 FREE(screen->tic.entries);
240
241 nouveau_mm_destroy(screen->mm_VRAM_fe0);
242
243 nouveau_grobj_free(&screen->fermi);
244 nouveau_grobj_free(&screen->eng2d);
245 nouveau_grobj_free(&screen->m2mf);
246
247 nouveau_screen_fini(&screen->base);
248
249 FREE(screen);
250 }
251
252 static int
253 nvc0_graph_set_macro(struct nvc0_screen *screen, uint32_t m, unsigned pos,
254 unsigned size, const uint32_t *data)
255 {
256 struct nouveau_channel *chan = screen->base.channel;
257
258 size /= 4;
259
260 BEGIN_RING(chan, RING_3D_(NVC0_GRAPH_MACRO_ID), 2);
261 OUT_RING (chan, (m - 0x3800) / 8);
262 OUT_RING (chan, pos);
263 BEGIN_RING_1I(chan, RING_3D_(NVC0_GRAPH_MACRO_UPLOAD_POS), size + 1);
264 OUT_RING (chan, pos);
265 OUT_RINGp (chan, data, size);
266
267 return pos + size;
268 }
269
270 static void
271 nvc0_magic_3d_init(struct nouveau_channel *chan)
272 {
273 BEGIN_RING(chan, RING_3D_(0x10cc), 1);
274 OUT_RING (chan, 0xff);
275 BEGIN_RING(chan, RING_3D_(0x10e0), 2);
276 OUT_RING(chan, 0xff);
277 OUT_RING(chan, 0xff);
278 BEGIN_RING(chan, RING_3D_(0x10ec), 2);
279 OUT_RING(chan, 0xff);
280 OUT_RING(chan, 0xff);
281 BEGIN_RING(chan, RING_3D_(0x074c), 1);
282 OUT_RING (chan, 0x3f);
283
284 BEGIN_RING(chan, RING_3D_(0x16a8), 1);
285 OUT_RING (chan, (3 << 16) | 3);
286 BEGIN_RING(chan, RING_3D_(0x1794), 1);
287 OUT_RING (chan, (2 << 16) | 2);
288 BEGIN_RING(chan, RING_3D_(0x0de8), 1);
289 OUT_RING (chan, 1);
290
291 #if 0 /* software method */
292 BEGIN_RING(chan, RING_3D_(0x1528), 1); /* MP poke */
293 OUT_RING (chan, 0);
294 #endif
295
296 BEGIN_RING(chan, RING_3D_(0x12ac), 1);
297 OUT_RING (chan, 0);
298 BEGIN_RING(chan, RING_3D_(0x0218), 1);
299 OUT_RING (chan, 0x10);
300 BEGIN_RING(chan, RING_3D_(0x10fc), 1);
301 OUT_RING (chan, 0x10);
302 BEGIN_RING(chan, RING_3D_(0x1290), 1);
303 OUT_RING (chan, 0x10);
304 BEGIN_RING(chan, RING_3D_(0x12d8), 2);
305 OUT_RING (chan, 0x10);
306 OUT_RING (chan, 0x10);
307 BEGIN_RING(chan, RING_3D_(0x06d4), 1);
308 OUT_RING (chan, 8);
309 BEGIN_RING(chan, RING_3D_(0x1140), 1);
310 OUT_RING (chan, 0x10);
311 BEGIN_RING(chan, RING_3D_(0x1610), 1);
312 OUT_RING (chan, 0xe);
313
314 BEGIN_RING(chan, RING_3D_(0x164c), 1);
315 OUT_RING (chan, 1 << 12);
316 BEGIN_RING(chan, RING_3D_(0x151c), 1);
317 OUT_RING (chan, 1);
318 BEGIN_RING(chan, RING_3D_(0x030c), 1);
319 OUT_RING (chan, 0);
320 BEGIN_RING(chan, RING_3D_(0x0300), 1);
321 OUT_RING (chan, 3);
322 #if 0 /* software method */
323 BEGIN_RING(chan, RING_3D_(0x1280), 1); /* PGRAPH poke */
324 OUT_RING (chan, 0);
325 #endif
326 BEGIN_RING(chan, RING_3D_(0x02d0), 1);
327 OUT_RING (chan, 0x1f40);
328 BEGIN_RING(chan, RING_3D_(0x00fdc), 1);
329 OUT_RING (chan, 1);
330 BEGIN_RING(chan, RING_3D_(0x19c0), 1);
331 OUT_RING (chan, 1);
332 BEGIN_RING(chan, RING_3D_(0x075c), 1);
333 OUT_RING (chan, 3);
334 }
335
336 static void
337 nvc0_screen_fence_emit(struct pipe_screen *pscreen, u32 *sequence)
338 {
339 struct nvc0_screen *screen = nvc0_screen(pscreen);
340 struct nouveau_channel *chan = screen->base.channel;
341
342 MARK_RING (chan, 5, 2);
343
344 /* we need to do it after possible flush in MARK_RING */
345 *sequence = ++screen->base.fence.sequence;
346
347 BEGIN_RING(chan, RING_3D(QUERY_ADDRESS_HIGH), 4);
348 OUT_RELOCh(chan, screen->fence.bo, 0, NOUVEAU_BO_WR);
349 OUT_RELOCl(chan, screen->fence.bo, 0, NOUVEAU_BO_WR);
350 OUT_RING (chan, *sequence);
351 OUT_RING (chan, NVC0_3D_QUERY_GET_FENCE | NVC0_3D_QUERY_GET_SHORT |
352 (0xf << NVC0_3D_QUERY_GET_UNIT__SHIFT));
353 }
354
355 static u32
356 nvc0_screen_fence_update(struct pipe_screen *pscreen)
357 {
358 struct nvc0_screen *screen = nvc0_screen(pscreen);
359 return screen->fence.map[0];
360 }
361
362 #define FAIL_SCREEN_INIT(str, err) \
363 do { \
364 NOUVEAU_ERR(str, err); \
365 nvc0_screen_destroy(pscreen); \
366 return NULL; \
367 } while(0)
368
369 struct pipe_screen *
370 nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
371 {
372 struct nvc0_screen *screen;
373 struct nouveau_channel *chan;
374 struct pipe_screen *pscreen;
375 int ret;
376 unsigned i;
377
378 screen = CALLOC_STRUCT(nvc0_screen);
379 if (!screen)
380 return NULL;
381 pscreen = &screen->base.base;
382
383 screen->base.sysmem_bindings = PIPE_BIND_CONSTANT_BUFFER;
384
385 ret = nouveau_screen_init(&screen->base, dev);
386 if (ret) {
387 nvc0_screen_destroy(pscreen);
388 return NULL;
389 }
390 chan = screen->base.channel;
391 chan->user_private = screen;
392
393 pscreen->winsys = ws;
394 pscreen->destroy = nvc0_screen_destroy;
395 pscreen->context_create = nvc0_create;
396 pscreen->is_format_supported = nvc0_screen_is_format_supported;
397 pscreen->get_param = nvc0_screen_get_param;
398 pscreen->get_shader_param = nvc0_screen_get_shader_param;
399 pscreen->get_paramf = nvc0_screen_get_paramf;
400
401 nvc0_screen_init_resource_functions(pscreen);
402
403 nouveau_screen_init_vdec(&screen->base);
404
405 ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, 4096,
406 &screen->fence.bo);
407 if (ret)
408 goto fail;
409 nouveau_bo_map(screen->fence.bo, NOUVEAU_BO_RDWR);
410 screen->fence.map = screen->fence.bo->map;
411 nouveau_bo_unmap(screen->fence.bo);
412 screen->base.fence.emit = nvc0_screen_fence_emit;
413 screen->base.fence.update = nvc0_screen_fence_update;
414
415 for (i = 0; i < NVC0_SCRATCH_NR_BUFFERS; ++i) {
416 ret = nouveau_bo_new(dev, NOUVEAU_BO_GART, 0, NVC0_SCRATCH_SIZE,
417 &screen->scratch.bo[i]);
418 if (ret)
419 goto fail;
420 }
421
422 ret = nouveau_grobj_alloc(chan, 0xbeef9039, NVC0_M2MF, &screen->m2mf);
423 if (ret)
424 FAIL_SCREEN_INIT("Error allocating PGRAPH context for M2MF: %d\n", ret);
425
426 BIND_RING (chan, screen->m2mf, NVC0_SUBCH_MF);
427 BEGIN_RING(chan, RING_MF(NOTIFY_ADDRESS_HIGH), 3);
428 OUT_RELOCh(chan, screen->fence.bo, 16, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
429 OUT_RELOCl(chan, screen->fence.bo, 16, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
430 OUT_RING (chan, 0);
431
432 ret = nouveau_grobj_alloc(chan, 0xbeef902d, NVC0_2D, &screen->eng2d);
433 if (ret)
434 FAIL_SCREEN_INIT("Error allocating PGRAPH context for 2D: %d\n", ret);
435
436 BIND_RING (chan, screen->eng2d, NVC0_SUBCH_2D);
437 BEGIN_RING(chan, RING_2D(OPERATION), 1);
438 OUT_RING (chan, NVC0_2D_OPERATION_SRCCOPY);
439 BEGIN_RING(chan, RING_2D(CLIP_ENABLE), 1);
440 OUT_RING (chan, 0);
441 BEGIN_RING(chan, RING_2D(COLOR_KEY_ENABLE), 1);
442 OUT_RING (chan, 0);
443 BEGIN_RING(chan, RING_2D_(0x0884), 1);
444 OUT_RING (chan, 0x3f);
445 BEGIN_RING(chan, RING_2D_(0x0888), 1);
446 OUT_RING (chan, 1);
447
448 ret = nouveau_grobj_alloc(chan, 0xbeef9097, NVC0_3D, &screen->fermi);
449 if (ret)
450 FAIL_SCREEN_INIT("Error allocating PGRAPH context for 3D: %d\n", ret);
451
452 BIND_RING (chan, screen->fermi, NVC0_SUBCH_3D);
453 BEGIN_RING(chan, RING_3D(NOTIFY_ADDRESS_HIGH), 3);
454 OUT_RELOCh(chan, screen->fence.bo, 32, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
455 OUT_RELOCl(chan, screen->fence.bo, 32, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
456 OUT_RING (chan, 0);
457
458 BEGIN_RING(chan, RING_3D(COND_MODE), 1);
459 OUT_RING (chan, NVC0_3D_COND_MODE_ALWAYS);
460
461 BEGIN_RING(chan, RING_3D(RT_CONTROL), 1);
462 OUT_RING (chan, 1);
463
464 BEGIN_RING(chan, RING_3D(CSAA_ENABLE), 1);
465 OUT_RING (chan, 0);
466 BEGIN_RING(chan, RING_3D(MULTISAMPLE_ENABLE), 1);
467 OUT_RING (chan, 0);
468 BEGIN_RING(chan, RING_3D(MULTISAMPLE_MODE), 1);
469 OUT_RING (chan, NVC0_3D_MULTISAMPLE_MODE_MS1);
470 BEGIN_RING(chan, RING_3D(MULTISAMPLE_CTRL), 1);
471 OUT_RING (chan, 0);
472 BEGIN_RING(chan, RING_3D(LINE_WIDTH_SEPARATE), 1);
473 OUT_RING (chan, 1);
474 BEGIN_RING(chan, RING_3D(LINE_LAST_PIXEL), 1);
475 OUT_RING (chan, 0);
476 BEGIN_RING(chan, RING_3D(BLEND_SEPARATE_ALPHA), 1);
477 OUT_RING (chan, 1);
478 BEGIN_RING(chan, RING_3D(BLEND_ENABLE_COMMON), 1);
479 OUT_RING (chan, 0);
480 BEGIN_RING(chan, RING_3D(TEX_MISC), 1);
481 OUT_RING (chan, NVC0_3D_TEX_MISC_SEAMLESS_CUBE_MAP);
482
483 nvc0_magic_3d_init(chan);
484
485 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20, &screen->text);
486 if (ret)
487 goto fail;
488
489 /* XXX: getting a page fault at the end of the code buffer every few
490 * launches, don't use the last 256 bytes to work around them - prefetch ?
491 */
492 nouveau_resource_init(&screen->text_heap, 0, (1 << 20) - 0x100);
493
494 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 12, 6 << 16,
495 &screen->uniforms);
496 if (ret)
497 goto fail;
498
499 /* auxiliary constants (6 user clip planes, base instance id) */
500 BEGIN_RING(chan, RING_3D(CB_SIZE), 3);
501 OUT_RING (chan, 256);
502 OUT_RELOCh(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
503 OUT_RELOCl(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
504 for (i = 0; i < 5; ++i) {
505 BEGIN_RING(chan, RING_3D(CB_BIND(i)), 1);
506 OUT_RING (chan, (15 << 4) | 1);
507 }
508
509 screen->tls_size = (16 * 32) * (NVC0_CAP_MAX_PROGRAM_TEMPS * 16);
510 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17,
511 screen->tls_size, &screen->tls);
512 if (ret)
513 goto fail;
514
515 BEGIN_RING(chan, RING_3D(CODE_ADDRESS_HIGH), 2);
516 OUT_RELOCh(chan, screen->text, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
517 OUT_RELOCl(chan, screen->text, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
518 BEGIN_RING(chan, RING_3D(LOCAL_ADDRESS_HIGH), 4);
519 OUT_RELOCh(chan, screen->tls, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
520 OUT_RELOCl(chan, screen->tls, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
521 OUT_RING (chan, screen->tls_size >> 32);
522 OUT_RING (chan, screen->tls_size);
523 BEGIN_RING(chan, RING_3D_(0x07a0), 1);
524 OUT_RING (chan, 0);
525 BEGIN_RING(chan, RING_3D(LOCAL_BASE), 1);
526 OUT_RING (chan, 0);
527
528 for (i = 0; i < 5; ++i) {
529 BEGIN_RING(chan, RING_3D(TEX_LIMITS(i)), 1);
530 OUT_RING (chan, 0x54);
531 }
532 BEGIN_RING(chan, RING_3D(LINKED_TSC), 1);
533 OUT_RING (chan, 0);
534
535 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20,
536 &screen->vfetch_cache);
537 if (ret)
538 goto fail;
539
540 BEGIN_RING(chan, RING_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3);
541 OUT_RELOCh(chan, screen->vfetch_cache, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
542 OUT_RELOCl(chan, screen->vfetch_cache, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
543 OUT_RING (chan, 3);
544
545 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 17, &screen->txc);
546 if (ret)
547 goto fail;
548
549 BEGIN_RING(chan, RING_3D(TIC_ADDRESS_HIGH), 3);
550 OUT_RELOCh(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
551 OUT_RELOCl(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
552 OUT_RING (chan, NVC0_TIC_MAX_ENTRIES - 1);
553
554 BEGIN_RING(chan, RING_3D(TSC_ADDRESS_HIGH), 3);
555 OUT_RELOCh(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
556 OUT_RELOCl(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
557 OUT_RING (chan, NVC0_TSC_MAX_ENTRIES - 1);
558
559 BEGIN_RING(chan, RING_3D(SCREEN_Y_CONTROL), 1);
560 OUT_RING (chan, 0);
561 BEGIN_RING(chan, RING_3D(WINDOW_OFFSET_X), 2);
562 OUT_RING (chan, 0);
563 OUT_RING (chan, 0);
564 BEGIN_RING(chan, RING_3D_(0x1590), 1); /* deactivate ZCULL */
565 OUT_RING (chan, 0x3f);
566
567 BEGIN_RING(chan, RING_3D(CLIP_RECTS_MODE), 1);
568 OUT_RING (chan, NVC0_3D_CLIP_RECTS_MODE_INSIDE_ANY);
569 BEGIN_RING(chan, RING_3D(CLIP_RECT_HORIZ(0)), 8 * 2);
570 for (i = 0; i < 8 * 2; ++i)
571 OUT_RING(chan, 0);
572 BEGIN_RING(chan, RING_3D(CLIP_RECTS_EN), 1);
573 OUT_RING (chan, 0);
574 BEGIN_RING(chan, RING_3D(CLIPID_ENABLE), 1);
575 OUT_RING (chan, 0);
576
577 /* neither scissors, viewport nor stencil mask should affect clears */
578 BEGIN_RING(chan, RING_3D(CLEAR_FLAGS), 1);
579 OUT_RING (chan, 0);
580
581 BEGIN_RING(chan, RING_3D(VIEWPORT_TRANSFORM_EN), 1);
582 OUT_RING (chan, 1);
583 BEGIN_RING(chan, RING_3D(DEPTH_RANGE_NEAR(0)), 2);
584 OUT_RINGf (chan, 0.0f);
585 OUT_RINGf (chan, 1.0f);
586 BEGIN_RING(chan, RING_3D(VIEW_VOLUME_CLIP_CTRL), 1);
587 OUT_RING (chan, NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1);
588
589 /* We use scissors instead of exact view volume clipping,
590 * so they're always enabled.
591 */
592 BEGIN_RING(chan, RING_3D(SCISSOR_ENABLE(0)), 3);
593 OUT_RING (chan, 1);
594 OUT_RING (chan, 8192 << 16);
595 OUT_RING (chan, 8192 << 16);
596
597 #define MK_MACRO(m, n) i = nvc0_graph_set_macro(screen, m, i, sizeof(n), n);
598
599 i = 0;
600 MK_MACRO(NVC0_3D_BLEND_ENABLES, nvc0_9097_blend_enables);
601 MK_MACRO(NVC0_3D_VERTEX_ARRAY_SELECT, nvc0_9097_vertex_array_select);
602 MK_MACRO(NVC0_3D_TEP_SELECT, nvc0_9097_tep_select);
603 MK_MACRO(NVC0_3D_GP_SELECT, nvc0_9097_gp_select);
604 MK_MACRO(NVC0_3D_POLYGON_MODE_FRONT, nvc0_9097_poly_mode_front);
605 MK_MACRO(NVC0_3D_POLYGON_MODE_BACK, nvc0_9097_poly_mode_back);
606
607 BEGIN_RING(chan, RING_3D(RASTERIZE_ENABLE), 1);
608 OUT_RING (chan, 1);
609 BEGIN_RING(chan, RING_3D(RT_SEPARATE_FRAG_DATA), 1);
610 OUT_RING (chan, 1);
611 BEGIN_RING(chan, RING_3D(GP_SELECT), 1);
612 OUT_RING (chan, 0x40);
613 BEGIN_RING(chan, RING_3D(LAYER), 1);
614 OUT_RING (chan, 0);
615 BEGIN_RING(chan, RING_3D(TEP_SELECT), 1);
616 OUT_RING (chan, 0x30);
617 BEGIN_RING(chan, RING_3D(PATCH_VERTICES), 1);
618 OUT_RING (chan, 3);
619 BEGIN_RING(chan, RING_3D(SP_SELECT(2)), 1);
620 OUT_RING (chan, 0x20);
621 BEGIN_RING(chan, RING_3D(SP_SELECT(0)), 1);
622 OUT_RING (chan, 0x00);
623
624 BEGIN_RING(chan, RING_3D(POINT_COORD_REPLACE), 1);
625 OUT_RING (chan, 0);
626 BEGIN_RING(chan, RING_3D(POINT_RASTER_RULES), 1);
627 OUT_RING (chan, NVC0_3D_POINT_RASTER_RULES_OGL);
628
629 BEGIN_RING(chan, RING_3D(EDGEFLAG_ENABLE), 1);
630 OUT_RING (chan, 1);
631
632 BEGIN_RING(chan, RING_3D(VERTEX_RUNOUT_ADDRESS_HIGH), 2);
633 OUT_RING (chan, 0xab);
634 OUT_RING (chan, 0x00000000);
635
636 FIRE_RING (chan);
637
638 screen->tic.entries = CALLOC(4096, sizeof(void *));
639 screen->tsc.entries = screen->tic.entries + 2048;
640
641 screen->mm_VRAM_fe0 = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, 0xfe0);
642
643 if (!nvc0_blitctx_create(screen))
644 goto fail;
645
646 nouveau_fence_new(&screen->base, &screen->base.fence.current, FALSE);
647
648 return pscreen;
649
650 fail:
651 nvc0_screen_destroy(pscreen);
652 return NULL;
653 }
654
655 void
656 nvc0_screen_make_buffers_resident(struct nvc0_screen *screen)
657 {
658 struct nouveau_channel *chan = screen->base.channel;
659
660 const unsigned flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD;
661
662 MARK_RING(chan, 0, 5);
663 nouveau_bo_validate(chan, screen->text, flags);
664 nouveau_bo_validate(chan, screen->uniforms, flags);
665 nouveau_bo_validate(chan, screen->txc, flags);
666 nouveau_bo_validate(chan, screen->vfetch_cache, flags);
667
668 if (screen->cur_ctx && screen->cur_ctx->state.tls_required)
669 nouveau_bo_validate(chan, screen->tls, flags);
670 }
671
672 int
673 nvc0_screen_tic_alloc(struct nvc0_screen *screen, void *entry)
674 {
675 int i = screen->tic.next;
676
677 while (screen->tic.lock[i / 32] & (1 << (i % 32)))
678 i = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
679
680 screen->tic.next = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
681
682 if (screen->tic.entries[i])
683 nv50_tic_entry(screen->tic.entries[i])->id = -1;
684
685 screen->tic.entries[i] = entry;
686 return i;
687 }
688
689 int
690 nvc0_screen_tsc_alloc(struct nvc0_screen *screen, void *entry)
691 {
692 int i = screen->tsc.next;
693
694 while (screen->tsc.lock[i / 32] & (1 << (i % 32)))
695 i = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
696
697 screen->tsc.next = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
698
699 if (screen->tsc.entries[i])
700 nv50_tsc_entry(screen->tsc.entries[i])->id = -1;
701
702 screen->tsc.entries[i] = entry;
703 return i;
704 }