2 * Copyright 2010 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "util/u_format.h"
24 #include "util/u_format_s3tc.h"
25 #include "pipe/p_screen.h"
27 #include "vl/vl_decoder.h"
28 #include "vl/vl_video_buffer.h"
30 #include "nvc0_context.h"
31 #include "nvc0_screen.h"
33 #include "nouveau/nv_object.xml.h"
34 #include "nvc0_graph_macros.h"
37 nvc0_screen_is_format_supported(struct pipe_screen
*pscreen
,
38 enum pipe_format format
,
39 enum pipe_texture_target target
,
40 unsigned sample_count
,
43 if (!(0x117 & (1 << sample_count
))) /* 0, 1, 2, 4 or 8 */
46 if (!util_format_is_supported(format
, bindings
))
50 case PIPE_FORMAT_R8G8B8A8_UNORM
:
51 case PIPE_FORMAT_R8G8B8X8_UNORM
:
52 /* HACK: GL requires equal formats for MS resolve and window is BGRA */
53 if (bindings
& PIPE_BIND_RENDER_TARGET
)
59 /* transfers & shared are always supported */
60 bindings
&= ~(PIPE_BIND_TRANSFER_READ
|
61 PIPE_BIND_TRANSFER_WRITE
|
64 return (nvc0_format_table
[format
].usage
& bindings
) == bindings
;
68 nvc0_screen_get_param(struct pipe_screen
*pscreen
, enum pipe_cap param
)
71 case PIPE_CAP_MAX_COMBINED_SAMPLERS
:
73 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
75 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
77 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
79 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
:
81 case PIPE_CAP_MIN_TEXEL_OFFSET
:
83 case PIPE_CAP_MAX_TEXEL_OFFSET
:
85 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
86 case PIPE_CAP_TEXTURE_SWIZZLE
:
87 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
88 case PIPE_CAP_NPOT_TEXTURES
:
89 case PIPE_CAP_ANISOTROPIC_FILTER
:
90 case PIPE_CAP_SEAMLESS_CUBE_MAP
:
92 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE
:
94 case PIPE_CAP_TWO_SIDED_STENCIL
:
95 case PIPE_CAP_DEPTH_CLAMP
:
96 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE
:
97 case PIPE_CAP_POINT_SPRITE
:
102 case PIPE_CAP_MAX_RENDER_TARGETS
:
104 case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL
:
106 case PIPE_CAP_TIMER_QUERY
:
107 case PIPE_CAP_OCCLUSION_QUERY
:
109 case PIPE_CAP_STREAM_OUTPUT
:
111 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
112 case PIPE_CAP_INDEP_BLEND_ENABLE
:
113 case PIPE_CAP_INDEP_BLEND_FUNC
:
115 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
116 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
118 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
119 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
121 case PIPE_CAP_SHADER_STENCIL_EXPORT
:
123 case PIPE_CAP_PRIMITIVE_RESTART
:
124 case PIPE_CAP_TGSI_INSTANCEID
:
125 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
126 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
127 case PIPE_CAP_CONDITIONAL_RENDER
:
130 NOUVEAU_ERR("unknown PIPE_CAP %d\n", param
);
136 nvc0_screen_get_shader_param(struct pipe_screen
*pscreen
, unsigned shader
,
137 enum pipe_shader_cap param
)
140 case PIPE_SHADER_VERTEX
:
142 case PIPE_SHADER_TESSELLATION_CONTROL:
143 case PIPE_SHADER_TESSELLATION_EVALUATION:
145 case PIPE_SHADER_GEOMETRY
:
146 case PIPE_SHADER_FRAGMENT
:
153 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
154 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
155 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
156 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
158 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
160 case PIPE_SHADER_CAP_MAX_INPUTS
:
161 if (shader
== PIPE_SHADER_VERTEX
)
164 case PIPE_SHADER_CAP_MAX_CONSTS
:
166 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
168 case PIPE_SHADER_CAP_MAX_ADDRS
:
170 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
171 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
172 return shader
!= PIPE_SHADER_FRAGMENT
;
173 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
174 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
176 case PIPE_SHADER_CAP_MAX_PREDS
:
178 case PIPE_SHADER_CAP_MAX_TEMPS
:
179 return NVC0_CAP_MAX_PROGRAM_TEMPS
;
180 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
182 case PIPE_SHADER_CAP_SUBROUTINES
:
183 return 1; /* but inlining everything, we need function declarations */
184 case PIPE_SHADER_CAP_INTEGERS
:
186 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
189 NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param
);
195 nvc0_screen_get_paramf(struct pipe_screen
*pscreen
, enum pipe_cap param
)
198 case PIPE_CAP_MAX_LINE_WIDTH
:
199 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
201 case PIPE_CAP_MAX_POINT_WIDTH
:
202 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
204 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
206 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
209 NOUVEAU_ERR("unknown PIPE_CAP %d\n", param
);
215 nvc0_screen_destroy(struct pipe_screen
*pscreen
)
217 struct nvc0_screen
*screen
= nvc0_screen(pscreen
);
219 if (screen
->base
.fence
.current
) {
220 nouveau_fence_wait(screen
->base
.fence
.current
);
221 nouveau_fence_ref(NULL
, &screen
->base
.fence
.current
);
223 screen
->base
.channel
->user_private
= NULL
;
226 FREE(screen
->blitctx
);
228 nouveau_bo_ref(NULL
, &screen
->text
);
229 nouveau_bo_ref(NULL
, &screen
->tls
);
230 nouveau_bo_ref(NULL
, &screen
->txc
);
231 nouveau_bo_ref(NULL
, &screen
->fence
.bo
);
232 nouveau_bo_ref(NULL
, &screen
->vfetch_cache
);
234 nouveau_resource_destroy(&screen
->lib_code
);
235 nouveau_resource_destroy(&screen
->text_heap
);
237 if (screen
->tic
.entries
)
238 FREE(screen
->tic
.entries
);
240 nouveau_mm_destroy(screen
->mm_VRAM_fe0
);
242 nouveau_grobj_free(&screen
->fermi
);
243 nouveau_grobj_free(&screen
->eng2d
);
244 nouveau_grobj_free(&screen
->m2mf
);
246 nouveau_screen_fini(&screen
->base
);
252 nvc0_graph_set_macro(struct nvc0_screen
*screen
, uint32_t m
, unsigned pos
,
253 unsigned size
, const uint32_t *data
)
255 struct nouveau_channel
*chan
= screen
->base
.channel
;
259 BEGIN_RING(chan
, RING_3D_(NVC0_GRAPH_MACRO_ID
), 2);
260 OUT_RING (chan
, (m
- 0x3800) / 8);
261 OUT_RING (chan
, pos
);
262 BEGIN_RING_1I(chan
, RING_3D_(NVC0_GRAPH_MACRO_UPLOAD_POS
), size
+ 1);
263 OUT_RING (chan
, pos
);
264 OUT_RINGp (chan
, data
, size
);
270 nvc0_magic_3d_init(struct nouveau_channel
*chan
)
272 BEGIN_RING(chan
, RING_3D_(0x10cc), 1);
273 OUT_RING (chan
, 0xff);
274 BEGIN_RING(chan
, RING_3D_(0x10e0), 2);
275 OUT_RING(chan
, 0xff);
276 OUT_RING(chan
, 0xff);
277 BEGIN_RING(chan
, RING_3D_(0x10ec), 2);
278 OUT_RING(chan
, 0xff);
279 OUT_RING(chan
, 0xff);
280 BEGIN_RING(chan
, RING_3D_(0x074c), 1);
281 OUT_RING (chan
, 0x3f);
283 BEGIN_RING(chan
, RING_3D_(0x16a8), 1);
284 OUT_RING (chan
, (3 << 16) | 3);
285 BEGIN_RING(chan
, RING_3D_(0x1794), 1);
286 OUT_RING (chan
, (2 << 16) | 2);
287 BEGIN_RING(chan
, RING_3D_(0x0de8), 1);
290 #if 0 /* software method */
291 BEGIN_RING(chan
, RING_3D_(0x1528), 1); /* MP poke */
295 BEGIN_RING(chan
, RING_3D_(0x12ac), 1);
297 BEGIN_RING(chan
, RING_3D_(0x0218), 1);
298 OUT_RING (chan
, 0x10);
299 BEGIN_RING(chan
, RING_3D_(0x10fc), 1);
300 OUT_RING (chan
, 0x10);
301 BEGIN_RING(chan
, RING_3D_(0x1290), 1);
302 OUT_RING (chan
, 0x10);
303 BEGIN_RING(chan
, RING_3D_(0x12d8), 2);
304 OUT_RING (chan
, 0x10);
305 OUT_RING (chan
, 0x10);
306 BEGIN_RING(chan
, RING_3D_(0x06d4), 1);
308 BEGIN_RING(chan
, RING_3D_(0x1140), 1);
309 OUT_RING (chan
, 0x10);
310 BEGIN_RING(chan
, RING_3D_(0x1610), 1);
311 OUT_RING (chan
, 0xe);
313 BEGIN_RING(chan
, RING_3D_(0x164c), 1);
314 OUT_RING (chan
, 1 << 12);
315 BEGIN_RING(chan
, RING_3D_(0x151c), 1);
317 BEGIN_RING(chan
, RING_3D_(0x030c), 1);
319 BEGIN_RING(chan
, RING_3D_(0x0300), 1);
321 #if 0 /* software method */
322 BEGIN_RING(chan
, RING_3D_(0x1280), 1); /* PGRAPH poke */
325 BEGIN_RING(chan
, RING_3D_(0x02d0), 1);
326 OUT_RING (chan
, 0x1f40);
327 BEGIN_RING(chan
, RING_3D_(0x00fdc), 1);
329 BEGIN_RING(chan
, RING_3D_(0x19c0), 1);
331 BEGIN_RING(chan
, RING_3D_(0x075c), 1);
336 nvc0_screen_fence_emit(struct pipe_screen
*pscreen
, u32 sequence
)
338 struct nvc0_screen
*screen
= nvc0_screen(pscreen
);
339 struct nouveau_channel
*chan
= screen
->base
.channel
;
341 MARK_RING (chan
, 5, 2);
342 BEGIN_RING(chan
, RING_3D(QUERY_ADDRESS_HIGH
), 4);
343 OUT_RELOCh(chan
, screen
->fence
.bo
, 0, NOUVEAU_BO_WR
);
344 OUT_RELOCl(chan
, screen
->fence
.bo
, 0, NOUVEAU_BO_WR
);
345 OUT_RING (chan
, sequence
);
346 OUT_RING (chan
, NVC0_3D_QUERY_GET_FENCE
| NVC0_3D_QUERY_GET_SHORT
|
347 (0xf << NVC0_3D_QUERY_GET_UNIT__SHIFT
));
351 nvc0_screen_fence_update(struct pipe_screen
*pscreen
)
353 struct nvc0_screen
*screen
= nvc0_screen(pscreen
);
354 return screen
->fence
.map
[0];
357 #define FAIL_SCREEN_INIT(str, err) \
359 NOUVEAU_ERR(str, err); \
360 nvc0_screen_destroy(pscreen); \
365 nvc0_screen_create(struct pipe_winsys
*ws
, struct nouveau_device
*dev
)
367 struct nvc0_screen
*screen
;
368 struct nouveau_channel
*chan
;
369 struct pipe_screen
*pscreen
;
373 screen
= CALLOC_STRUCT(nvc0_screen
);
376 pscreen
= &screen
->base
.base
;
378 screen
->base
.sysmem_bindings
= PIPE_BIND_CONSTANT_BUFFER
;
380 ret
= nouveau_screen_init(&screen
->base
, dev
);
382 nvc0_screen_destroy(pscreen
);
385 chan
= screen
->base
.channel
;
386 chan
->user_private
= screen
;
388 pscreen
->winsys
= ws
;
389 pscreen
->destroy
= nvc0_screen_destroy
;
390 pscreen
->context_create
= nvc0_create
;
391 pscreen
->is_format_supported
= nvc0_screen_is_format_supported
;
392 pscreen
->get_param
= nvc0_screen_get_param
;
393 pscreen
->get_shader_param
= nvc0_screen_get_shader_param
;
394 pscreen
->get_paramf
= nvc0_screen_get_paramf
;
396 nvc0_screen_init_resource_functions(pscreen
);
398 nouveau_screen_init_vdec(&screen
->base
);
400 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_GART
| NOUVEAU_BO_MAP
, 0, 4096,
404 nouveau_bo_map(screen
->fence
.bo
, NOUVEAU_BO_RDWR
);
405 screen
->fence
.map
= screen
->fence
.bo
->map
;
406 nouveau_bo_unmap(screen
->fence
.bo
);
407 screen
->base
.fence
.emit
= nvc0_screen_fence_emit
;
408 screen
->base
.fence
.update
= nvc0_screen_fence_update
;
410 for (i
= 0; i
< NVC0_SCRATCH_NR_BUFFERS
; ++i
) {
411 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_GART
, 0, NVC0_SCRATCH_SIZE
,
412 &screen
->scratch
.bo
[i
]);
417 ret
= nouveau_grobj_alloc(chan
, 0xbeef9039, NVC0_M2MF
, &screen
->m2mf
);
419 FAIL_SCREEN_INIT("Error allocating PGRAPH context for M2MF: %d\n", ret
);
421 BIND_RING (chan
, screen
->m2mf
, NVC0_SUBCH_MF
);
422 BEGIN_RING(chan
, RING_MF(NOTIFY_ADDRESS_HIGH
), 3);
423 OUT_RELOCh(chan
, screen
->fence
.bo
, 16, NOUVEAU_BO_GART
| NOUVEAU_BO_RDWR
);
424 OUT_RELOCl(chan
, screen
->fence
.bo
, 16, NOUVEAU_BO_GART
| NOUVEAU_BO_RDWR
);
427 ret
= nouveau_grobj_alloc(chan
, 0xbeef902d, NVC0_2D
, &screen
->eng2d
);
429 FAIL_SCREEN_INIT("Error allocating PGRAPH context for 2D: %d\n", ret
);
431 BIND_RING (chan
, screen
->eng2d
, NVC0_SUBCH_2D
);
432 BEGIN_RING(chan
, RING_2D(OPERATION
), 1);
433 OUT_RING (chan
, NVC0_2D_OPERATION_SRCCOPY
);
434 BEGIN_RING(chan
, RING_2D(CLIP_ENABLE
), 1);
436 BEGIN_RING(chan
, RING_2D(COLOR_KEY_ENABLE
), 1);
438 BEGIN_RING(chan
, RING_2D_(0x0884), 1);
439 OUT_RING (chan
, 0x3f);
440 BEGIN_RING(chan
, RING_2D_(0x0888), 1);
443 ret
= nouveau_grobj_alloc(chan
, 0xbeef9097, NVC0_3D
, &screen
->fermi
);
445 FAIL_SCREEN_INIT("Error allocating PGRAPH context for 3D: %d\n", ret
);
447 BIND_RING (chan
, screen
->fermi
, NVC0_SUBCH_3D
);
448 BEGIN_RING(chan
, RING_3D(NOTIFY_ADDRESS_HIGH
), 3);
449 OUT_RELOCh(chan
, screen
->fence
.bo
, 32, NOUVEAU_BO_GART
| NOUVEAU_BO_RDWR
);
450 OUT_RELOCl(chan
, screen
->fence
.bo
, 32, NOUVEAU_BO_GART
| NOUVEAU_BO_RDWR
);
453 BEGIN_RING(chan
, RING_3D(COND_MODE
), 1);
454 OUT_RING (chan
, NVC0_3D_COND_MODE_ALWAYS
);
456 BEGIN_RING(chan
, RING_3D(RT_CONTROL
), 1);
459 BEGIN_RING(chan
, RING_3D(CSAA_ENABLE
), 1);
461 BEGIN_RING(chan
, RING_3D(MULTISAMPLE_ENABLE
), 1);
463 BEGIN_RING(chan
, RING_3D(MULTISAMPLE_MODE
), 1);
464 OUT_RING (chan
, NVC0_3D_MULTISAMPLE_MODE_MS1
);
465 BEGIN_RING(chan
, RING_3D(MULTISAMPLE_CTRL
), 1);
467 BEGIN_RING(chan
, RING_3D(LINE_WIDTH_SEPARATE
), 1);
469 BEGIN_RING(chan
, RING_3D(LINE_LAST_PIXEL
), 1);
471 BEGIN_RING(chan
, RING_3D(BLEND_SEPARATE_ALPHA
), 1);
473 BEGIN_RING(chan
, RING_3D(BLEND_ENABLE_COMMON
), 1);
475 BEGIN_RING(chan
, RING_3D(TEX_MISC
), 1);
476 OUT_RING (chan
, NVC0_3D_TEX_MISC_SEAMLESS_CUBE_MAP
);
478 nvc0_magic_3d_init(chan
);
480 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 1 << 17, 1 << 20, &screen
->text
);
484 /* XXX: getting a page fault at the end of the code buffer every few
485 * launches, don't use the last 256 bytes to work around them - prefetch ?
487 nouveau_resource_init(&screen
->text_heap
, 0, (1 << 20) - 0x100);
489 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 1 << 12, 6 << 16,
494 /* auxiliary constants (6 user clip planes, base instance id) */
495 BEGIN_RING(chan
, RING_3D(CB_SIZE
), 3);
496 OUT_RING (chan
, 256);
497 OUT_RELOCh(chan
, screen
->uniforms
, 5 << 16, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
);
498 OUT_RELOCl(chan
, screen
->uniforms
, 5 << 16, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
);
499 for (i
= 0; i
< 5; ++i
) {
500 BEGIN_RING(chan
, RING_3D(CB_BIND(i
)), 1);
501 OUT_RING (chan
, (15 << 4) | 1);
504 screen
->tls_size
= (16 * 32) * (NVC0_CAP_MAX_PROGRAM_TEMPS
* 16);
505 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 1 << 17,
506 screen
->tls_size
, &screen
->tls
);
510 BEGIN_RING(chan
, RING_3D(CODE_ADDRESS_HIGH
), 2);
511 OUT_RELOCh(chan
, screen
->text
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
);
512 OUT_RELOCl(chan
, screen
->text
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
);
513 BEGIN_RING(chan
, RING_3D(LOCAL_ADDRESS_HIGH
), 4);
514 OUT_RELOCh(chan
, screen
->tls
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RDWR
);
515 OUT_RELOCl(chan
, screen
->tls
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RDWR
);
516 OUT_RING (chan
, screen
->tls_size
>> 32);
517 OUT_RING (chan
, screen
->tls_size
);
518 BEGIN_RING(chan
, RING_3D_(0x07a0), 1);
520 BEGIN_RING(chan
, RING_3D(LOCAL_BASE
), 1);
523 for (i
= 0; i
< 5; ++i
) {
524 BEGIN_RING(chan
, RING_3D(TEX_LIMITS(i
)), 1);
525 OUT_RING (chan
, 0x54);
527 BEGIN_RING(chan
, RING_3D(LINKED_TSC
), 1);
530 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 1 << 17, 1 << 20,
531 &screen
->vfetch_cache
);
535 BEGIN_RING(chan
, RING_3D(VERTEX_QUARANTINE_ADDRESS_HIGH
), 3);
536 OUT_RELOCh(chan
, screen
->vfetch_cache
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RDWR
);
537 OUT_RELOCl(chan
, screen
->vfetch_cache
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RDWR
);
540 ret
= nouveau_bo_new(dev
, NOUVEAU_BO_VRAM
, 1 << 17, 1 << 17, &screen
->txc
);
544 BEGIN_RING(chan
, RING_3D(TIC_ADDRESS_HIGH
), 3);
545 OUT_RELOCh(chan
, screen
->txc
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
);
546 OUT_RELOCl(chan
, screen
->txc
, 0, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
);
547 OUT_RING (chan
, NVC0_TIC_MAX_ENTRIES
- 1);
549 BEGIN_RING(chan
, RING_3D(TSC_ADDRESS_HIGH
), 3);
550 OUT_RELOCh(chan
, screen
->txc
, 65536, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
);
551 OUT_RELOCl(chan
, screen
->txc
, 65536, NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
);
552 OUT_RING (chan
, NVC0_TSC_MAX_ENTRIES
- 1);
554 BEGIN_RING(chan
, RING_3D(SCREEN_Y_CONTROL
), 1);
556 BEGIN_RING(chan
, RING_3D(WINDOW_OFFSET_X
), 2);
559 BEGIN_RING(chan
, RING_3D_(0x1590), 1); /* deactivate ZCULL */
560 OUT_RING (chan
, 0x3f);
562 BEGIN_RING(chan
, RING_3D(CLIP_RECTS_MODE
), 1);
563 OUT_RING (chan
, NVC0_3D_CLIP_RECTS_MODE_INSIDE_ANY
);
564 BEGIN_RING(chan
, RING_3D(CLIP_RECT_HORIZ(0)), 8 * 2);
565 for (i
= 0; i
< 8 * 2; ++i
)
567 BEGIN_RING(chan
, RING_3D(CLIP_RECTS_EN
), 1);
569 BEGIN_RING(chan
, RING_3D(CLIPID_ENABLE
), 1);
572 /* neither scissors, viewport nor stencil mask should affect clears */
573 BEGIN_RING(chan
, RING_3D(CLEAR_FLAGS
), 1);
576 BEGIN_RING(chan
, RING_3D(VIEWPORT_TRANSFORM_EN
), 1);
578 BEGIN_RING(chan
, RING_3D(DEPTH_RANGE_NEAR(0)), 2);
579 OUT_RINGf (chan
, 0.0f
);
580 OUT_RINGf (chan
, 1.0f
);
581 BEGIN_RING(chan
, RING_3D(VIEW_VOLUME_CLIP_CTRL
), 1);
582 OUT_RING (chan
, NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1
);
584 /* We use scissors instead of exact view volume clipping,
585 * so they're always enabled.
587 BEGIN_RING(chan
, RING_3D(SCISSOR_ENABLE(0)), 3);
589 OUT_RING (chan
, 8192 << 16);
590 OUT_RING (chan
, 8192 << 16);
592 #define MK_MACRO(m, n) i = nvc0_graph_set_macro(screen, m, i, sizeof(n), n);
595 MK_MACRO(NVC0_3D_BLEND_ENABLES
, nvc0_9097_blend_enables
);
596 MK_MACRO(NVC0_3D_VERTEX_ARRAY_SELECT
, nvc0_9097_vertex_array_select
);
597 MK_MACRO(NVC0_3D_TEP_SELECT
, nvc0_9097_tep_select
);
598 MK_MACRO(NVC0_3D_GP_SELECT
, nvc0_9097_gp_select
);
599 MK_MACRO(NVC0_3D_POLYGON_MODE_FRONT
, nvc0_9097_poly_mode_front
);
600 MK_MACRO(NVC0_3D_POLYGON_MODE_BACK
, nvc0_9097_poly_mode_back
);
602 BEGIN_RING(chan
, RING_3D(RASTERIZE_ENABLE
), 1);
604 BEGIN_RING(chan
, RING_3D(RT_SEPARATE_FRAG_DATA
), 1);
606 BEGIN_RING(chan
, RING_3D(GP_SELECT
), 1);
607 OUT_RING (chan
, 0x40);
608 BEGIN_RING(chan
, RING_3D(LAYER
), 1);
610 BEGIN_RING(chan
, RING_3D(TEP_SELECT
), 1);
611 OUT_RING (chan
, 0x30);
612 BEGIN_RING(chan
, RING_3D(PATCH_VERTICES
), 1);
614 BEGIN_RING(chan
, RING_3D(SP_SELECT(2)), 1);
615 OUT_RING (chan
, 0x20);
616 BEGIN_RING(chan
, RING_3D(SP_SELECT(0)), 1);
617 OUT_RING (chan
, 0x00);
619 BEGIN_RING(chan
, RING_3D(POINT_COORD_REPLACE
), 1);
621 BEGIN_RING(chan
, RING_3D(POINT_RASTER_RULES
), 1);
622 OUT_RING (chan
, NVC0_3D_POINT_RASTER_RULES_OGL
);
624 BEGIN_RING(chan
, RING_3D(EDGEFLAG_ENABLE
), 1);
627 BEGIN_RING(chan
, RING_3D(VERTEX_RUNOUT_ADDRESS_HIGH
), 2);
628 OUT_RING (chan
, 0xab);
629 OUT_RING (chan
, 0x00000000);
633 screen
->tic
.entries
= CALLOC(4096, sizeof(void *));
634 screen
->tsc
.entries
= screen
->tic
.entries
+ 2048;
636 screen
->mm_VRAM_fe0
= nouveau_mm_create(dev
, NOUVEAU_BO_VRAM
, 0xfe0);
638 if (!nvc0_blitctx_create(screen
))
641 nouveau_fence_new(&screen
->base
, &screen
->base
.fence
.current
, FALSE
);
646 nvc0_screen_destroy(pscreen
);
651 nvc0_screen_make_buffers_resident(struct nvc0_screen
*screen
)
653 struct nouveau_channel
*chan
= screen
->base
.channel
;
655 const unsigned flags
= NOUVEAU_BO_VRAM
| NOUVEAU_BO_RD
;
657 MARK_RING(chan
, 5, 5);
658 nouveau_bo_validate(chan
, screen
->text
, flags
);
659 nouveau_bo_validate(chan
, screen
->uniforms
, flags
);
660 nouveau_bo_validate(chan
, screen
->txc
, flags
);
661 nouveau_bo_validate(chan
, screen
->vfetch_cache
, flags
);
663 if (screen
->cur_ctx
&& screen
->cur_ctx
->state
.tls_required
)
664 nouveau_bo_validate(chan
, screen
->tls
, flags
);
668 nvc0_screen_tic_alloc(struct nvc0_screen
*screen
, void *entry
)
670 int i
= screen
->tic
.next
;
672 while (screen
->tic
.lock
[i
/ 32] & (1 << (i
% 32)))
673 i
= (i
+ 1) & (NVC0_TIC_MAX_ENTRIES
- 1);
675 screen
->tic
.next
= (i
+ 1) & (NVC0_TIC_MAX_ENTRIES
- 1);
677 if (screen
->tic
.entries
[i
])
678 nv50_tic_entry(screen
->tic
.entries
[i
])->id
= -1;
680 screen
->tic
.entries
[i
] = entry
;
685 nvc0_screen_tsc_alloc(struct nvc0_screen
*screen
, void *entry
)
687 int i
= screen
->tsc
.next
;
689 while (screen
->tsc
.lock
[i
/ 32] & (1 << (i
% 32)))
690 i
= (i
+ 1) & (NVC0_TSC_MAX_ENTRIES
- 1);
692 screen
->tsc
.next
= (i
+ 1) & (NVC0_TSC_MAX_ENTRIES
- 1);
694 if (screen
->tsc
.entries
[i
])
695 nv50_tsc_entry(screen
->tsc
.entries
[i
])->id
= -1;
697 screen
->tsc
.entries
[i
] = entry
;