nouveau: switch to libdrm_nouveau-2.0
[mesa.git] / src / gallium / drivers / nvc0 / nvc0_screen.h
1 #ifndef __NVC0_SCREEN_H__
2 #define __NVC0_SCREEN_H__
3
4 #include "nouveau/nouveau_screen.h"
5 #include "nouveau/nouveau_mm.h"
6 #include "nouveau/nouveau_fence.h"
7 #include "nouveau/nouveau_heap.h"
8
9 #include "nvc0_winsys.h"
10 #include "nvc0_stateobj.h"
11
12 #define NVC0_TIC_MAX_ENTRIES 2048
13 #define NVC0_TSC_MAX_ENTRIES 2048
14
15 struct nvc0_context;
16
17 #define NVC0_SCRATCH_SIZE (2 << 20)
18 #define NVC0_SCRATCH_NR_BUFFERS 2
19
20 #define NVC0_SCREEN_RESIDENT_BO_COUNT 5
21
22 struct nvc0_blitctx;
23
24 struct nvc0_screen {
25 struct nouveau_screen base;
26
27 struct nvc0_context *cur_ctx;
28
29 int num_occlusion_queries_active;
30
31 struct nouveau_bo *text;
32 struct nouveau_bo *uniforms;
33 struct nouveau_bo *tls;
34 struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */
35 struct nouveau_bo *vfetch_cache;
36
37 uint64_t tls_size;
38
39 struct nouveau_heap *text_heap;
40 struct nouveau_heap *lib_code; /* allocated from text_heap */
41
42 struct nvc0_blitctx *blitctx;
43
44 struct {
45 struct nouveau_bo *bo[NVC0_SCRATCH_NR_BUFFERS];
46 uint8_t *buf;
47 int index;
48 uint32_t offset;
49 } scratch;
50
51 struct {
52 void **entries;
53 int next;
54 uint32_t lock[NVC0_TIC_MAX_ENTRIES / 32];
55 } tic;
56
57 struct {
58 void **entries;
59 int next;
60 uint32_t lock[NVC0_TSC_MAX_ENTRIES / 32];
61 } tsc;
62
63 struct {
64 struct nouveau_bo *bo;
65 uint32_t *map;
66 } fence;
67
68 struct nouveau_mman *mm_VRAM_fe0;
69
70 struct nouveau_object *fermi;
71 struct nouveau_object *eng2d;
72 struct nouveau_object *m2mf;
73 struct nouveau_object *dijkstra;
74 };
75
76 static INLINE struct nvc0_screen *
77 nvc0_screen(struct pipe_screen *screen)
78 {
79 return (struct nvc0_screen *)screen;
80 }
81
82 boolean nvc0_blitctx_create(struct nvc0_screen *);
83
84 void nvc0_screen_make_buffers_resident(struct nvc0_screen *);
85
86 int nvc0_screen_tic_alloc(struct nvc0_screen *, void *);
87 int nvc0_screen_tsc_alloc(struct nvc0_screen *, void *);
88
89 static INLINE void
90 nvc0_resource_fence(struct nv04_resource *res, uint32_t flags)
91 {
92 struct nvc0_screen *screen = nvc0_screen(res->base.screen);
93
94 if (res->mm) {
95 nouveau_fence_ref(screen->base.fence.current, &res->fence);
96 if (flags & NOUVEAU_BO_WR)
97 nouveau_fence_ref(screen->base.fence.current, &res->fence_wr);
98 }
99 }
100
101 static INLINE void
102 nvc0_resource_validate(struct nv04_resource *res, uint32_t flags)
103 {
104 if (likely(res->bo)) {
105 if (flags & NOUVEAU_BO_WR)
106 res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
107 if (flags & NOUVEAU_BO_RD)
108 res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
109
110 nvc0_resource_fence(res, flags);
111 }
112 }
113
114 struct nvc0_format {
115 uint32_t rt;
116 uint32_t tic;
117 uint32_t vtx;
118 uint32_t usage;
119 };
120
121 extern const struct nvc0_format nvc0_format_table[];
122
123 static INLINE void
124 nvc0_screen_tic_unlock(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
125 {
126 if (tic->id >= 0)
127 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
128 }
129
130 static INLINE void
131 nvc0_screen_tsc_unlock(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
132 {
133 if (tsc->id >= 0)
134 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
135 }
136
137 static INLINE void
138 nvc0_screen_tic_free(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
139 {
140 if (tic->id >= 0) {
141 screen->tic.entries[tic->id] = NULL;
142 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
143 }
144 }
145
146 static INLINE void
147 nvc0_screen_tsc_free(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
148 {
149 if (tsc->id >= 0) {
150 screen->tsc.entries[tsc->id] = NULL;
151 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
152 }
153 }
154
155 #endif