1 #ifndef __NVC0_SCREEN_H__
2 #define __NVC0_SCREEN_H__
4 #include "nouveau/nouveau_screen.h"
5 #include "nouveau/nouveau_mm.h"
6 #include "nouveau/nouveau_fence.h"
7 #include "nouveau/nouveau_heap.h"
9 #include "nouveau/nv_object.xml.h"
11 #include "nvc0_winsys.h"
12 #include "nvc0_stateobj.h"
14 #define NVC0_TIC_MAX_ENTRIES 2048
15 #define NVC0_TSC_MAX_ENTRIES 2048
17 /* doesn't count reserved slots (for auxiliary constants, immediates, etc.) */
18 #define NVC0_MAX_PIPE_CONSTBUFS 14
19 #define NVE4_MAX_PIPE_CONSTBUFS_COMPUTE 7
21 #define NVC0_MAX_SURFACE_SLOTS 16
28 struct nouveau_screen base
;
30 struct nvc0_context
*cur_ctx
;
32 int num_occlusion_queries_active
;
34 struct nouveau_bo
*text
;
35 struct nouveau_bo
*parm
; /* for COMPUTE */
36 struct nouveau_bo
*uniform_bo
; /* for 3D */
37 struct nouveau_bo
*tls
;
38 struct nouveau_bo
*txc
; /* TIC (offset 0) and TSC (65536) */
39 struct nouveau_bo
*poly_cache
;
42 uint16_t mp_count_compute
; /* magic reg can make compute use fewer MPs */
44 struct nouveau_heap
*text_heap
;
45 struct nouveau_heap
*lib_code
; /* allocated from text_heap */
47 struct nvc0_blitter
*blitter
;
52 uint32_t lock
[NVC0_TIC_MAX_ENTRIES
/ 32];
58 uint32_t lock
[NVC0_TSC_MAX_ENTRIES
/ 32];
62 struct nouveau_bo
*bo
;
67 struct nvc0_program
*prog
; /* compute state object to read MP counters */
68 struct pipe_query
*mp_counter
[8]; /* counter to query allocation */
69 uint8_t num_mp_pm_active
[2];
70 boolean mp_counters_enabled
;
73 struct nouveau_mman
*mm_VRAM_fe0
;
75 struct nouveau_object
*eng3d
; /* sqrt(1/2)|kepler> + sqrt(1/2)|fermi> */
76 struct nouveau_object
*eng2d
;
77 struct nouveau_object
*m2mf
;
78 struct nouveau_object
*compute
;
81 static INLINE
struct nvc0_screen
*
82 nvc0_screen(struct pipe_screen
*screen
)
84 return (struct nvc0_screen
*)screen
;
88 /* Performance counter queries:
90 #define NVE4_PM_QUERY_COUNT 32
91 #define NVE4_PM_QUERY(i) (PIPE_QUERY_DRIVER_SPECIFIC + (i))
92 #define NVE4_PM_QUERY_MAX NVE4_PM_QUERY(NVE4_PM_QUERY_COUNT - 1)
93 /* MP (NOTE: these are also used to index a table, so put them first) */
94 #define NVE4_PM_QUERY_PROF_TRIGGER_0 0
95 #define NVE4_PM_QUERY_PROF_TRIGGER_1 1
96 #define NVE4_PM_QUERY_PROF_TRIGGER_2 2
97 #define NVE4_PM_QUERY_PROF_TRIGGER_3 3
98 #define NVE4_PM_QUERY_PROF_TRIGGER_4 4
99 #define NVE4_PM_QUERY_PROF_TRIGGER_5 5
100 #define NVE4_PM_QUERY_PROF_TRIGGER_6 6
101 #define NVE4_PM_QUERY_PROF_TRIGGER_7 7
102 #define NVE4_PM_QUERY_LAUNCHED_WARPS 8
103 #define NVE4_PM_QUERY_LAUNCHED_THREADS 9
104 #define NVE4_PM_QUERY_LAUNCHED_CTA 10
105 #define NVE4_PM_QUERY_INST_ISSUED1 11
106 #define NVE4_PM_QUERY_INST_ISSUED2 12
107 #define NVE4_PM_QUERY_INST_EXECUTED 13
108 #define NVE4_PM_QUERY_LD_LOCAL 14
109 #define NVE4_PM_QUERY_ST_LOCAL 15
110 #define NVE4_PM_QUERY_LD_SHARED 16
111 #define NVE4_PM_QUERY_ST_SHARED 17
112 #define NVE4_PM_QUERY_L1_LOCAL_LOAD_HIT 18
113 #define NVE4_PM_QUERY_L1_LOCAL_LOAD_MISS 19
114 #define NVE4_PM_QUERY_L1_LOCAL_STORE_HIT 20
115 #define NVE4_PM_QUERY_L1_LOCAL_STORE_MISS 21
116 #define NVE4_PM_QUERY_GLD_REQUEST 22
117 #define NVE4_PM_QUERY_GST_REQUEST 23
118 #define NVE4_PM_QUERY_L1_GLOBAL_LOAD_HIT 24
119 #define NVE4_PM_QUERY_L1_GLOBAL_LOAD_MISS 25
120 #define NVE4_PM_QUERY_GLD_TRANSACTIONS_UNCACHED 26
121 #define NVE4_PM_QUERY_GST_TRANSACTIONS 27
122 #define NVE4_PM_QUERY_BRANCH 28
123 #define NVE4_PM_QUERY_BRANCH_DIVERGENT 29
124 #define NVE4_PM_QUERY_ACTIVE_WARPS 30
125 #define NVE4_PM_QUERY_ACTIVE_CYCLES 31
126 /* Engines (PCOUNTER) */
128 #define NVE4_PM_QUERY_GR_IDLE 50
129 #define NVE4_PM_QUERY_BSP_IDLE 51
130 #define NVE4_PM_QUERY_VP_IDLE 52
131 #define NVE4_PM_QUERY_PPP_IDLE 53
132 #define NVE4_PM_QUERY_CE0_IDLE 54
133 #define NVE4_PM_QUERY_CE1_IDLE 55
134 #define NVE4_PM_QUERY_CE2_IDLE 56
136 /* L2 queries (PCOUNTER) */
138 #define NVE4_PM_QUERY_L2_SUBP_WRITE_L1_SECTOR_QUERIES 57
141 /* TEX queries (PCOUNTER) */
143 #define NVE4_PM_QUERY_TEX0_CACHE_SECTOR_QUERIES 58
147 int nvc0_screen_get_driver_query_info(struct pipe_screen
*, unsigned,
148 struct pipe_driver_query_info
*);
150 boolean
nvc0_blitter_create(struct nvc0_screen
*);
151 void nvc0_blitter_destroy(struct nvc0_screen
*);
153 void nvc0_screen_make_buffers_resident(struct nvc0_screen
*);
155 int nvc0_screen_tic_alloc(struct nvc0_screen
*, void *);
156 int nvc0_screen_tsc_alloc(struct nvc0_screen
*, void *);
158 int nve4_screen_compute_setup(struct nvc0_screen
*, struct nouveau_pushbuf
*);
160 boolean
nvc0_screen_resize_tls_area(struct nvc0_screen
*, uint32_t lpos
,
161 uint32_t lneg
, uint32_t cstack
);
164 nvc0_resource_fence(struct nv04_resource
*res
, uint32_t flags
)
166 struct nvc0_screen
*screen
= nvc0_screen(res
->base
.screen
);
169 nouveau_fence_ref(screen
->base
.fence
.current
, &res
->fence
);
170 if (flags
& NOUVEAU_BO_WR
)
171 nouveau_fence_ref(screen
->base
.fence
.current
, &res
->fence_wr
);
176 nvc0_resource_validate(struct nv04_resource
*res
, uint32_t flags
)
178 if (likely(res
->bo
)) {
179 if (flags
& NOUVEAU_BO_WR
)
180 res
->status
|= NOUVEAU_BUFFER_STATUS_GPU_WRITING
|
181 NOUVEAU_BUFFER_STATUS_DIRTY
;
182 if (flags
& NOUVEAU_BO_RD
)
183 res
->status
|= NOUVEAU_BUFFER_STATUS_GPU_READING
;
185 nvc0_resource_fence(res
, flags
);
196 extern const struct nvc0_format nvc0_format_table
[];
199 nvc0_screen_tic_unlock(struct nvc0_screen
*screen
, struct nv50_tic_entry
*tic
)
202 screen
->tic
.lock
[tic
->id
/ 32] &= ~(1 << (tic
->id
% 32));
206 nvc0_screen_tsc_unlock(struct nvc0_screen
*screen
, struct nv50_tsc_entry
*tsc
)
209 screen
->tsc
.lock
[tsc
->id
/ 32] &= ~(1 << (tsc
->id
% 32));
213 nvc0_screen_tic_free(struct nvc0_screen
*screen
, struct nv50_tic_entry
*tic
)
216 screen
->tic
.entries
[tic
->id
] = NULL
;
217 screen
->tic
.lock
[tic
->id
/ 32] &= ~(1 << (tic
->id
% 32));
222 nvc0_screen_tsc_free(struct nvc0_screen
*screen
, struct nv50_tsc_entry
*tsc
)
225 screen
->tsc
.entries
[tsc
->id
] = NULL
;
226 screen
->tsc
.lock
[tsc
->id
/ 32] &= ~(1 << (tsc
->id
% 32));