src/gallium/drivers/nvc0/nvc0_shader_state.c

   1 /*
   2  * Copyright 2010 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "pipe/p_context.h"
  24 #include "pipe/p_defines.h"
  25 #include "pipe/p_state.h"
  26 #include "util/u_inlines.h"
  27
  28 #include "nvc0_context.h"
  29
  30 static INLINE void
  31 nvc0_program_update_context_state(struct nvc0_context *nvc0,
  32                                   struct nvc0_program *prog, int stage)
  33 {
  34    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
  35
  36    if (prog && prog->need_tls) {
  37       const uint32_t flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR;
  38       if (!nvc0->state.tls_required)
  39          BCTX_REFN_bo(nvc0->bufctx_3d, TLS, flags, nvc0->screen->tls);
  40       nvc0->state.tls_required |= 1 << stage;
  41    } else {
  42       if (nvc0->state.tls_required == (1 << stage))
  43          nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_TLS);
  44       nvc0->state.tls_required &= ~(1 << stage);
  45    }
  46
  47    if (prog && prog->immd_size) {
  48       BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
  49       /* NOTE: may overlap code of a different shader */
  50       PUSH_DATA (push, align(prog->immd_size, 0x100));
  51       PUSH_DATAh(push, nvc0->screen->text->offset + prog->immd_base);
  52       PUSH_DATA (push, nvc0->screen->text->offset + prog->immd_base);
  53       BEGIN_NVC0(push, NVC0_3D(CB_BIND(stage)), 1);
  54       PUSH_DATA (push, (14 << 4) | 1);
  55
  56       nvc0->state.c14_bound |= 1 << stage;
  57    } else
  58    if (nvc0->state.c14_bound & (1 << stage)) {
  59       BEGIN_NVC0(push, NVC0_3D(CB_BIND(stage)), 1);
  60       PUSH_DATA (push, (14 << 4) | 0);
  61
  62       nvc0->state.c14_bound &= ~(1 << stage);
  63    }
  64 }
  65
  66 static INLINE boolean
  67 nvc0_program_validate(struct nvc0_context *nvc0, struct nvc0_program *prog)
  68 {
  69    if (prog->mem)
  70       return TRUE;
  71
  72    if (!prog->translated) {
  73       prog->translated = nvc0_program_translate(prog);
  74       if (!prog->translated)
  75          return FALSE;
  76    }
  77
  78    if (likely(prog->code_size))
  79       return nvc0_program_upload_code(nvc0, prog);
  80    return TRUE; /* stream output info only */
  81 }
  82
  83 void
  84 nvc0_vertprog_validate(struct nvc0_context *nvc0)
  85 {
  86    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
  87    struct nvc0_program *vp = nvc0->vertprog;
  88
  89    if (!nvc0_program_validate(nvc0, vp))
  90          return;
  91    nvc0_program_update_context_state(nvc0, vp, 0);
  92
  93    BEGIN_NVC0(push, NVC0_3D(SP_SELECT(1)), 2);
  94    PUSH_DATA (push, 0x11);
  95    PUSH_DATA (push, vp->code_base);
  96    BEGIN_NVC0(push, NVC0_3D(SP_GPR_ALLOC(1)), 1);
  97    PUSH_DATA (push, vp->max_gpr);
  98
  99    // BEGIN_NVC0(push, NVC0_3D_(0x163c), 1);
 100    // PUSH_DATA (push, 0);
 101 }
 102
 103 void
 104 nvc0_fragprog_validate(struct nvc0_context *nvc0)
 105 {
 106    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 107    struct nvc0_program *fp = nvc0->fragprog;
 108
 109    if (!nvc0_program_validate(nvc0, fp))
 110          return;
 111    nvc0_program_update_context_state(nvc0, fp, 4);
 112
 113    BEGIN_NVC0(push, NVC0_3D(SP_SELECT(5)), 2);
 114    PUSH_DATA (push, 0x51);
 115    PUSH_DATA (push, fp->code_base);
 116    BEGIN_NVC0(push, NVC0_3D(SP_GPR_ALLOC(5)), 1);
 117    PUSH_DATA (push, fp->max_gpr);
 118
 119    BEGIN_NVC0(push, SUBC_3D(0x0360), 2);
 120    PUSH_DATA (push, 0x20164010);
 121    PUSH_DATA (push, 0x20);
 122    BEGIN_NVC0(push, NVC0_3D(ZCULL_TEST_MASK), 1);
 123    PUSH_DATA (push, fp->flags[0]);
 124 }
 125
 126 void
 127 nvc0_tctlprog_validate(struct nvc0_context *nvc0)
 128 {
 129    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 130    struct nvc0_program *tp = nvc0->tctlprog;
 131
 132    if (tp && nvc0_program_validate(nvc0, tp)) {
 133       if (tp->tp.tess_mode != ~0) {
 134          BEGIN_NVC0(push, NVC0_3D(TESS_MODE), 1);
 135          PUSH_DATA (push, tp->tp.tess_mode);
 136       }
 137       BEGIN_NVC0(push, NVC0_3D(SP_SELECT(2)), 2);
 138       PUSH_DATA (push, 0x21);
 139       PUSH_DATA (push, tp->code_base);
 140       BEGIN_NVC0(push, NVC0_3D(SP_GPR_ALLOC(2)), 1);
 141       PUSH_DATA (push, tp->max_gpr);
 142
 143       if (tp->tp.input_patch_size <= 32)
 144          IMMED_NVC0(push, NVC0_3D(PATCH_VERTICES), tp->tp.input_patch_size);
 145    } else {
 146       BEGIN_NVC0(push, NVC0_3D(SP_SELECT(2)), 1);
 147       PUSH_DATA (push, 0x20);
 148    }
 149    nvc0_program_update_context_state(nvc0, tp, 1);
 150 }
 151
 152 void
 153 nvc0_tevlprog_validate(struct nvc0_context *nvc0)
 154 {
 155    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 156    struct nvc0_program *tp = nvc0->tevlprog;
 157
 158    if (tp && nvc0_program_validate(nvc0, tp)) {
 159       if (tp->tp.tess_mode != ~0) {
 160          BEGIN_NVC0(push, NVC0_3D(TESS_MODE), 1);
 161          PUSH_DATA (push, tp->tp.tess_mode);
 162       }
 163       BEGIN_NVC0(push, NVC0_3D(TEP_SELECT), 1);
 164       PUSH_DATA (push, 0x31);
 165       BEGIN_NVC0(push, NVC0_3D(SP_START_ID(3)), 1);
 166       PUSH_DATA (push, tp->code_base);
 167       BEGIN_NVC0(push, NVC0_3D(SP_GPR_ALLOC(3)), 1);
 168       PUSH_DATA (push, tp->max_gpr);
 169    } else {
 170       BEGIN_NVC0(push, NVC0_3D(TEP_SELECT), 1);
 171       PUSH_DATA (push, 0x30);
 172    }
 173    nvc0_program_update_context_state(nvc0, tp, 2);
 174 }
 175
 176 void
 177 nvc0_gmtyprog_validate(struct nvc0_context *nvc0)
 178 {
 179    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 180    struct nvc0_program *gp = nvc0->gmtyprog;
 181
 182    if (gp)
 183       nvc0_program_validate(nvc0, gp);
 184
 185    /* we allow GPs with no code for specifying stream output state only */
 186    if (gp && gp->code_size) {
 187       const boolean gp_selects_layer = gp->hdr[13] & (1 << 9);
 188
 189       BEGIN_NVC0(push, NVC0_3D(GP_SELECT), 1);
 190       PUSH_DATA (push, 0x41);
 191       BEGIN_NVC0(push, NVC0_3D(SP_START_ID(4)), 1);
 192       PUSH_DATA (push, gp->code_base);
 193       BEGIN_NVC0(push, NVC0_3D(SP_GPR_ALLOC(4)), 1);
 194       PUSH_DATA (push, gp->max_gpr);
 195       BEGIN_NVC0(push, NVC0_3D(LAYER), 1);
 196       PUSH_DATA (push, gp_selects_layer ? NVC0_3D_LAYER_USE_GP : 0);
 197    } else {
 198       IMMED_NVC0(push, NVC0_3D(LAYER), 0);
 199       BEGIN_NVC0(push, NVC0_3D(GP_SELECT), 1);
 200       PUSH_DATA (push, 0x40);
 201    }
 202    nvc0_program_update_context_state(nvc0, gp, 3);
 203 }
 204
 205 void
 206 nvc0_tfb_validate(struct nvc0_context *nvc0)
 207 {
 208    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 209    struct nvc0_transform_feedback_state *tfb;
 210    unsigned b;
 211
 212    if (nvc0->gmtyprog) tfb = nvc0->gmtyprog->tfb;
 213    else
 214    if (nvc0->tevlprog) tfb = nvc0->tevlprog->tfb;
 215    else
 216       tfb = nvc0->vertprog->tfb;
 217
 218    IMMED_NVC0(push, NVC0_3D(TFB_ENABLE), (tfb && nvc0->num_tfbbufs) ? 1 : 0);
 219
 220    if (tfb && tfb != nvc0->state.tfb) {
 221       for (b = 0; b < 4; ++b) {
 222          if (tfb->varying_count[b]) {
 223             unsigned n = (tfb->varying_count[b] + 3) / 4;
 224
 225             BEGIN_NVC0(push, NVC0_3D(TFB_STREAM(b)), 3);
 226             PUSH_DATA (push, 0);
 227             PUSH_DATA (push, tfb->varying_count[b]);
 228             PUSH_DATA (push, tfb->stride[b]);
 229             BEGIN_NVC0(push, NVC0_3D(TFB_VARYING_LOCS(b, 0)), n);
 230             PUSH_DATAp(push, tfb->varying_index[b], n);
 231
 232             if (nvc0->tfbbuf[b])
 233                nvc0_so_target(nvc0->tfbbuf[b])->stride = tfb->stride[b];
 234          } else {
 235             IMMED_NVC0(push, NVC0_3D(TFB_VARYING_COUNT(b)), 0);
 236          }
 237       }
 238    }
 239    nvc0->state.tfb = tfb;
 240
 241    if (!(nvc0->dirty & NVC0_NEW_TFB_TARGETS))
 242       return;
 243    nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_TFB);
 244
 245    for (b = 0; b < nvc0->num_tfbbufs; ++b) {
 246       struct nvc0_so_target *targ = nvc0_so_target(nvc0->tfbbuf[b]);
 247       struct nv04_resource *buf = nv04_resource(targ->pipe.buffer);
 248
 249       if (tfb)
 250          targ->stride = tfb->stride[b];
 251
 252       if (!(nvc0->tfbbuf_dirty & (1 << b)))
 253          continue;
 254
 255       if (!targ->clean)
 256          nvc0_query_fifo_wait(push, targ->pq);
 257       BEGIN_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 5);
 258       PUSH_DATA (push, 1);
 259       PUSH_DATAh(push, buf->address + targ->pipe.buffer_offset);
 260       PUSH_DATA (push, buf->address + targ->pipe.buffer_offset);
 261       PUSH_DATA (push, targ->pipe.buffer_size);
 262       if (!targ->clean) {
 263          nvc0_query_pushbuf_submit(push, targ->pq, 0x4);
 264       } else {
 265          PUSH_DATA(push, 0); /* TFB_BUFFER_OFFSET */
 266          targ->clean = FALSE;
 267       }
 268       BCTX_REFN(nvc0->bufctx_3d, TFB, buf, WR);
 269    }
 270    for (; b < 4; ++b)
 271       IMMED_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 0);
 272 }