src/gallium/drivers/nvc0/nvc0_state.c

   1 /*
   2  * Copyright 2010 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "pipe/p_defines.h"
  24 #include "util/u_inlines.h"
  25 #include "util/u_transfer.h"
  26
  27 #include "tgsi/tgsi_parse.h"
  28
  29 #include "nvc0_stateobj.h"
  30 #include "nvc0_context.h"
  31
  32 #include "nvc0_3d.xml.h"
  33 #include "nv50/nv50_texture.xml.h"
  34
  35 #include "nouveau/nouveau_gldefs.h"
  36
  37 static INLINE uint32_t
  38 nvc0_colormask(unsigned mask)
  39 {
  40     uint32_t ret = 0;
  41
  42     if (mask & PIPE_MASK_R)
  43         ret |= 0x0001;
  44     if (mask & PIPE_MASK_G)
  45         ret |= 0x0010;
  46     if (mask & PIPE_MASK_B)
  47         ret |= 0x0100;
  48     if (mask & PIPE_MASK_A)
  49         ret |= 0x1000;
  50
  51     return ret;
  52 }
  53
  54 #define NVC0_BLEND_FACTOR_CASE(a, b) \
  55    case PIPE_BLENDFACTOR_##a: return NV50_3D_BLEND_FACTOR_##b
  56
  57 static INLINE uint32_t
  58 nvc0_blend_fac(unsigned factor)
  59 {
  60    switch (factor) {
  61    NVC0_BLEND_FACTOR_CASE(ONE, ONE);
  62    NVC0_BLEND_FACTOR_CASE(SRC_COLOR, SRC_COLOR);
  63    NVC0_BLEND_FACTOR_CASE(SRC_ALPHA, SRC_ALPHA);
  64    NVC0_BLEND_FACTOR_CASE(DST_ALPHA, DST_ALPHA);
  65    NVC0_BLEND_FACTOR_CASE(DST_COLOR, DST_COLOR);
  66    NVC0_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE, SRC_ALPHA_SATURATE);
  67    NVC0_BLEND_FACTOR_CASE(CONST_COLOR, CONSTANT_COLOR);
  68    NVC0_BLEND_FACTOR_CASE(CONST_ALPHA, CONSTANT_ALPHA);
  69    NVC0_BLEND_FACTOR_CASE(SRC1_COLOR, SRC1_COLOR);
  70    NVC0_BLEND_FACTOR_CASE(SRC1_ALPHA, SRC1_ALPHA);
  71    NVC0_BLEND_FACTOR_CASE(ZERO, ZERO);
  72    NVC0_BLEND_FACTOR_CASE(INV_SRC_COLOR, ONE_MINUS_SRC_COLOR);
  73    NVC0_BLEND_FACTOR_CASE(INV_SRC_ALPHA, ONE_MINUS_SRC_ALPHA);
  74    NVC0_BLEND_FACTOR_CASE(INV_DST_ALPHA, ONE_MINUS_DST_ALPHA);
  75    NVC0_BLEND_FACTOR_CASE(INV_DST_COLOR, ONE_MINUS_DST_COLOR);
  76    NVC0_BLEND_FACTOR_CASE(INV_CONST_COLOR, ONE_MINUS_CONSTANT_COLOR);
  77    NVC0_BLEND_FACTOR_CASE(INV_CONST_ALPHA, ONE_MINUS_CONSTANT_ALPHA);
  78    NVC0_BLEND_FACTOR_CASE(INV_SRC1_COLOR, ONE_MINUS_SRC1_COLOR);
  79    NVC0_BLEND_FACTOR_CASE(INV_SRC1_ALPHA, ONE_MINUS_SRC1_ALPHA);
  80    default:
  81       return NV50_3D_BLEND_FACTOR_ZERO;
  82    }
  83 }
  84
  85 static void *
  86 nvc0_blend_state_create(struct pipe_context *pipe,
  87                         const struct pipe_blend_state *cso)
  88 {
  89     struct nvc0_blend_stateobj *so = CALLOC_STRUCT(nvc0_blend_stateobj);
  90     int i;
  91     uint32_t ms;
  92
  93     so->pipe = *cso;
  94
  95     SB_IMMED_3D(so, BLEND_INDEPENDENT, cso->independent_blend_enable);
  96
  97     if (!cso->logicop_enable)
  98        SB_IMMED_3D(so, LOGIC_OP_ENABLE, 0);
  99
 100     if (cso->logicop_enable) {
 101        SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2);
 102        SB_DATA    (so, 1);
 103        SB_DATA    (so, nvgl_logicop_func(cso->logicop_func));
 104
 105        SB_IMMED_3D(so, BLEND_ENABLES, 0);
 106     } else
 107     if (!cso->independent_blend_enable) {
 108         SB_IMMED_3D(so, BLEND_ENABLES, cso->rt[0].blend_enable ? 0xff : 0);
 109
 110         if (cso->rt[0].blend_enable) {
 111             SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5);
 112             SB_DATA    (so, nvgl_blend_eqn(cso->rt[0].rgb_func));
 113             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].rgb_src_factor));
 114             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].rgb_dst_factor));
 115             SB_DATA    (so, nvgl_blend_eqn(cso->rt[0].alpha_func));
 116             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].alpha_src_factor));
 117             SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1);
 118             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].alpha_dst_factor));
 119         }
 120
 121         SB_IMMED_3D(so, COLOR_MASK_COMMON, 1);
 122         SB_BEGIN_3D(so, COLOR_MASK(0), 1);
 123         SB_DATA    (so, nvc0_colormask(cso->rt[0].colormask));
 124     } else {
 125         uint8_t en = 0;
 126
 127         for (i = 0; i < 8; ++i) {
 128             if (!cso->rt[i].blend_enable)
 129                 continue;
 130             en |= 1 << i;
 131
 132             SB_BEGIN_3D(so, IBLEND_EQUATION_RGB(i), 6);
 133             SB_DATA    (so, nvgl_blend_eqn(cso->rt[i].rgb_func));
 134             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].rgb_src_factor));
 135             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].rgb_dst_factor));
 136             SB_DATA    (so, nvgl_blend_eqn(cso->rt[i].alpha_func));
 137             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].alpha_src_factor));
 138             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].alpha_dst_factor));
 139         }
 140         SB_IMMED_3D(so, BLEND_ENABLES, en);
 141
 142         SB_IMMED_3D(so, COLOR_MASK_COMMON, 0);
 143         SB_BEGIN_3D(so, COLOR_MASK(0), 8);
 144         for (i = 0; i < 8; ++i)
 145             SB_DATA(so, nvc0_colormask(cso->rt[i].colormask));
 146     }
 147
 148     ms = 0;
 149     if (cso->alpha_to_coverage)
 150        ms |= NVC0_3D_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE;
 151     if (cso->alpha_to_one)
 152        ms |= NVC0_3D_MULTISAMPLE_CTRL_ALPHA_TO_ONE;
 153
 154     SB_BEGIN_3D(so, MULTISAMPLE_CTRL, 1);
 155     SB_DATA    (so, ms);
 156
 157     assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 158     return so;
 159 }
 160
 161 static void
 162 nvc0_blend_state_bind(struct pipe_context *pipe, void *hwcso)
 163 {
 164     struct nvc0_context *nvc0 = nvc0_context(pipe);
 165
 166     nvc0->blend = hwcso;
 167     nvc0->dirty |= NVC0_NEW_BLEND;
 168 }
 169
 170 static void
 171 nvc0_blend_state_delete(struct pipe_context *pipe, void *hwcso)
 172 {
 173     FREE(hwcso);
 174 }
 175
 176 /* NOTE: ignoring line_last_pixel, using FALSE (set on screen init) */
 177 static void *
 178 nvc0_rasterizer_state_create(struct pipe_context *pipe,
 179                              const struct pipe_rasterizer_state *cso)
 180 {
 181     struct nvc0_rasterizer_stateobj *so;
 182     uint32_t reg;
 183
 184     so = CALLOC_STRUCT(nvc0_rasterizer_stateobj);
 185     if (!so)
 186         return NULL;
 187     so->pipe = *cso;
 188
 189     /* Scissor enables are handled in scissor state, we will not want to
 190      * always emit 16 commands, one for each scissor rectangle, here.
 191      */
 192
 193     SB_BEGIN_3D(so, SHADE_MODEL, 1);
 194     SB_DATA    (so, cso->flatshade ? NVC0_3D_SHADE_MODEL_FLAT :
 195                                      NVC0_3D_SHADE_MODEL_SMOOTH);
 196     SB_IMMED_3D(so, PROVOKING_VERTEX_LAST, !cso->flatshade_first);
 197     SB_IMMED_3D(so, VERTEX_TWO_SIDE_ENABLE, cso->light_twoside);
 198
 199     SB_IMMED_3D(so, VERT_COLOR_CLAMP_EN, cso->clamp_vertex_color);
 200     SB_BEGIN_3D(so, FRAG_COLOR_CLAMP_EN, 1);
 201     SB_DATA    (so, cso->clamp_fragment_color ? 0x11111111 : 0x00000000);
 202
 203     SB_IMMED_3D(so, MULTISAMPLE_ENABLE, cso->multisample);
 204
 205     SB_IMMED_3D(so, LINE_SMOOTH_ENABLE, cso->line_smooth);
 206     if (cso->line_smooth)
 207        SB_BEGIN_3D(so, LINE_WIDTH_SMOOTH, 1);
 208     else
 209        SB_BEGIN_3D(so, LINE_WIDTH_ALIASED, 1);
 210     SB_DATA    (so, fui(cso->line_width));
 211
 212     SB_IMMED_3D(so, LINE_STIPPLE_ENABLE, cso->line_stipple_enable);
 213     if (cso->line_stipple_enable) {
 214         SB_BEGIN_3D(so, LINE_STIPPLE_PATTERN, 1);
 215         SB_DATA    (so, (cso->line_stipple_pattern << 8) |
 216                          cso->line_stipple_factor);
 217
 218     }
 219
 220     SB_IMMED_3D(so, VP_POINT_SIZE_EN, cso->point_size_per_vertex);
 221     if (!cso->point_size_per_vertex) {
 222        SB_BEGIN_3D(so, POINT_SIZE, 1);
 223        SB_DATA    (so, fui(cso->point_size));
 224     }
 225
 226     reg = (cso->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT) ?
 227        NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_UPPER_LEFT :
 228        NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_LOWER_LEFT;
 229
 230     SB_BEGIN_3D(so, POINT_COORD_REPLACE, 1);
 231     SB_DATA    (so, ((cso->sprite_coord_enable & 0xff) << 3) | reg);
 232     SB_IMMED_3D(so, POINT_SPRITE_ENABLE, cso->point_quad_rasterization);
 233     SB_IMMED_3D(so, POINT_SMOOTH_ENABLE, cso->point_smooth);
 234
 235     SB_BEGIN_3D(so, POLYGON_MODE_FRONT, 1);
 236     SB_DATA    (so, nvgl_polygon_mode(cso->fill_front));
 237     SB_BEGIN_3D(so, POLYGON_MODE_BACK, 1);
 238     SB_DATA    (so, nvgl_polygon_mode(cso->fill_back));
 239     SB_IMMED_3D(so, POLYGON_SMOOTH_ENABLE, cso->poly_smooth);
 240
 241     SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3);
 242     SB_DATA    (so, cso->cull_face != PIPE_FACE_NONE);
 243     SB_DATA    (so, cso->front_ccw ? NVC0_3D_FRONT_FACE_CCW :
 244                                      NVC0_3D_FRONT_FACE_CW);
 245     switch (cso->cull_face) {
 246     case PIPE_FACE_FRONT_AND_BACK:
 247        SB_DATA(so, NVC0_3D_CULL_FACE_FRONT_AND_BACK);
 248        break;
 249     case PIPE_FACE_FRONT:
 250        SB_DATA(so, NVC0_3D_CULL_FACE_FRONT);
 251        break;
 252     case PIPE_FACE_BACK:
 253     default:
 254        SB_DATA(so, NVC0_3D_CULL_FACE_BACK);
 255        break;
 256     }
 257
 258     SB_IMMED_3D(so, POLYGON_STIPPLE_ENABLE, cso->poly_stipple_enable);
 259     SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3);
 260     SB_DATA    (so, cso->offset_point);
 261     SB_DATA    (so, cso->offset_line);
 262     SB_DATA    (so, cso->offset_tri);
 263
 264     if (cso->offset_point || cso->offset_line || cso->offset_tri) {
 265         SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1);
 266         SB_DATA    (so, fui(cso->offset_scale));
 267         SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1);
 268         SB_DATA    (so, fui(cso->offset_units * 2.0f));
 269         SB_BEGIN_3D(so, POLYGON_OFFSET_CLAMP, 1);
 270         SB_DATA    (so, fui(cso->offset_clamp));
 271     }
 272
 273     assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 274     return (void *)so;
 275 }
 276
 277 static void
 278 nvc0_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
 279 {
 280    struct nvc0_context *nvc0 = nvc0_context(pipe);
 281
 282    nvc0->rast = hwcso;
 283    nvc0->dirty |= NVC0_NEW_RASTERIZER;
 284 }
 285
 286 static void
 287 nvc0_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
 288 {
 289    FREE(hwcso);
 290 }
 291
 292 static void *
 293 nvc0_zsa_state_create(struct pipe_context *pipe,
 294                       const struct pipe_depth_stencil_alpha_state *cso)
 295 {
 296    struct nvc0_zsa_stateobj *so = CALLOC_STRUCT(nvc0_zsa_stateobj);
 297
 298    so->pipe = *cso;
 299
 300    SB_IMMED_3D(so, DEPTH_TEST_ENABLE, cso->depth.enabled);
 301    if (cso->depth.enabled) {
 302       SB_IMMED_3D(so, DEPTH_WRITE_ENABLE, cso->depth.writemask);
 303       SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
 304       SB_DATA    (so, nvgl_comparison_op(cso->depth.func));
 305    }
 306
 307    if (cso->stencil[0].enabled) {
 308       SB_BEGIN_3D(so, STENCIL_ENABLE, 5);
 309       SB_DATA    (so, 1);
 310       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].fail_op));
 311       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
 312       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
 313       SB_DATA    (so, nvgl_comparison_op(cso->stencil[0].func));
 314       SB_BEGIN_3D(so, STENCIL_FRONT_FUNC_MASK, 2);
 315       SB_DATA    (so, cso->stencil[0].valuemask);
 316       SB_DATA    (so, cso->stencil[0].writemask);
 317    } else {
 318       SB_IMMED_3D(so, STENCIL_ENABLE, 0);
 319    }
 320
 321    if (cso->stencil[1].enabled) {
 322       assert(cso->stencil[0].enabled);
 323       SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5);
 324       SB_DATA    (so, 1);
 325       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].fail_op));
 326       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
 327       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
 328       SB_DATA    (so, nvgl_comparison_op(cso->stencil[1].func));
 329       SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2);
 330       SB_DATA    (so, cso->stencil[1].writemask);
 331       SB_DATA    (so, cso->stencil[1].valuemask);
 332    } else
 333    if (cso->stencil[0].enabled) {
 334       SB_IMMED_3D(so, STENCIL_TWO_SIDE_ENABLE, 0);
 335    }
 336
 337    SB_IMMED_3D(so, ALPHA_TEST_ENABLE, cso->alpha.enabled);
 338    if (cso->alpha.enabled) {
 339       SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
 340       SB_DATA    (so, fui(cso->alpha.ref_value));
 341       SB_DATA    (so, nvgl_comparison_op(cso->alpha.func));
 342    }
 343
 344    assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 345    return (void *)so;
 346 }
 347
 348 static void
 349 nvc0_zsa_state_bind(struct pipe_context *pipe, void *hwcso)
 350 {
 351    struct nvc0_context *nvc0 = nvc0_context(pipe);
 352
 353    nvc0->zsa = hwcso;
 354    nvc0->dirty |= NVC0_NEW_ZSA;
 355 }
 356
 357 static void
 358 nvc0_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
 359 {
 360    FREE(hwcso);
 361 }
 362
 363 /* ====================== SAMPLERS AND TEXTURES ================================
 364  */
 365
 366 #define NV50_TSC_WRAP_CASE(n) \
 367     case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
 368
 369 static INLINE unsigned
 370 nv50_tsc_wrap_mode(unsigned wrap)
 371 {
 372    switch (wrap) {
 373    NV50_TSC_WRAP_CASE(REPEAT);
 374    NV50_TSC_WRAP_CASE(MIRROR_REPEAT);
 375    NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE);
 376    NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER);
 377    NV50_TSC_WRAP_CASE(CLAMP);
 378    NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE);
 379    NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER);
 380    NV50_TSC_WRAP_CASE(MIRROR_CLAMP);
 381    default:
 382        NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
 383        return NV50_TSC_WRAP_REPEAT;
 384    }
 385 }
 386
 387 static void
 388 nvc0_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
 389 {
 390    unsigned s, i;
 391
 392    for (s = 0; s < 5; ++s)
 393       for (i = 0; i < nvc0_context(pipe)->num_samplers[s]; ++i)
 394          if (nvc0_context(pipe)->samplers[s][i] == hwcso)
 395             nvc0_context(pipe)->samplers[s][i] = NULL;
 396
 397    nvc0_screen_tsc_free(nvc0_context(pipe)->screen, nv50_tsc_entry(hwcso));
 398
 399    FREE(hwcso);
 400 }
 401
 402 static INLINE void
 403 nvc0_stage_sampler_states_bind(struct nvc0_context *nvc0, int s,
 404                                unsigned nr, void **hwcso)
 405 {
 406    unsigned i;
 407
 408    for (i = 0; i < nr; ++i) {
 409       struct nv50_tsc_entry *old = nvc0->samplers[s][i];
 410
 411       nvc0->samplers[s][i] = nv50_tsc_entry(hwcso[i]);
 412       if (old)
 413          nvc0_screen_tsc_unlock(nvc0->screen, old);
 414    }
 415    for (; i < nvc0->num_samplers[s]; ++i)
 416       if (nvc0->samplers[s][i])
 417          nvc0_screen_tsc_unlock(nvc0->screen, nvc0->samplers[s][i]);
 418
 419    nvc0->num_samplers[s] = nr;
 420
 421    nvc0->dirty |= NVC0_NEW_SAMPLERS;
 422 }
 423
 424 static void
 425 nvc0_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 426 {
 427    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 0, nr, s);
 428 }
 429
 430 static void
 431 nvc0_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 432 {
 433    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 4, nr, s);
 434 }
 435
 436 static void
 437 nvc0_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 438 {
 439    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 3, nr, s);
 440 }
 441
 442 /* NOTE: only called when not referenced anywhere, won't be bound */
 443 static void
 444 nvc0_sampler_view_destroy(struct pipe_context *pipe,
 445                           struct pipe_sampler_view *view)
 446 {
 447    pipe_resource_reference(&view->texture, NULL);
 448
 449    nvc0_screen_tic_free(nvc0_context(pipe)->screen, nv50_tic_entry(view));
 450
 451    FREE(nv50_tic_entry(view));
 452 }
 453
 454 static INLINE void
 455 nvc0_stage_set_sampler_views(struct nvc0_context *nvc0, int s,
 456                              unsigned nr,
 457                              struct pipe_sampler_view **views)
 458 {
 459    unsigned i;
 460
 461    for (i = 0; i < nr; ++i) {
 462       struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]);
 463       if (old)
 464          nvc0_screen_tic_unlock(nvc0->screen, old);
 465
 466       pipe_sampler_view_reference(&nvc0->textures[s][i], views[i]);
 467    }
 468
 469    for (i = nr; i < nvc0->num_textures[s]; ++i) {
 470       struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]);
 471       if (!old)
 472          continue;
 473       nvc0_screen_tic_unlock(nvc0->screen, old);
 474
 475       pipe_sampler_view_reference(&nvc0->textures[s][i], NULL);
 476    }
 477
 478    nvc0->num_textures[s] = nr;
 479
 480    nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_TEXTURES);
 481
 482    nvc0->dirty |= NVC0_NEW_TEXTURES;
 483 }
 484
 485 static void
 486 nvc0_vp_set_sampler_views(struct pipe_context *pipe,
 487                           unsigned nr,
 488                           struct pipe_sampler_view **views)
 489 {
 490    nvc0_stage_set_sampler_views(nvc0_context(pipe), 0, nr, views);
 491 }
 492
 493 static void
 494 nvc0_fp_set_sampler_views(struct pipe_context *pipe,
 495                           unsigned nr,
 496                           struct pipe_sampler_view **views)
 497 {
 498    nvc0_stage_set_sampler_views(nvc0_context(pipe), 4, nr, views);
 499 }
 500
 501 static void
 502 nvc0_gp_set_sampler_views(struct pipe_context *pipe,
 503                           unsigned nr,
 504                           struct pipe_sampler_view **views)
 505 {
 506    nvc0_stage_set_sampler_views(nvc0_context(pipe), 3, nr, views);
 507 }
 508
 509 /* ============================= SHADERS =======================================
 510  */
 511
 512 static void *
 513 nvc0_sp_state_create(struct pipe_context *pipe,
 514                      const struct pipe_shader_state *cso, unsigned type)
 515 {
 516    struct nvc0_program *prog;
 517
 518    prog = CALLOC_STRUCT(nvc0_program);
 519    if (!prog)
 520       return NULL;
 521
 522    prog->type = type;
 523
 524    if (cso->tokens)
 525       prog->pipe.tokens = tgsi_dup_tokens(cso->tokens);
 526
 527    if (cso->stream_output.num_outputs)
 528       prog->pipe.stream_output = cso->stream_output;
 529
 530    return (void *)prog;
 531 }
 532
 533 static void
 534 nvc0_sp_state_delete(struct pipe_context *pipe, void *hwcso)
 535 {
 536    struct nvc0_program *prog = (struct nvc0_program *)hwcso;
 537
 538    nvc0_program_destroy(nvc0_context(pipe), prog);
 539
 540    FREE((void *)prog->pipe.tokens);
 541    FREE(prog);
 542 }
 543
 544 static void *
 545 nvc0_vp_state_create(struct pipe_context *pipe,
 546                      const struct pipe_shader_state *cso)
 547 {
 548    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
 549 }
 550
 551 static void
 552 nvc0_vp_state_bind(struct pipe_context *pipe, void *hwcso)
 553 {
 554     struct nvc0_context *nvc0 = nvc0_context(pipe);
 555
 556     nvc0->vertprog = hwcso;
 557     nvc0->dirty |= NVC0_NEW_VERTPROG;
 558 }
 559
 560 static void *
 561 nvc0_fp_state_create(struct pipe_context *pipe,
 562                      const struct pipe_shader_state *cso)
 563 {
 564    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
 565 }
 566
 567 static void
 568 nvc0_fp_state_bind(struct pipe_context *pipe, void *hwcso)
 569 {
 570     struct nvc0_context *nvc0 = nvc0_context(pipe);
 571
 572     nvc0->fragprog = hwcso;
 573     nvc0->dirty |= NVC0_NEW_FRAGPROG;
 574 }
 575
 576 static void *
 577 nvc0_gp_state_create(struct pipe_context *pipe,
 578                      const struct pipe_shader_state *cso)
 579 {
 580    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY);
 581 }
 582
 583 static void
 584 nvc0_gp_state_bind(struct pipe_context *pipe, void *hwcso)
 585 {
 586     struct nvc0_context *nvc0 = nvc0_context(pipe);
 587
 588     nvc0->gmtyprog = hwcso;
 589     nvc0->dirty |= NVC0_NEW_GMTYPROG;
 590 }
 591
 592 static void
 593 nvc0_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
 594                          struct pipe_resource *res)
 595 {
 596    struct nvc0_context *nvc0 = nvc0_context(pipe);
 597
 598    switch (shader) {
 599    case PIPE_SHADER_VERTEX: shader = 0; break;
 600       /*
 601    case PIPE_SHADER_TESSELLATION_CONTROL: shader = 1; break;
 602    case PIPE_SHADER_TESSELLATION_EVALUATION: shader = 2; break;
 603       */
 604    case PIPE_SHADER_GEOMETRY: shader = 3; break;
 605    case PIPE_SHADER_FRAGMENT: shader = 4; break;
 606    default:
 607       assert(0);
 608       break;
 609    }
 610
 611    if (nvc0->constbuf[shader][index])
 612       nvc0_bufctx_del_resident(nvc0, NVC0_BUFCTX_CONSTANT,
 613                                nv04_resource(nvc0->constbuf[shader][index]));
 614
 615    pipe_resource_reference(&nvc0->constbuf[shader][index], res);
 616
 617    nvc0->constbuf_dirty[shader] |= 1 << index;
 618
 619    nvc0->dirty |= NVC0_NEW_CONSTBUF;
 620 }
 621
 622 /* =============================================================================
 623  */
 624
 625 static void
 626 nvc0_set_blend_color(struct pipe_context *pipe,
 627                      const struct pipe_blend_color *bcol)
 628 {
 629     struct nvc0_context *nvc0 = nvc0_context(pipe);
 630
 631     nvc0->blend_colour = *bcol;
 632     nvc0->dirty |= NVC0_NEW_BLEND_COLOUR;
 633 }
 634
 635 static void
 636 nvc0_set_stencil_ref(struct pipe_context *pipe,
 637                      const struct pipe_stencil_ref *sr)
 638 {
 639     struct nvc0_context *nvc0 = nvc0_context(pipe);
 640
 641     nvc0->stencil_ref = *sr;
 642     nvc0->dirty |= NVC0_NEW_STENCIL_REF;
 643 }
 644
 645 static void
 646 nvc0_set_clip_state(struct pipe_context *pipe,
 647                     const struct pipe_clip_state *clip)
 648 {
 649     struct nvc0_context *nvc0 = nvc0_context(pipe);
 650     const unsigned size = clip->nr * sizeof(clip->ucp[0]);
 651
 652     memcpy(&nvc0->clip.ucp[0][0], &clip->ucp[0][0], size);
 653     nvc0->clip.nr = clip->nr;
 654
 655     nvc0->clip.depth_clamp = clip->depth_clamp;
 656
 657     nvc0->dirty |= NVC0_NEW_CLIP;
 658 }
 659
 660 static void
 661 nvc0_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
 662 {
 663     struct nvc0_context *nvc0 = nvc0_context(pipe);
 664
 665     nvc0->sample_mask = sample_mask;
 666     nvc0->dirty |= NVC0_NEW_SAMPLE_MASK;
 667 }
 668
 669
 670 static void
 671 nvc0_set_framebuffer_state(struct pipe_context *pipe,
 672                            const struct pipe_framebuffer_state *fb)
 673 {
 674     struct nvc0_context *nvc0 = nvc0_context(pipe);
 675
 676     nvc0->framebuffer = *fb;
 677     nvc0->dirty |= NVC0_NEW_FRAMEBUFFER;
 678 }
 679
 680 static void
 681 nvc0_set_polygon_stipple(struct pipe_context *pipe,
 682                          const struct pipe_poly_stipple *stipple)
 683 {
 684     struct nvc0_context *nvc0 = nvc0_context(pipe);
 685
 686     nvc0->stipple = *stipple;
 687     nvc0->dirty |= NVC0_NEW_STIPPLE;
 688 }
 689
 690 static void
 691 nvc0_set_scissor_state(struct pipe_context *pipe,
 692                        const struct pipe_scissor_state *scissor)
 693 {
 694     struct nvc0_context *nvc0 = nvc0_context(pipe);
 695
 696     nvc0->scissor = *scissor;
 697     nvc0->dirty |= NVC0_NEW_SCISSOR;
 698 }
 699
 700 static void
 701 nvc0_set_viewport_state(struct pipe_context *pipe,
 702                         const struct pipe_viewport_state *vpt)
 703 {
 704     struct nvc0_context *nvc0 = nvc0_context(pipe);
 705
 706     nvc0->viewport = *vpt;
 707     nvc0->dirty |= NVC0_NEW_VIEWPORT;
 708 }
 709
 710 static void
 711 nvc0_set_vertex_buffers(struct pipe_context *pipe,
 712                         unsigned count,
 713                         const struct pipe_vertex_buffer *vb)
 714 {
 715     struct nvc0_context *nvc0 = nvc0_context(pipe);
 716     unsigned i;
 717
 718     for (i = 0; i < count; ++i)
 719        pipe_resource_reference(&nvc0->vtxbuf[i].buffer, vb[i].buffer);
 720     for (; i < nvc0->num_vtxbufs; ++i)
 721        pipe_resource_reference(&nvc0->vtxbuf[i].buffer, NULL);
 722
 723     memcpy(nvc0->vtxbuf, vb, sizeof(*vb) * count);
 724     nvc0->num_vtxbufs = count;
 725
 726     nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_VERTEX);
 727
 728     nvc0->dirty |= NVC0_NEW_ARRAYS;
 729 }
 730
 731 static void
 732 nvc0_set_index_buffer(struct pipe_context *pipe,
 733                       const struct pipe_index_buffer *ib)
 734 {
 735     struct nvc0_context *nvc0 = nvc0_context(pipe);
 736
 737     if (ib) {
 738        pipe_resource_reference(&nvc0->idxbuf.buffer, ib->buffer);
 739
 740        memcpy(&nvc0->idxbuf, ib, sizeof(nvc0->idxbuf));
 741     } else {
 742        pipe_resource_reference(&nvc0->idxbuf.buffer, NULL);
 743     }
 744 }
 745
 746 static void
 747 nvc0_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
 748 {
 749     struct nvc0_context *nvc0 = nvc0_context(pipe);
 750
 751     nvc0->vertex = hwcso;
 752     nvc0->dirty |= NVC0_NEW_VERTEX;
 753 }
 754
 755 static struct pipe_stream_output_target *
 756 nvc0_so_target_create(struct pipe_context *pipe,
 757                       struct pipe_resource *res,
 758                       unsigned offset, unsigned size)
 759 {
 760    struct nvc0_so_target *targ = MALLOC_STRUCT(nvc0_so_target);
 761    if (!targ)
 762       return NULL;
 763
 764    targ->pq = pipe->create_query(pipe, NVC0_QUERY_TFB_BUFFER_OFFSET);
 765    if (!targ->pq) {
 766       FREE(targ);
 767       return NULL;
 768    }
 769    targ->clean = TRUE;
 770
 771    targ->pipe.buffer_size = size;
 772    targ->pipe.buffer_offset = offset;
 773    targ->pipe.context = pipe;
 774    targ->pipe.buffer = NULL;
 775    pipe_resource_reference(&targ->pipe.buffer, res);
 776    pipe_reference_init(&targ->pipe.reference, 1);
 777
 778    return &targ->pipe;
 779 }
 780
 781 static void
 782 nvc0_so_target_destroy(struct pipe_context *pipe,
 783                        struct pipe_stream_output_target *ptarg)
 784 {
 785    struct nvc0_so_target *targ = nvc0_so_target(ptarg);
 786    pipe->destroy_query(pipe, targ->pq);
 787    FREE(targ);
 788 }
 789
 790 static void
 791 nvc0_set_transform_feedback_targets(struct pipe_context *pipe,
 792                                     unsigned num_targets,
 793                                     struct pipe_stream_output_target **targets,
 794                                     unsigned append_mask)
 795 {
 796    struct nvc0_context *nvc0 = nvc0_context(pipe);
 797    unsigned i;
 798    boolean serialize = TRUE;
 799
 800    assert(num_targets <= 4);
 801
 802    for (i = 0; i < num_targets; ++i) {
 803       if (nvc0->tfbbuf[i] == targets[i] && (append_mask & (1 << i)))
 804          continue;
 805       nvc0->tfbbuf_dirty |= 1 << i;
 806
 807       if (nvc0->tfbbuf[i] && nvc0->tfbbuf[i] != targets[i])
 808          nvc0_so_target_save_offset(pipe, nvc0->tfbbuf[i], i, &serialize);
 809
 810       if (targets[i] && !(append_mask & (1 << i)))
 811          nvc0_so_target(targets[i])->clean = TRUE;
 812
 813       pipe_so_target_reference(&nvc0->tfbbuf[i], targets[i]);
 814    }
 815    for (; i < nvc0->num_tfbbufs; ++i) {
 816       nvc0->tfbbuf_dirty |= 1 << i;
 817       nvc0_so_target_save_offset(pipe, nvc0->tfbbuf[i], i, &serialize);
 818       pipe_so_target_reference(&nvc0->tfbbuf[i], NULL);
 819    }
 820    nvc0->num_tfbbufs = num_targets;
 821
 822    if (nvc0->tfbbuf_dirty)
 823       nvc0->dirty |= NVC0_NEW_TFB_TARGETS;
 824 }
 825
 826 void
 827 nvc0_init_state_functions(struct nvc0_context *nvc0)
 828 {
 829    struct pipe_context *pipe = &nvc0->base.pipe;
 830
 831    pipe->create_blend_state = nvc0_blend_state_create;
 832    pipe->bind_blend_state = nvc0_blend_state_bind;
 833    pipe->delete_blend_state = nvc0_blend_state_delete;
 834
 835    pipe->create_rasterizer_state = nvc0_rasterizer_state_create;
 836    pipe->bind_rasterizer_state = nvc0_rasterizer_state_bind;
 837    pipe->delete_rasterizer_state = nvc0_rasterizer_state_delete;
 838
 839    pipe->create_depth_stencil_alpha_state = nvc0_zsa_state_create;
 840    pipe->bind_depth_stencil_alpha_state = nvc0_zsa_state_bind;
 841    pipe->delete_depth_stencil_alpha_state = nvc0_zsa_state_delete;
 842
 843    pipe->create_sampler_state = nv50_sampler_state_create;
 844    pipe->delete_sampler_state = nvc0_sampler_state_delete;
 845    pipe->bind_vertex_sampler_states   = nvc0_vp_sampler_states_bind;
 846    pipe->bind_fragment_sampler_states = nvc0_fp_sampler_states_bind;
 847    pipe->bind_geometry_sampler_states = nvc0_gp_sampler_states_bind;
 848
 849    pipe->create_sampler_view = nvc0_create_sampler_view;
 850    pipe->sampler_view_destroy = nvc0_sampler_view_destroy;
 851    pipe->set_vertex_sampler_views   = nvc0_vp_set_sampler_views;
 852    pipe->set_fragment_sampler_views = nvc0_fp_set_sampler_views;
 853    pipe->set_geometry_sampler_views = nvc0_gp_set_sampler_views;
 854
 855    pipe->create_vs_state = nvc0_vp_state_create;
 856    pipe->create_fs_state = nvc0_fp_state_create;
 857    pipe->create_gs_state = nvc0_gp_state_create;
 858    pipe->bind_vs_state = nvc0_vp_state_bind;
 859    pipe->bind_fs_state = nvc0_fp_state_bind;
 860    pipe->bind_gs_state = nvc0_gp_state_bind;
 861    pipe->delete_vs_state = nvc0_sp_state_delete;
 862    pipe->delete_fs_state = nvc0_sp_state_delete;
 863    pipe->delete_gs_state = nvc0_sp_state_delete;
 864
 865    pipe->set_blend_color = nvc0_set_blend_color;
 866    pipe->set_stencil_ref = nvc0_set_stencil_ref;
 867    pipe->set_clip_state = nvc0_set_clip_state;
 868    pipe->set_sample_mask = nvc0_set_sample_mask;
 869    pipe->set_constant_buffer = nvc0_set_constant_buffer;
 870    pipe->set_framebuffer_state = nvc0_set_framebuffer_state;
 871    pipe->set_polygon_stipple = nvc0_set_polygon_stipple;
 872    pipe->set_scissor_state = nvc0_set_scissor_state;
 873    pipe->set_viewport_state = nvc0_set_viewport_state;
 874
 875    pipe->create_vertex_elements_state = nvc0_vertex_state_create;
 876    pipe->delete_vertex_elements_state = nvc0_vertex_state_delete;
 877    pipe->bind_vertex_elements_state = nvc0_vertex_state_bind;
 878
 879    pipe->set_vertex_buffers = nvc0_set_vertex_buffers;
 880    pipe->set_index_buffer = nvc0_set_index_buffer;
 881
 882    pipe->create_stream_output_target = nvc0_so_target_create;
 883    pipe->stream_output_target_destroy = nvc0_so_target_destroy;
 884    pipe->set_stream_output_targets = nvc0_set_transform_feedback_targets;
 885
 886    pipe->redefine_user_buffer = u_default_redefine_user_buffer;
 887 }
 888