src/gallium/drivers/nvc0/nvc0_state.c

   1 /*
   2  * Copyright 2010 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "pipe/p_defines.h"
  24 #include "util/u_helpers.h"
  25 #include "util/u_inlines.h"
  26 #include "util/u_transfer.h"
  27
  28 #include "tgsi/tgsi_parse.h"
  29
  30 #include "nvc0_stateobj.h"
  31 #include "nvc0_context.h"
  32
  33 #include "nvc0_3d.xml.h"
  34 #include "nv50/nv50_texture.xml.h"
  35
  36 #include "nouveau/nouveau_gldefs.h"
  37
  38 static INLINE uint32_t
  39 nvc0_colormask(unsigned mask)
  40 {
  41     uint32_t ret = 0;
  42
  43     if (mask & PIPE_MASK_R)
  44         ret |= 0x0001;
  45     if (mask & PIPE_MASK_G)
  46         ret |= 0x0010;
  47     if (mask & PIPE_MASK_B)
  48         ret |= 0x0100;
  49     if (mask & PIPE_MASK_A)
  50         ret |= 0x1000;
  51
  52     return ret;
  53 }
  54
  55 #define NVC0_BLEND_FACTOR_CASE(a, b) \
  56    case PIPE_BLENDFACTOR_##a: return NV50_3D_BLEND_FACTOR_##b
  57
  58 static INLINE uint32_t
  59 nvc0_blend_fac(unsigned factor)
  60 {
  61    switch (factor) {
  62    NVC0_BLEND_FACTOR_CASE(ONE, ONE);
  63    NVC0_BLEND_FACTOR_CASE(SRC_COLOR, SRC_COLOR);
  64    NVC0_BLEND_FACTOR_CASE(SRC_ALPHA, SRC_ALPHA);
  65    NVC0_BLEND_FACTOR_CASE(DST_ALPHA, DST_ALPHA);
  66    NVC0_BLEND_FACTOR_CASE(DST_COLOR, DST_COLOR);
  67    NVC0_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE, SRC_ALPHA_SATURATE);
  68    NVC0_BLEND_FACTOR_CASE(CONST_COLOR, CONSTANT_COLOR);
  69    NVC0_BLEND_FACTOR_CASE(CONST_ALPHA, CONSTANT_ALPHA);
  70    NVC0_BLEND_FACTOR_CASE(SRC1_COLOR, SRC1_COLOR);
  71    NVC0_BLEND_FACTOR_CASE(SRC1_ALPHA, SRC1_ALPHA);
  72    NVC0_BLEND_FACTOR_CASE(ZERO, ZERO);
  73    NVC0_BLEND_FACTOR_CASE(INV_SRC_COLOR, ONE_MINUS_SRC_COLOR);
  74    NVC0_BLEND_FACTOR_CASE(INV_SRC_ALPHA, ONE_MINUS_SRC_ALPHA);
  75    NVC0_BLEND_FACTOR_CASE(INV_DST_ALPHA, ONE_MINUS_DST_ALPHA);
  76    NVC0_BLEND_FACTOR_CASE(INV_DST_COLOR, ONE_MINUS_DST_COLOR);
  77    NVC0_BLEND_FACTOR_CASE(INV_CONST_COLOR, ONE_MINUS_CONSTANT_COLOR);
  78    NVC0_BLEND_FACTOR_CASE(INV_CONST_ALPHA, ONE_MINUS_CONSTANT_ALPHA);
  79    NVC0_BLEND_FACTOR_CASE(INV_SRC1_COLOR, ONE_MINUS_SRC1_COLOR);
  80    NVC0_BLEND_FACTOR_CASE(INV_SRC1_ALPHA, ONE_MINUS_SRC1_ALPHA);
  81    default:
  82       return NV50_3D_BLEND_FACTOR_ZERO;
  83    }
  84 }
  85
  86 static void *
  87 nvc0_blend_state_create(struct pipe_context *pipe,
  88                         const struct pipe_blend_state *cso)
  89 {
  90    struct nvc0_blend_stateobj *so = CALLOC_STRUCT(nvc0_blend_stateobj);
  91    int i;
  92    int r; /* reference */
  93    uint32_t ms;
  94    uint8_t blend_en = 0;
  95    boolean indep_masks = FALSE;
  96    boolean indep_funcs = FALSE;
  97
  98    so->pipe = *cso;
  99
 100    /* check which states actually have differing values */
 101    if (cso->independent_blend_enable) {
 102       for (r = 0; r < 8 && !cso->rt[r].blend_enable; ++r);
 103       blend_en |= 1 << r;
 104       for (i = r + 1; i < 8; ++i) {
 105          if (!cso->rt[i].blend_enable)
 106             continue;
 107          blend_en |= 1 << i;
 108          if (cso->rt[i].rgb_func != cso->rt[r].rgb_func ||
 109              cso->rt[i].rgb_src_factor != cso->rt[r].rgb_src_factor ||
 110              cso->rt[i].rgb_dst_factor != cso->rt[r].rgb_dst_factor ||
 111              cso->rt[i].alpha_func != cso->rt[r].alpha_func ||
 112              cso->rt[i].alpha_src_factor != cso->rt[r].alpha_src_factor ||
 113              cso->rt[i].alpha_dst_factor != cso->rt[r].alpha_dst_factor) {
 114             indep_funcs = TRUE;
 115             break;
 116          }
 117       }
 118       for (; i < 8; ++i)
 119          blend_en |= (cso->rt[i].blend_enable ? 1 : 0) << i;
 120
 121       for (i = 1; i < 8; ++i) {
 122          if (cso->rt[i].colormask != cso->rt[0].colormask) {
 123             indep_masks = TRUE;
 124             break;
 125          }
 126       }
 127    } else {
 128       r = 0;
 129       if (cso->rt[0].blend_enable)
 130          blend_en = 0xff;
 131    }
 132
 133    if (cso->logicop_enable) {
 134       SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2);
 135       SB_DATA    (so, 1);
 136       SB_DATA    (so, nvgl_logicop_func(cso->logicop_func));
 137
 138       SB_IMMED_3D(so, MACRO_BLEND_ENABLES, 0);
 139    } else {
 140       SB_IMMED_3D(so, LOGIC_OP_ENABLE, 0);
 141
 142       SB_IMMED_3D(so, BLEND_INDEPENDENT, indep_funcs);
 143       SB_IMMED_3D(so, MACRO_BLEND_ENABLES, blend_en);
 144       if (indep_funcs) {
 145          for (i = 0; i < 8; ++i) {
 146             if (cso->rt[i].blend_enable) {
 147                SB_BEGIN_3D(so, IBLEND_EQUATION_RGB(i), 6);
 148                SB_DATA    (so, nvgl_blend_eqn(cso->rt[i].rgb_func));
 149                SB_DATA    (so, nvc0_blend_fac(cso->rt[i].rgb_src_factor));
 150                SB_DATA    (so, nvc0_blend_fac(cso->rt[i].rgb_dst_factor));
 151                SB_DATA    (so, nvgl_blend_eqn(cso->rt[i].alpha_func));
 152                SB_DATA    (so, nvc0_blend_fac(cso->rt[i].alpha_src_factor));
 153                SB_DATA    (so, nvc0_blend_fac(cso->rt[i].alpha_dst_factor));
 154             }
 155          }
 156       } else
 157       if (blend_en) {
 158          SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5);
 159          SB_DATA    (so, nvgl_blend_eqn(cso->rt[r].rgb_func));
 160          SB_DATA    (so, nvc0_blend_fac(cso->rt[r].rgb_src_factor));
 161          SB_DATA    (so, nvc0_blend_fac(cso->rt[r].rgb_dst_factor));
 162          SB_DATA    (so, nvgl_blend_eqn(cso->rt[r].alpha_func));
 163          SB_DATA    (so, nvc0_blend_fac(cso->rt[r].alpha_src_factor));
 164          SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1);
 165          SB_DATA    (so, nvc0_blend_fac(cso->rt[r].alpha_dst_factor));
 166       }
 167
 168       SB_IMMED_3D(so, COLOR_MASK_COMMON, !indep_masks);
 169       if (indep_masks) {
 170          SB_BEGIN_3D(so, COLOR_MASK(0), 8);
 171          for (i = 0; i < 8; ++i)
 172             SB_DATA(so, nvc0_colormask(cso->rt[i].colormask));
 173       } else {
 174          SB_BEGIN_3D(so, COLOR_MASK(0), 1);
 175          SB_DATA    (so, nvc0_colormask(cso->rt[0].colormask));
 176       }
 177    }
 178
 179    ms = 0;
 180    if (cso->alpha_to_coverage)
 181       ms |= NVC0_3D_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE;
 182    if (cso->alpha_to_one)
 183       ms |= NVC0_3D_MULTISAMPLE_CTRL_ALPHA_TO_ONE;
 184
 185    SB_BEGIN_3D(so, MULTISAMPLE_CTRL, 1);
 186    SB_DATA    (so, ms);
 187
 188    assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 189    return so;
 190 }
 191
 192 static void
 193 nvc0_blend_state_bind(struct pipe_context *pipe, void *hwcso)
 194 {
 195     struct nvc0_context *nvc0 = nvc0_context(pipe);
 196
 197     nvc0->blend = hwcso;
 198     nvc0->dirty |= NVC0_NEW_BLEND;
 199 }
 200
 201 static void
 202 nvc0_blend_state_delete(struct pipe_context *pipe, void *hwcso)
 203 {
 204     FREE(hwcso);
 205 }
 206
 207 /* NOTE: ignoring line_last_pixel, using FALSE (set on screen init) */
 208 static void *
 209 nvc0_rasterizer_state_create(struct pipe_context *pipe,
 210                              const struct pipe_rasterizer_state *cso)
 211 {
 212     struct nvc0_rasterizer_stateobj *so;
 213     uint32_t reg;
 214
 215     so = CALLOC_STRUCT(nvc0_rasterizer_stateobj);
 216     if (!so)
 217         return NULL;
 218     so->pipe = *cso;
 219
 220     /* Scissor enables are handled in scissor state, we will not want to
 221      * always emit 16 commands, one for each scissor rectangle, here.
 222      */
 223
 224     SB_BEGIN_3D(so, SHADE_MODEL, 1);
 225     SB_DATA    (so, cso->flatshade ? NVC0_3D_SHADE_MODEL_FLAT :
 226                                      NVC0_3D_SHADE_MODEL_SMOOTH);
 227     SB_IMMED_3D(so, PROVOKING_VERTEX_LAST, !cso->flatshade_first);
 228     SB_IMMED_3D(so, VERTEX_TWO_SIDE_ENABLE, cso->light_twoside);
 229
 230     SB_IMMED_3D(so, VERT_COLOR_CLAMP_EN, cso->clamp_vertex_color);
 231     SB_BEGIN_3D(so, FRAG_COLOR_CLAMP_EN, 1);
 232     SB_DATA    (so, cso->clamp_fragment_color ? 0x11111111 : 0x00000000);
 233
 234     SB_IMMED_3D(so, MULTISAMPLE_ENABLE, cso->multisample);
 235
 236     SB_IMMED_3D(so, LINE_SMOOTH_ENABLE, cso->line_smooth);
 237     if (cso->line_smooth)
 238        SB_BEGIN_3D(so, LINE_WIDTH_SMOOTH, 1);
 239     else
 240        SB_BEGIN_3D(so, LINE_WIDTH_ALIASED, 1);
 241     SB_DATA    (so, fui(cso->line_width));
 242
 243     SB_IMMED_3D(so, LINE_STIPPLE_ENABLE, cso->line_stipple_enable);
 244     if (cso->line_stipple_enable) {
 245         SB_BEGIN_3D(so, LINE_STIPPLE_PATTERN, 1);
 246         SB_DATA    (so, (cso->line_stipple_pattern << 8) |
 247                          cso->line_stipple_factor);
 248
 249     }
 250
 251     SB_IMMED_3D(so, VP_POINT_SIZE_EN, cso->point_size_per_vertex);
 252     if (!cso->point_size_per_vertex) {
 253        SB_BEGIN_3D(so, POINT_SIZE, 1);
 254        SB_DATA    (so, fui(cso->point_size));
 255     }
 256
 257     reg = (cso->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT) ?
 258        NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_UPPER_LEFT :
 259        NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_LOWER_LEFT;
 260
 261     SB_BEGIN_3D(so, POINT_COORD_REPLACE, 1);
 262     SB_DATA    (so, ((cso->sprite_coord_enable & 0xff) << 3) | reg);
 263     SB_IMMED_3D(so, POINT_SPRITE_ENABLE, cso->point_quad_rasterization);
 264     SB_IMMED_3D(so, POINT_SMOOTH_ENABLE, cso->point_smooth);
 265
 266     SB_BEGIN_3D(so, MACRO_POLYGON_MODE_FRONT, 1);
 267     SB_DATA    (so, nvgl_polygon_mode(cso->fill_front));
 268     SB_BEGIN_3D(so, MACRO_POLYGON_MODE_BACK, 1);
 269     SB_DATA    (so, nvgl_polygon_mode(cso->fill_back));
 270     SB_IMMED_3D(so, POLYGON_SMOOTH_ENABLE, cso->poly_smooth);
 271
 272     SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3);
 273     SB_DATA    (so, cso->cull_face != PIPE_FACE_NONE);
 274     SB_DATA    (so, cso->front_ccw ? NVC0_3D_FRONT_FACE_CCW :
 275                                      NVC0_3D_FRONT_FACE_CW);
 276     switch (cso->cull_face) {
 277     case PIPE_FACE_FRONT_AND_BACK:
 278        SB_DATA(so, NVC0_3D_CULL_FACE_FRONT_AND_BACK);
 279        break;
 280     case PIPE_FACE_FRONT:
 281        SB_DATA(so, NVC0_3D_CULL_FACE_FRONT);
 282        break;
 283     case PIPE_FACE_BACK:
 284     default:
 285        SB_DATA(so, NVC0_3D_CULL_FACE_BACK);
 286        break;
 287     }
 288
 289     SB_IMMED_3D(so, POLYGON_STIPPLE_ENABLE, cso->poly_stipple_enable);
 290     SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3);
 291     SB_DATA    (so, cso->offset_point);
 292     SB_DATA    (so, cso->offset_line);
 293     SB_DATA    (so, cso->offset_tri);
 294
 295     if (cso->offset_point || cso->offset_line || cso->offset_tri) {
 296         SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1);
 297         SB_DATA    (so, fui(cso->offset_scale));
 298         SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1);
 299         SB_DATA    (so, fui(cso->offset_units * 2.0f));
 300         SB_BEGIN_3D(so, POLYGON_OFFSET_CLAMP, 1);
 301         SB_DATA    (so, fui(cso->offset_clamp));
 302     }
 303
 304     if (cso->depth_clip)
 305        reg = NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1;
 306     else
 307        reg =
 308           NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1 |
 309           NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_NEAR |
 310           NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_FAR |
 311           NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK2;
 312
 313     SB_BEGIN_3D(so, VIEW_VOLUME_CLIP_CTRL, 1);
 314     SB_DATA    (so, reg);
 315
 316     assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 317     return (void *)so;
 318 }
 319
 320 static void
 321 nvc0_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
 322 {
 323    struct nvc0_context *nvc0 = nvc0_context(pipe);
 324
 325    nvc0->rast = hwcso;
 326    nvc0->dirty |= NVC0_NEW_RASTERIZER;
 327 }
 328
 329 static void
 330 nvc0_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
 331 {
 332    FREE(hwcso);
 333 }
 334
 335 static void *
 336 nvc0_zsa_state_create(struct pipe_context *pipe,
 337                       const struct pipe_depth_stencil_alpha_state *cso)
 338 {
 339    struct nvc0_zsa_stateobj *so = CALLOC_STRUCT(nvc0_zsa_stateobj);
 340
 341    so->pipe = *cso;
 342
 343    SB_IMMED_3D(so, DEPTH_TEST_ENABLE, cso->depth.enabled);
 344    if (cso->depth.enabled) {
 345       SB_IMMED_3D(so, DEPTH_WRITE_ENABLE, cso->depth.writemask);
 346       SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
 347       SB_DATA    (so, nvgl_comparison_op(cso->depth.func));
 348    }
 349
 350    if (cso->stencil[0].enabled) {
 351       SB_BEGIN_3D(so, STENCIL_ENABLE, 5);
 352       SB_DATA    (so, 1);
 353       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].fail_op));
 354       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
 355       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
 356       SB_DATA    (so, nvgl_comparison_op(cso->stencil[0].func));
 357       SB_BEGIN_3D(so, STENCIL_FRONT_FUNC_MASK, 2);
 358       SB_DATA    (so, cso->stencil[0].valuemask);
 359       SB_DATA    (so, cso->stencil[0].writemask);
 360    } else {
 361       SB_IMMED_3D(so, STENCIL_ENABLE, 0);
 362    }
 363
 364    if (cso->stencil[1].enabled) {
 365       assert(cso->stencil[0].enabled);
 366       SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5);
 367       SB_DATA    (so, 1);
 368       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].fail_op));
 369       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
 370       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
 371       SB_DATA    (so, nvgl_comparison_op(cso->stencil[1].func));
 372       SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2);
 373       SB_DATA    (so, cso->stencil[1].writemask);
 374       SB_DATA    (so, cso->stencil[1].valuemask);
 375    } else
 376    if (cso->stencil[0].enabled) {
 377       SB_IMMED_3D(so, STENCIL_TWO_SIDE_ENABLE, 0);
 378    }
 379
 380    SB_IMMED_3D(so, ALPHA_TEST_ENABLE, cso->alpha.enabled);
 381    if (cso->alpha.enabled) {
 382       SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
 383       SB_DATA    (so, fui(cso->alpha.ref_value));
 384       SB_DATA    (so, nvgl_comparison_op(cso->alpha.func));
 385    }
 386
 387    assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 388    return (void *)so;
 389 }
 390
 391 static void
 392 nvc0_zsa_state_bind(struct pipe_context *pipe, void *hwcso)
 393 {
 394    struct nvc0_context *nvc0 = nvc0_context(pipe);
 395
 396    nvc0->zsa = hwcso;
 397    nvc0->dirty |= NVC0_NEW_ZSA;
 398 }
 399
 400 static void
 401 nvc0_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
 402 {
 403    FREE(hwcso);
 404 }
 405
 406 /* ====================== SAMPLERS AND TEXTURES ================================
 407  */
 408
 409 #define NV50_TSC_WRAP_CASE(n) \
 410     case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
 411
 412 static INLINE unsigned
 413 nv50_tsc_wrap_mode(unsigned wrap)
 414 {
 415    switch (wrap) {
 416    NV50_TSC_WRAP_CASE(REPEAT);
 417    NV50_TSC_WRAP_CASE(MIRROR_REPEAT);
 418    NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE);
 419    NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER);
 420    NV50_TSC_WRAP_CASE(CLAMP);
 421    NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE);
 422    NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER);
 423    NV50_TSC_WRAP_CASE(MIRROR_CLAMP);
 424    default:
 425        NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
 426        return NV50_TSC_WRAP_REPEAT;
 427    }
 428 }
 429
 430 static void
 431 nvc0_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
 432 {
 433    unsigned s, i;
 434
 435    for (s = 0; s < 5; ++s)
 436       for (i = 0; i < nvc0_context(pipe)->num_samplers[s]; ++i)
 437          if (nvc0_context(pipe)->samplers[s][i] == hwcso)
 438             nvc0_context(pipe)->samplers[s][i] = NULL;
 439
 440    nvc0_screen_tsc_free(nvc0_context(pipe)->screen, nv50_tsc_entry(hwcso));
 441
 442    FREE(hwcso);
 443 }
 444
 445 static INLINE void
 446 nvc0_stage_sampler_states_bind(struct nvc0_context *nvc0, int s,
 447                                unsigned nr, void **hwcso)
 448 {
 449    unsigned i;
 450
 451    for (i = 0; i < nr; ++i) {
 452       struct nv50_tsc_entry *old = nvc0->samplers[s][i];
 453
 454       if (hwcso[i] == old)
 455          continue;
 456       nvc0->samplers_dirty[s] |= 1 << i;
 457
 458       nvc0->samplers[s][i] = nv50_tsc_entry(hwcso[i]);
 459       if (old)
 460          nvc0_screen_tsc_unlock(nvc0->screen, old);
 461    }
 462    for (; i < nvc0->num_samplers[s]; ++i) {
 463       if (nvc0->samplers[s][i]) {
 464          nvc0_screen_tsc_unlock(nvc0->screen, nvc0->samplers[s][i]);
 465          nvc0->samplers[s][i] = NULL;
 466       }
 467    }
 468
 469    nvc0->num_samplers[s] = nr;
 470
 471    nvc0->dirty |= NVC0_NEW_SAMPLERS;
 472 }
 473
 474 static void
 475 nvc0_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 476 {
 477    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 0, nr, s);
 478 }
 479
 480 static void
 481 nvc0_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 482 {
 483    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 4, nr, s);
 484 }
 485
 486 static void
 487 nvc0_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 488 {
 489    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 3, nr, s);
 490 }
 491
 492 /* NOTE: only called when not referenced anywhere, won't be bound */
 493 static void
 494 nvc0_sampler_view_destroy(struct pipe_context *pipe,
 495                           struct pipe_sampler_view *view)
 496 {
 497    pipe_resource_reference(&view->texture, NULL);
 498
 499    nvc0_screen_tic_free(nvc0_context(pipe)->screen, nv50_tic_entry(view));
 500
 501    FREE(nv50_tic_entry(view));
 502 }
 503
 504 static INLINE void
 505 nvc0_stage_set_sampler_views(struct nvc0_context *nvc0, int s,
 506                              unsigned nr,
 507                              struct pipe_sampler_view **views)
 508 {
 509    unsigned i;
 510
 511    for (i = 0; i < nr; ++i) {
 512       struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]);
 513
 514       if (views[i] == nvc0->textures[s][i])
 515          continue;
 516       nvc0->textures_dirty[s] |= 1 << i;
 517
 518       if (old) {
 519          nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_TEX(s, i));
 520          nvc0_screen_tic_unlock(nvc0->screen, old);
 521       }
 522
 523       pipe_sampler_view_reference(&nvc0->textures[s][i], views[i]);
 524    }
 525
 526    for (i = nr; i < nvc0->num_textures[s]; ++i) {
 527       struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]);
 528       if (old) {
 529          nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_TEX(s, i));
 530          nvc0_screen_tic_unlock(nvc0->screen, old);
 531          pipe_sampler_view_reference(&nvc0->textures[s][i], NULL);
 532       }
 533    }
 534
 535    nvc0->num_textures[s] = nr;
 536
 537    nvc0->dirty |= NVC0_NEW_TEXTURES;
 538 }
 539
 540 static void
 541 nvc0_vp_set_sampler_views(struct pipe_context *pipe,
 542                           unsigned nr,
 543                           struct pipe_sampler_view **views)
 544 {
 545    nvc0_stage_set_sampler_views(nvc0_context(pipe), 0, nr, views);
 546 }
 547
 548 static void
 549 nvc0_fp_set_sampler_views(struct pipe_context *pipe,
 550                           unsigned nr,
 551                           struct pipe_sampler_view **views)
 552 {
 553    nvc0_stage_set_sampler_views(nvc0_context(pipe), 4, nr, views);
 554 }
 555
 556 static void
 557 nvc0_gp_set_sampler_views(struct pipe_context *pipe,
 558                           unsigned nr,
 559                           struct pipe_sampler_view **views)
 560 {
 561    nvc0_stage_set_sampler_views(nvc0_context(pipe), 3, nr, views);
 562 }
 563
 564 /* ============================= SHADERS =======================================
 565  */
 566
 567 static void *
 568 nvc0_sp_state_create(struct pipe_context *pipe,
 569                      const struct pipe_shader_state *cso, unsigned type)
 570 {
 571    struct nvc0_program *prog;
 572
 573    prog = CALLOC_STRUCT(nvc0_program);
 574    if (!prog)
 575       return NULL;
 576
 577    prog->type = type;
 578
 579    if (cso->tokens)
 580       prog->pipe.tokens = tgsi_dup_tokens(cso->tokens);
 581
 582    if (cso->stream_output.num_outputs)
 583       prog->pipe.stream_output = cso->stream_output;
 584
 585    return (void *)prog;
 586 }
 587
 588 static void
 589 nvc0_sp_state_delete(struct pipe_context *pipe, void *hwcso)
 590 {
 591    struct nvc0_program *prog = (struct nvc0_program *)hwcso;
 592
 593    nvc0_program_destroy(nvc0_context(pipe), prog);
 594
 595    FREE((void *)prog->pipe.tokens);
 596    FREE(prog);
 597 }
 598
 599 static void *
 600 nvc0_vp_state_create(struct pipe_context *pipe,
 601                      const struct pipe_shader_state *cso)
 602 {
 603    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
 604 }
 605
 606 static void
 607 nvc0_vp_state_bind(struct pipe_context *pipe, void *hwcso)
 608 {
 609     struct nvc0_context *nvc0 = nvc0_context(pipe);
 610
 611     nvc0->vertprog = hwcso;
 612     nvc0->dirty |= NVC0_NEW_VERTPROG;
 613 }
 614
 615 static void *
 616 nvc0_fp_state_create(struct pipe_context *pipe,
 617                      const struct pipe_shader_state *cso)
 618 {
 619    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
 620 }
 621
 622 static void
 623 nvc0_fp_state_bind(struct pipe_context *pipe, void *hwcso)
 624 {
 625     struct nvc0_context *nvc0 = nvc0_context(pipe);
 626
 627     nvc0->fragprog = hwcso;
 628     nvc0->dirty |= NVC0_NEW_FRAGPROG;
 629 }
 630
 631 static void *
 632 nvc0_gp_state_create(struct pipe_context *pipe,
 633                      const struct pipe_shader_state *cso)
 634 {
 635    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY);
 636 }
 637
 638 static void
 639 nvc0_gp_state_bind(struct pipe_context *pipe, void *hwcso)
 640 {
 641     struct nvc0_context *nvc0 = nvc0_context(pipe);
 642
 643     nvc0->gmtyprog = hwcso;
 644     nvc0->dirty |= NVC0_NEW_GMTYPROG;
 645 }
 646
 647 static void
 648 nvc0_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
 649                          struct pipe_constant_buffer *cb)
 650 {
 651    struct nvc0_context *nvc0 = nvc0_context(pipe);
 652    struct pipe_resource *res = cb ? cb->buffer : NULL;
 653    const unsigned s = nvc0_shader_stage(shader);
 654    const unsigned i = index;
 655
 656    if (shader == PIPE_SHADER_COMPUTE)
 657       return;
 658
 659    if (nvc0->constbuf[s][i].user)
 660       nvc0->constbuf[s][i].u.buf = NULL;
 661    else
 662    if (nvc0->constbuf[s][i].u.buf)
 663       nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_CB(s, i));
 664
 665    pipe_resource_reference(&nvc0->constbuf[s][i].u.buf, res);
 666
 667    nvc0->constbuf[s][i].user = (cb && cb->user_buffer) ? TRUE : FALSE;
 668    if (nvc0->constbuf[s][i].user) {
 669       nvc0->constbuf[s][i].u.data = cb->user_buffer;
 670       nvc0->constbuf[s][i].size = cb->buffer_size;
 671    } else
 672    if (cb) {
 673       nvc0->constbuf[s][i].offset = cb->buffer_offset;
 674       nvc0->constbuf[s][i].size = align(cb->buffer_size, 0x100);
 675    }
 676
 677    nvc0->constbuf_dirty[s] |= 1 << i;
 678
 679    nvc0->dirty |= NVC0_NEW_CONSTBUF;
 680 }
 681
 682 /* =============================================================================
 683  */
 684
 685 static void
 686 nvc0_set_blend_color(struct pipe_context *pipe,
 687                      const struct pipe_blend_color *bcol)
 688 {
 689     struct nvc0_context *nvc0 = nvc0_context(pipe);
 690
 691     nvc0->blend_colour = *bcol;
 692     nvc0->dirty |= NVC0_NEW_BLEND_COLOUR;
 693 }
 694
 695 static void
 696 nvc0_set_stencil_ref(struct pipe_context *pipe,
 697                      const struct pipe_stencil_ref *sr)
 698 {
 699     struct nvc0_context *nvc0 = nvc0_context(pipe);
 700
 701     nvc0->stencil_ref = *sr;
 702     nvc0->dirty |= NVC0_NEW_STENCIL_REF;
 703 }
 704
 705 static void
 706 nvc0_set_clip_state(struct pipe_context *pipe,
 707                     const struct pipe_clip_state *clip)
 708 {
 709     struct nvc0_context *nvc0 = nvc0_context(pipe);
 710
 711     memcpy(nvc0->clip.ucp, clip->ucp, sizeof(clip->ucp));
 712
 713     nvc0->dirty |= NVC0_NEW_CLIP;
 714 }
 715
 716 static void
 717 nvc0_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
 718 {
 719     struct nvc0_context *nvc0 = nvc0_context(pipe);
 720
 721     nvc0->sample_mask = sample_mask;
 722     nvc0->dirty |= NVC0_NEW_SAMPLE_MASK;
 723 }
 724
 725
 726 static void
 727 nvc0_set_framebuffer_state(struct pipe_context *pipe,
 728                            const struct pipe_framebuffer_state *fb)
 729 {
 730     struct nvc0_context *nvc0 = nvc0_context(pipe);
 731     unsigned i;
 732
 733     nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_FB);
 734
 735     for (i = 0; i < fb->nr_cbufs; ++i)
 736        pipe_surface_reference(&nvc0->framebuffer.cbufs[i], fb->cbufs[i]);
 737     for (; i < nvc0->framebuffer.nr_cbufs; ++i)
 738        pipe_surface_reference(&nvc0->framebuffer.cbufs[i], NULL);
 739
 740     nvc0->framebuffer.nr_cbufs = fb->nr_cbufs;
 741
 742     nvc0->framebuffer.width = fb->width;
 743     nvc0->framebuffer.height = fb->height;
 744
 745     pipe_surface_reference(&nvc0->framebuffer.zsbuf, fb->zsbuf);
 746
 747     nvc0->dirty |= NVC0_NEW_FRAMEBUFFER;
 748 }
 749
 750 static void
 751 nvc0_set_polygon_stipple(struct pipe_context *pipe,
 752                          const struct pipe_poly_stipple *stipple)
 753 {
 754     struct nvc0_context *nvc0 = nvc0_context(pipe);
 755
 756     nvc0->stipple = *stipple;
 757     nvc0->dirty |= NVC0_NEW_STIPPLE;
 758 }
 759
 760 static void
 761 nvc0_set_scissor_state(struct pipe_context *pipe,
 762                        const struct pipe_scissor_state *scissor)
 763 {
 764     struct nvc0_context *nvc0 = nvc0_context(pipe);
 765
 766     nvc0->scissor = *scissor;
 767     nvc0->dirty |= NVC0_NEW_SCISSOR;
 768 }
 769
 770 static void
 771 nvc0_set_viewport_state(struct pipe_context *pipe,
 772                         const struct pipe_viewport_state *vpt)
 773 {
 774     struct nvc0_context *nvc0 = nvc0_context(pipe);
 775
 776     nvc0->viewport = *vpt;
 777     nvc0->dirty |= NVC0_NEW_VIEWPORT;
 778 }
 779
 780 static void
 781 nvc0_set_vertex_buffers(struct pipe_context *pipe,
 782                         unsigned start_slot, unsigned count,
 783                         const struct pipe_vertex_buffer *vb)
 784 {
 785     struct nvc0_context *nvc0 = nvc0_context(pipe);
 786     unsigned i;
 787
 788     util_set_vertex_buffers_count(nvc0->vtxbuf, &nvc0->num_vtxbufs, vb,
 789                                   start_slot, count);
 790
 791     if (!vb) {
 792        nvc0->vbo_user &= ~(((1ull << count) - 1) << start_slot);
 793        nvc0->constant_vbos &= ~(((1ull << count) - 1) << start_slot);
 794        return;
 795     }
 796
 797     for (i = 0; i < count; ++i) {
 798        unsigned dst_index = start_slot + i;
 799
 800        if (vb[i].user_buffer) {
 801           nvc0->vbo_user |= 1 << dst_index;
 802           if (!vb[i].stride)
 803              nvc0->constant_vbos |= 1 << dst_index;
 804           else
 805              nvc0->constant_vbos &= ~(1 << dst_index);
 806        } else {
 807           nvc0->vbo_user &= ~(1 << dst_index);
 808           nvc0->constant_vbos &= ~(1 << dst_index);
 809        }
 810     }
 811
 812     nvc0->dirty |= NVC0_NEW_ARRAYS;
 813     nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_VTX);
 814 }
 815
 816 static void
 817 nvc0_set_index_buffer(struct pipe_context *pipe,
 818                       const struct pipe_index_buffer *ib)
 819 {
 820     struct nvc0_context *nvc0 = nvc0_context(pipe);
 821
 822     if (nvc0->idxbuf.buffer)
 823        nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_IDX);
 824
 825     if (ib) {
 826        pipe_resource_reference(&nvc0->idxbuf.buffer, ib->buffer);
 827        nvc0->idxbuf.index_size = ib->index_size;
 828        if (ib->buffer) {
 829           nvc0->idxbuf.offset = ib->offset;
 830           nvc0->dirty |= NVC0_NEW_IDXBUF;
 831        } else {
 832           nvc0->idxbuf.user_buffer = ib->user_buffer;
 833           nvc0->dirty &= ~NVC0_NEW_IDXBUF;
 834        }
 835     } else {
 836        nvc0->dirty &= ~NVC0_NEW_IDXBUF;
 837        pipe_resource_reference(&nvc0->idxbuf.buffer, NULL);
 838     }
 839 }
 840
 841 static void
 842 nvc0_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
 843 {
 844     struct nvc0_context *nvc0 = nvc0_context(pipe);
 845
 846     nvc0->vertex = hwcso;
 847     nvc0->dirty |= NVC0_NEW_VERTEX;
 848 }
 849
 850 static struct pipe_stream_output_target *
 851 nvc0_so_target_create(struct pipe_context *pipe,
 852                       struct pipe_resource *res,
 853                       unsigned offset, unsigned size)
 854 {
 855    struct nvc0_so_target *targ = MALLOC_STRUCT(nvc0_so_target);
 856    if (!targ)
 857       return NULL;
 858
 859    targ->pq = pipe->create_query(pipe, NVC0_QUERY_TFB_BUFFER_OFFSET);
 860    if (!targ->pq) {
 861       FREE(targ);
 862       return NULL;
 863    }
 864    targ->clean = TRUE;
 865
 866    targ->pipe.buffer_size = size;
 867    targ->pipe.buffer_offset = offset;
 868    targ->pipe.context = pipe;
 869    targ->pipe.buffer = NULL;
 870    pipe_resource_reference(&targ->pipe.buffer, res);
 871    pipe_reference_init(&targ->pipe.reference, 1);
 872
 873    return &targ->pipe;
 874 }
 875
 876 static void
 877 nvc0_so_target_destroy(struct pipe_context *pipe,
 878                        struct pipe_stream_output_target *ptarg)
 879 {
 880    struct nvc0_so_target *targ = nvc0_so_target(ptarg);
 881    pipe->destroy_query(pipe, targ->pq);
 882    pipe_resource_reference(&targ->pipe.buffer, NULL);
 883    FREE(targ);
 884 }
 885
 886 static void
 887 nvc0_set_transform_feedback_targets(struct pipe_context *pipe,
 888                                     unsigned num_targets,
 889                                     struct pipe_stream_output_target **targets,
 890                                     unsigned append_mask)
 891 {
 892    struct nvc0_context *nvc0 = nvc0_context(pipe);
 893    unsigned i;
 894    boolean serialize = TRUE;
 895
 896    assert(num_targets <= 4);
 897
 898    for (i = 0; i < num_targets; ++i) {
 899       if (nvc0->tfbbuf[i] == targets[i] && (append_mask & (1 << i)))
 900          continue;
 901       nvc0->tfbbuf_dirty |= 1 << i;
 902
 903       if (nvc0->tfbbuf[i] && nvc0->tfbbuf[i] != targets[i])
 904          nvc0_so_target_save_offset(pipe, nvc0->tfbbuf[i], i, &serialize);
 905
 906       if (targets[i] && !(append_mask & (1 << i)))
 907          nvc0_so_target(targets[i])->clean = TRUE;
 908
 909       pipe_so_target_reference(&nvc0->tfbbuf[i], targets[i]);
 910    }
 911    for (; i < nvc0->num_tfbbufs; ++i) {
 912       nvc0->tfbbuf_dirty |= 1 << i;
 913       nvc0_so_target_save_offset(pipe, nvc0->tfbbuf[i], i, &serialize);
 914       pipe_so_target_reference(&nvc0->tfbbuf[i], NULL);
 915    }
 916    nvc0->num_tfbbufs = num_targets;
 917
 918    if (nvc0->tfbbuf_dirty)
 919       nvc0->dirty |= NVC0_NEW_TFB_TARGETS;
 920 }
 921
 922 void
 923 nvc0_init_state_functions(struct nvc0_context *nvc0)
 924 {
 925    struct pipe_context *pipe = &nvc0->base.pipe;
 926
 927    pipe->create_blend_state = nvc0_blend_state_create;
 928    pipe->bind_blend_state = nvc0_blend_state_bind;
 929    pipe->delete_blend_state = nvc0_blend_state_delete;
 930
 931    pipe->create_rasterizer_state = nvc0_rasterizer_state_create;
 932    pipe->bind_rasterizer_state = nvc0_rasterizer_state_bind;
 933    pipe->delete_rasterizer_state = nvc0_rasterizer_state_delete;
 934
 935    pipe->create_depth_stencil_alpha_state = nvc0_zsa_state_create;
 936    pipe->bind_depth_stencil_alpha_state = nvc0_zsa_state_bind;
 937    pipe->delete_depth_stencil_alpha_state = nvc0_zsa_state_delete;
 938
 939    pipe->create_sampler_state = nv50_sampler_state_create;
 940    pipe->delete_sampler_state = nvc0_sampler_state_delete;
 941    pipe->bind_vertex_sampler_states   = nvc0_vp_sampler_states_bind;
 942    pipe->bind_fragment_sampler_states = nvc0_fp_sampler_states_bind;
 943    pipe->bind_geometry_sampler_states = nvc0_gp_sampler_states_bind;
 944
 945    pipe->create_sampler_view = nvc0_create_sampler_view;
 946    pipe->sampler_view_destroy = nvc0_sampler_view_destroy;
 947    pipe->set_vertex_sampler_views   = nvc0_vp_set_sampler_views;
 948    pipe->set_fragment_sampler_views = nvc0_fp_set_sampler_views;
 949    pipe->set_geometry_sampler_views = nvc0_gp_set_sampler_views;
 950
 951    pipe->create_vs_state = nvc0_vp_state_create;
 952    pipe->create_fs_state = nvc0_fp_state_create;
 953    pipe->create_gs_state = nvc0_gp_state_create;
 954    pipe->bind_vs_state = nvc0_vp_state_bind;
 955    pipe->bind_fs_state = nvc0_fp_state_bind;
 956    pipe->bind_gs_state = nvc0_gp_state_bind;
 957    pipe->delete_vs_state = nvc0_sp_state_delete;
 958    pipe->delete_fs_state = nvc0_sp_state_delete;
 959    pipe->delete_gs_state = nvc0_sp_state_delete;
 960
 961    pipe->set_blend_color = nvc0_set_blend_color;
 962    pipe->set_stencil_ref = nvc0_set_stencil_ref;
 963    pipe->set_clip_state = nvc0_set_clip_state;
 964    pipe->set_sample_mask = nvc0_set_sample_mask;
 965    pipe->set_constant_buffer = nvc0_set_constant_buffer;
 966    pipe->set_framebuffer_state = nvc0_set_framebuffer_state;
 967    pipe->set_polygon_stipple = nvc0_set_polygon_stipple;
 968    pipe->set_scissor_state = nvc0_set_scissor_state;
 969    pipe->set_viewport_state = nvc0_set_viewport_state;
 970
 971    pipe->create_vertex_elements_state = nvc0_vertex_state_create;
 972    pipe->delete_vertex_elements_state = nvc0_vertex_state_delete;
 973    pipe->bind_vertex_elements_state = nvc0_vertex_state_bind;
 974
 975    pipe->set_vertex_buffers = nvc0_set_vertex_buffers;
 976    pipe->set_index_buffer = nvc0_set_index_buffer;
 977
 978    pipe->create_stream_output_target = nvc0_so_target_create;
 979    pipe->stream_output_target_destroy = nvc0_so_target_destroy;
 980    pipe->set_stream_output_targets = nvc0_set_transform_feedback_targets;
 981 }
 982