nvc0: reference the vertex buffers
[mesa.git] / src / gallium / drivers / nvc0 / nvc0_state.c
1 /*
2 * Copyright 2010 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include "pipe/p_defines.h"
24 #include "util/u_inlines.h"
25
26 #include "tgsi/tgsi_parse.h"
27
28 #include "nvc0_stateobj.h"
29 #include "nvc0_context.h"
30
31 #include "nvc0_3d.xml.h"
32 #include "nv50_texture.xml.h"
33
34 #include "nouveau/nouveau_gldefs.h"
35
36 static INLINE uint32_t
37 nvc0_colormask(unsigned mask)
38 {
39 uint32_t ret = 0;
40
41 if (mask & PIPE_MASK_R)
42 ret |= 0x0001;
43 if (mask & PIPE_MASK_G)
44 ret |= 0x0010;
45 if (mask & PIPE_MASK_B)
46 ret |= 0x0100;
47 if (mask & PIPE_MASK_A)
48 ret |= 0x1000;
49
50 return ret;
51 }
52
53 static INLINE uint32_t
54 nvc0_blend_fac(unsigned factor)
55 {
56 static const uint16_t bf[] = {
57 NV50_3D_BLEND_FACTOR_ZERO, /* 0x00 */
58 NV50_3D_BLEND_FACTOR_ONE,
59 NV50_3D_BLEND_FACTOR_SRC_COLOR,
60 NV50_3D_BLEND_FACTOR_SRC_ALPHA,
61 NV50_3D_BLEND_FACTOR_DST_ALPHA,
62 NV50_3D_BLEND_FACTOR_DST_COLOR,
63 NV50_3D_BLEND_FACTOR_SRC_ALPHA_SATURATE,
64 NV50_3D_BLEND_FACTOR_CONSTANT_COLOR,
65 NV50_3D_BLEND_FACTOR_CONSTANT_ALPHA,
66 NV50_3D_BLEND_FACTOR_SRC1_COLOR,
67 NV50_3D_BLEND_FACTOR_SRC1_ALPHA,
68 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0b */
69 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0c */
70 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0d */
71 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0e */
72 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0f */
73 NV50_3D_BLEND_FACTOR_ZERO, /* 0x10 */
74 NV50_3D_BLEND_FACTOR_ZERO, /* 0x11 */
75 NV50_3D_BLEND_FACTOR_ONE_MINUS_SRC_COLOR,
76 NV50_3D_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
77 NV50_3D_BLEND_FACTOR_ONE_MINUS_DST_ALPHA,
78 NV50_3D_BLEND_FACTOR_ONE_MINUS_DST_COLOR,
79 NV50_3D_BLEND_FACTOR_ONE_MINUS_CONSTANT_COLOR,
80 NV50_3D_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA,
81 NV50_3D_BLEND_FACTOR_ONE_MINUS_SRC1_COLOR,
82 NV50_3D_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA
83 };
84
85 assert(factor < (sizeof(bf) / sizeof(bf[0])));
86 return bf[factor];
87 }
88
89 static void *
90 nvc0_blend_state_create(struct pipe_context *pipe,
91 const struct pipe_blend_state *cso)
92 {
93 struct nvc0_blend_stateobj *so = CALLOC_STRUCT(nvc0_blend_stateobj);
94 int i;
95
96 so->pipe = *cso;
97
98 SB_IMMED_3D(so, BLEND_INDEPENDENT, cso->independent_blend_enable);
99
100 if (!cso->independent_blend_enable) {
101 SB_BEGIN_3D(so, BLEND_ENABLES, 1);
102 SB_DATA (so, cso->rt[0].blend_enable ? 0xff : 0);
103
104 if (cso->rt[0].blend_enable) {
105 SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5);
106 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].rgb_func));
107 SB_DATA (so, nvc0_blend_fac(cso->rt[0].rgb_src_factor));
108 SB_DATA (so, nvc0_blend_fac(cso->rt[0].rgb_dst_factor));
109 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].alpha_func));
110 SB_DATA (so, nvc0_blend_fac(cso->rt[0].alpha_src_factor));
111 SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1);
112 SB_DATA (so, nvc0_blend_fac(cso->rt[0].alpha_dst_factor));
113 }
114
115 SB_BEGIN_3D(so, COLOR_MASK_BROADCAST, 1);
116 SB_DATA (so, nvc0_colormask(cso->rt[0].colormask));
117 } else {
118 uint8_t en = 0;
119
120 for (i = 0; i < 8; ++i) {
121 if (!cso->rt[i].blend_enable)
122 continue;
123 en |= 1 << i;
124
125 SB_BEGIN_3D(so, IBLEND_EQUATION_RGB(i), 6);
126 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].rgb_func));
127 SB_DATA (so, nvc0_blend_fac(cso->rt[i].rgb_src_factor));
128 SB_DATA (so, nvc0_blend_fac(cso->rt[i].rgb_dst_factor));
129 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].alpha_func));
130 SB_DATA (so, nvc0_blend_fac(cso->rt[i].alpha_src_factor));
131 SB_DATA (so, nvc0_blend_fac(cso->rt[i].alpha_dst_factor));
132 }
133 SB_BEGIN_3D(so, BLEND_ENABLES, 1);
134 SB_DATA (so, en);
135
136 SB_BEGIN_3D(so, COLOR_MASK(0), 8);
137 for (i = 0; i < 8; ++i)
138 SB_DATA(so, nvc0_colormask(cso->rt[i].colormask));
139 }
140
141 if (cso->logicop_enable) {
142 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2);
143 SB_DATA (so, 1);
144 SB_DATA (so, nvgl_logicop_func(cso->logicop_func));
145 } else {
146 SB_IMMED_3D(so, LOGIC_OP_ENABLE, 0);
147 }
148
149 assert(so->size < (sizeof(so->state) / sizeof(so->state[0])));
150 return so;
151 }
152
153 static void
154 nvc0_blend_state_bind(struct pipe_context *pipe, void *hwcso)
155 {
156 struct nvc0_context *nvc0 = nvc0_context(pipe);
157
158 nvc0->blend = hwcso;
159 nvc0->dirty |= NVC0_NEW_BLEND;
160 }
161
162 static void
163 nvc0_blend_state_delete(struct pipe_context *pipe, void *hwcso)
164 {
165 FREE(hwcso);
166 }
167
168 static void *
169 nvc0_rasterizer_state_create(struct pipe_context *pipe,
170 const struct pipe_rasterizer_state *cso)
171 {
172 struct nvc0_rasterizer_stateobj *so;
173
174 so = CALLOC_STRUCT(nvc0_rasterizer_stateobj);
175 if (!so)
176 return NULL;
177 so->pipe = *cso;
178
179 #ifndef NVC0_SCISSORS_CLIPPING
180 SB_IMMED_3D(so, SCISSOR_ENABLE(0), cso->scissor);
181 #endif
182
183 SB_BEGIN_3D(so, SHADE_MODEL, 1);
184 SB_DATA (so, cso->flatshade ? NVC0_3D_SHADE_MODEL_FLAT :
185 NVC0_3D_SHADE_MODEL_SMOOTH);
186 SB_IMMED_3D(so, PROVOKING_VERTEX_LAST, !cso->flatshade_first);
187 SB_IMMED_3D(so, VERTEX_TWO_SIDE_ENABLE, cso->light_twoside);
188
189 SB_BEGIN_3D(so, LINE_WIDTH, 1);
190 SB_DATA (so, fui(cso->line_width));
191 SB_IMMED_3D(so, LINE_SMOOTH_ENABLE, cso->line_smooth);
192
193 SB_BEGIN_3D(so, LINE_STIPPLE_ENABLE, 1);
194 if (cso->line_stipple_enable) {
195 SB_DATA (so, 1);
196 SB_BEGIN_3D(so, LINE_STIPPLE_PATTERN, 1);
197 SB_DATA (so, (cso->line_stipple_pattern << 8) |
198 cso->line_stipple_factor);
199
200 } else {
201 SB_DATA (so, 0);
202 }
203
204 SB_IMMED_3D(so, VP_POINT_SIZE_EN, cso->point_size_per_vertex);
205 if (!cso->point_size_per_vertex) {
206 SB_BEGIN_3D(so, POINT_SIZE, 1);
207 SB_DATA (so, fui(cso->point_size));
208 }
209 SB_IMMED_3D(so, POINT_SPRITE_ENABLE, cso->point_quad_rasterization);
210
211 SB_BEGIN_3D(so, POLYGON_MODE_FRONT, 1);
212 SB_DATA (so, nvgl_polygon_mode(cso->fill_front));
213 SB_BEGIN_3D(so, POLYGON_MODE_BACK, 1);
214 SB_DATA (so, nvgl_polygon_mode(cso->fill_back));
215 SB_IMMED_3D(so, POLYGON_SMOOTH_ENABLE, cso->poly_smooth);
216
217 SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3);
218 SB_DATA (so, cso->cull_face != PIPE_FACE_NONE);
219 SB_DATA (so, cso->front_ccw ? NVC0_3D_FRONT_FACE_CCW :
220 NVC0_3D_FRONT_FACE_CW);
221 switch (cso->cull_face) {
222 case PIPE_FACE_FRONT_AND_BACK:
223 SB_DATA(so, NVC0_3D_CULL_FACE_FRONT_AND_BACK);
224 break;
225 case PIPE_FACE_FRONT:
226 SB_DATA(so, NVC0_3D_CULL_FACE_FRONT);
227 break;
228 case PIPE_FACE_BACK:
229 default:
230 SB_DATA(so, NVC0_3D_CULL_FACE_BACK);
231 break;
232 }
233
234 SB_IMMED_3D(so, POLYGON_STIPPLE_ENABLE, cso->poly_stipple_enable);
235 SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3);
236 SB_DATA (so, cso->offset_point);
237 SB_DATA (so, cso->offset_line);
238 SB_DATA (so, cso->offset_tri);
239
240 if (cso->offset_point || cso->offset_line || cso->offset_tri) {
241 SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1);
242 SB_DATA (so, fui(cso->offset_scale));
243 SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1);
244 SB_DATA (so, fui(cso->offset_units)); /* XXX: multiply by 2 ? */
245 }
246
247 assert(so->size < (sizeof(so->state) / sizeof(so->state[0])));
248 return (void *)so;
249 }
250
251 static void
252 nvc0_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
253 {
254 struct nvc0_context *nvc0 = nvc0_context(pipe);
255
256 nvc0->rast = hwcso;
257 nvc0->dirty |= NVC0_NEW_RASTERIZER;
258 }
259
260 static void
261 nvc0_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
262 {
263 FREE(hwcso);
264 }
265
266 static void *
267 nvc0_zsa_state_create(struct pipe_context *pipe,
268 const struct pipe_depth_stencil_alpha_state *cso)
269 {
270 struct nvc0_zsa_stateobj *so = CALLOC_STRUCT(nvc0_zsa_stateobj);
271
272 so->pipe = *cso;
273
274 SB_IMMED_3D(so, DEPTH_WRITE_ENABLE, cso->depth.writemask);
275 SB_BEGIN_3D(so, DEPTH_TEST_ENABLE, 1);
276 if (cso->depth.enabled) {
277 SB_DATA (so, 1);
278 SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
279 SB_DATA (so, nvgl_comparison_op(cso->depth.func));
280 } else {
281 SB_DATA (so, 0);
282 }
283
284 if (cso->stencil[0].enabled) {
285 SB_BEGIN_3D(so, STENCIL_FRONT_ENABLE, 5);
286 SB_DATA (so, 1);
287 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].fail_op));
288 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
289 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
290 SB_DATA (so, nvgl_comparison_op(cso->stencil[0].func));
291 SB_BEGIN_3D(so, STENCIL_FRONT_MASK, 2);
292 SB_DATA (so, cso->stencil[0].writemask);
293 SB_DATA (so, cso->stencil[0].valuemask);
294 } else {
295 SB_IMMED_3D(so, STENCIL_FRONT_ENABLE, 0);
296 }
297
298 if (cso->stencil[1].enabled) {
299 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5);
300 SB_DATA (so, 1);
301 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].fail_op));
302 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
303 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
304 SB_DATA (so, nvgl_comparison_op(cso->stencil[1].func));
305 SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2);
306 SB_DATA (so, cso->stencil[1].writemask);
307 SB_DATA (so, cso->stencil[1].valuemask);
308 } else {
309 SB_IMMED_3D(so, STENCIL_TWO_SIDE_ENABLE, 0);
310 }
311
312 SB_BEGIN_3D(so, ALPHA_TEST_ENABLE, 1);
313 if (cso->alpha.enabled) {
314 SB_DATA (so, 1);
315 SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
316 SB_DATA (so, fui(cso->alpha.ref_value));
317 SB_DATA (so, nvgl_comparison_op(cso->alpha.func));
318 } else {
319 SB_DATA (so, 0);
320 }
321
322 assert(so->size < (sizeof(so->state) / sizeof(so->state[0])));
323 return (void *)so;
324 }
325
326 static void
327 nvc0_zsa_state_bind(struct pipe_context *pipe, void *hwcso)
328 {
329 struct nvc0_context *nvc0 = nvc0_context(pipe);
330
331 nvc0->zsa = hwcso;
332 nvc0->dirty |= NVC0_NEW_ZSA;
333 }
334
335 static void
336 nvc0_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
337 {
338 FREE(hwcso);
339 }
340
341 /* ====================== SAMPLERS AND TEXTURES ================================
342 */
343
344 #define NV50_TSC_WRAP_CASE(n) \
345 case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
346
347 static INLINE unsigned
348 nv50_tsc_wrap_mode(unsigned wrap)
349 {
350 switch (wrap) {
351 NV50_TSC_WRAP_CASE(REPEAT);
352 NV50_TSC_WRAP_CASE(MIRROR_REPEAT);
353 NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE);
354 NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER);
355 NV50_TSC_WRAP_CASE(CLAMP);
356 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE);
357 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER);
358 NV50_TSC_WRAP_CASE(MIRROR_CLAMP);
359 default:
360 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
361 return NV50_TSC_WRAP_REPEAT;
362 }
363 }
364
365 static void *
366 nvc0_sampler_state_create(struct pipe_context *pipe,
367 const struct pipe_sampler_state *cso)
368 {
369 struct nvc0_tsc_entry *so = CALLOC_STRUCT(nvc0_tsc_entry);
370 float f[2];
371
372 so->id = -1;
373
374 so->tsc[0] = (0x00026000 |
375 (nv50_tsc_wrap_mode(cso->wrap_s) << 0) |
376 (nv50_tsc_wrap_mode(cso->wrap_t) << 3) |
377 (nv50_tsc_wrap_mode(cso->wrap_r) << 6));
378
379 switch (cso->mag_img_filter) {
380 case PIPE_TEX_FILTER_LINEAR:
381 so->tsc[1] |= NV50_TSC_1_MAGF_LINEAR;
382 break;
383 case PIPE_TEX_FILTER_NEAREST:
384 default:
385 so->tsc[1] |= NV50_TSC_1_MAGF_NEAREST;
386 break;
387 }
388
389 switch (cso->min_img_filter) {
390 case PIPE_TEX_FILTER_LINEAR:
391 so->tsc[1] |= NV50_TSC_1_MINF_LINEAR;
392 break;
393 case PIPE_TEX_FILTER_NEAREST:
394 default:
395 so->tsc[1] |= NV50_TSC_1_MINF_NEAREST;
396 break;
397 }
398
399 switch (cso->min_mip_filter) {
400 case PIPE_TEX_MIPFILTER_LINEAR:
401 so->tsc[1] |= NV50_TSC_1_MIPF_LINEAR;
402 break;
403 case PIPE_TEX_MIPFILTER_NEAREST:
404 so->tsc[1] |= NV50_TSC_1_MIPF_NEAREST;
405 break;
406 case PIPE_TEX_MIPFILTER_NONE:
407 default:
408 so->tsc[1] |= NV50_TSC_1_MIPF_NONE;
409 break;
410 }
411
412 if (cso->max_anisotropy >= 16)
413 so->tsc[0] |= (7 << 20);
414 else
415 if (cso->max_anisotropy >= 12)
416 so->tsc[0] |= (6 << 20);
417 else {
418 so->tsc[0] |= (cso->max_anisotropy >> 1) << 20;
419
420 if (cso->max_anisotropy >= 4)
421 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_35;
422 else
423 if (cso->max_anisotropy >= 2)
424 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_15;
425 }
426
427 if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
428 /* NOTE: must be deactivated for non-shadow textures */
429 so->tsc[0] |= (1 << 9);
430 so->tsc[0] |= (nvgl_comparison_op(cso->compare_func) & 0x7) << 10;
431 }
432
433 f[0] = CLAMP(cso->lod_bias, -16.0f, 15.0f);
434 so->tsc[1] |= ((int)(f[0] * 256.0f) & 0x1fff) << 12;
435
436 f[0] = CLAMP(cso->min_lod, 0.0f, 15.0f);
437 f[1] = CLAMP(cso->max_lod, 0.0f, 15.0f);
438 so->tsc[2] |=
439 (((int)(f[1] * 256.0f) & 0xfff) << 12) | ((int)(f[0] * 256.0f) & 0xfff);
440
441 so->tsc[4] = fui(cso->border_color[0]);
442 so->tsc[5] = fui(cso->border_color[1]);
443 so->tsc[6] = fui(cso->border_color[2]);
444 so->tsc[7] = fui(cso->border_color[3]);
445
446 return (void *)so;
447 }
448
449 static void
450 nvc0_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
451 {
452 unsigned s, i;
453
454 for (s = 0; s < 5; ++s)
455 for (i = 0; i < nvc0_context(pipe)->num_samplers[s]; ++i)
456 if (nvc0_context(pipe)->samplers[s][i] == hwcso)
457 nvc0_context(pipe)->samplers[s][i] = NULL;
458
459 nvc0_screen_tsc_free(nvc0_context(pipe)->screen, nvc0_tsc_entry(hwcso));
460
461 FREE(hwcso);
462 }
463
464 static INLINE void
465 nvc0_stage_sampler_states_bind(struct nvc0_context *nvc0, int s,
466 unsigned nr, void **hwcso)
467 {
468 unsigned i;
469
470 for (i = 0; i < nr; ++i) {
471 struct nvc0_tsc_entry *old = nvc0->samplers[s][i];
472
473 nvc0->samplers[s][i] = nvc0_tsc_entry(hwcso[i]);
474 if (old)
475 nvc0_screen_tsc_unlock(nvc0->screen, old);
476 }
477 for (; i < nvc0->num_samplers[s]; ++i)
478 if (nvc0->samplers[s][i])
479 nvc0_screen_tsc_unlock(nvc0->screen, nvc0->samplers[s][i]);
480
481 nvc0->num_samplers[s] = nr;
482
483 nvc0->dirty |= NVC0_NEW_SAMPLERS;
484 }
485
486 static void
487 nvc0_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
488 {
489 nvc0_stage_sampler_states_bind(nvc0_context(pipe), 0, nr, s);
490 }
491
492 static void
493 nvc0_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
494 {
495 nvc0_stage_sampler_states_bind(nvc0_context(pipe), 4, nr, s);
496 }
497
498 static void
499 nvc0_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
500 {
501 nvc0_stage_sampler_states_bind(nvc0_context(pipe), 3, nr, s);
502 }
503
504 /* NOTE: only called when not referenced anywhere, won't be bound */
505 static void
506 nvc0_sampler_view_destroy(struct pipe_context *pipe,
507 struct pipe_sampler_view *view)
508 {
509 pipe_resource_reference(&view->texture, NULL);
510
511 nvc0_screen_tic_free(nvc0_context(pipe)->screen, nvc0_tic_entry(view));
512
513 FREE(nvc0_tic_entry(view));
514 }
515
516 static INLINE void
517 nvc0_stage_set_sampler_views(struct nvc0_context *nvc0, int s,
518 unsigned nr,
519 struct pipe_sampler_view **views)
520 {
521 unsigned i;
522
523 for (i = 0; i < nr; ++i) {
524 struct nvc0_tic_entry *old = nvc0_tic_entry(nvc0->textures[s][i]);
525 if (old)
526 nvc0_screen_tic_unlock(nvc0->screen, old);
527
528 pipe_sampler_view_reference(&nvc0->textures[s][i], views[i]);
529 }
530
531 for (i = nr; i < nvc0->num_textures[s]; ++i) {
532 struct nvc0_tic_entry *old = nvc0_tic_entry(nvc0->textures[s][i]);
533 if (!old)
534 continue;
535 nvc0_screen_tic_unlock(nvc0->screen, old);
536
537 pipe_sampler_view_reference(&nvc0->textures[s][i], NULL);
538 }
539
540 nvc0->num_textures[s] = nr;
541
542 nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_TEXTURES);
543
544 nvc0->dirty |= NVC0_NEW_TEXTURES;
545 }
546
547 static void
548 nvc0_vp_set_sampler_views(struct pipe_context *pipe,
549 unsigned nr,
550 struct pipe_sampler_view **views)
551 {
552 nvc0_stage_set_sampler_views(nvc0_context(pipe), 0, nr, views);
553 }
554
555 static void
556 nvc0_fp_set_sampler_views(struct pipe_context *pipe,
557 unsigned nr,
558 struct pipe_sampler_view **views)
559 {
560 nvc0_stage_set_sampler_views(nvc0_context(pipe), 4, nr, views);
561 }
562
563 static void
564 nvc0_gp_set_sampler_views(struct pipe_context *pipe,
565 unsigned nr,
566 struct pipe_sampler_view **views)
567 {
568 nvc0_stage_set_sampler_views(nvc0_context(pipe), 3, nr, views);
569 }
570
571 /* ============================= SHADERS =======================================
572 */
573
574 static void *
575 nvc0_sp_state_create(struct pipe_context *pipe,
576 const struct pipe_shader_state *cso, unsigned type)
577 {
578 struct nvc0_program *prog;
579
580 prog = CALLOC_STRUCT(nvc0_program);
581 if (!prog)
582 return NULL;
583
584 prog->type = type;
585 prog->pipe.tokens = tgsi_dup_tokens(cso->tokens);
586
587 return (void *)prog;
588 }
589
590 static void
591 nvc0_sp_state_delete(struct pipe_context *pipe, void *hwcso)
592 {
593 struct nvc0_program *prog = (struct nvc0_program *)hwcso;
594
595 nvc0_program_destroy(nvc0_context(pipe), prog);
596
597 FREE((void *)prog->pipe.tokens);
598 FREE(prog);
599 }
600
601 static void *
602 nvc0_vp_state_create(struct pipe_context *pipe,
603 const struct pipe_shader_state *cso)
604 {
605 return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
606 }
607
608 static void
609 nvc0_vp_state_bind(struct pipe_context *pipe, void *hwcso)
610 {
611 struct nvc0_context *nvc0 = nvc0_context(pipe);
612
613 nvc0->vertprog = hwcso;
614 nvc0->dirty |= NVC0_NEW_VERTPROG;
615 }
616
617 static void *
618 nvc0_fp_state_create(struct pipe_context *pipe,
619 const struct pipe_shader_state *cso)
620 {
621 return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
622 }
623
624 static void
625 nvc0_fp_state_bind(struct pipe_context *pipe, void *hwcso)
626 {
627 struct nvc0_context *nvc0 = nvc0_context(pipe);
628
629 nvc0->fragprog = hwcso;
630 nvc0->dirty |= NVC0_NEW_FRAGPROG;
631 }
632
633 static void *
634 nvc0_gp_state_create(struct pipe_context *pipe,
635 const struct pipe_shader_state *cso)
636 {
637 return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY);
638 }
639
640 static void
641 nvc0_gp_state_bind(struct pipe_context *pipe, void *hwcso)
642 {
643 struct nvc0_context *nvc0 = nvc0_context(pipe);
644
645 nvc0->gmtyprog = hwcso;
646 nvc0->dirty |= NVC0_NEW_GMTYPROG;
647 }
648
649 static void
650 nvc0_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
651 struct pipe_resource *res)
652 {
653 struct nvc0_context *nvc0 = nvc0_context(pipe);
654
655 switch (shader) {
656 case PIPE_SHADER_VERTEX: shader = 0; break;
657 /*
658 case PIPE_SHADER_TESSELLATION_CONTROL: shader = 1; break;
659 case PIPE_SHADER_TESSELLATION_EVALUATION: shader = 2; break;
660 */
661 case PIPE_SHADER_GEOMETRY: shader = 3; break;
662 case PIPE_SHADER_FRAGMENT: shader = 4; break;
663 default:
664 assert(0);
665 break;
666 }
667
668 if (nvc0->constbuf[shader][index])
669 nvc0_bufctx_del_resident(nvc0, NVC0_BUFCTX_CONSTANT,
670 nvc0_resource(
671 nvc0->constbuf[shader][index]));
672
673 pipe_resource_reference(&nvc0->constbuf[shader][index], res);
674
675 nvc0->constbuf_dirty[shader] |= 1 << index;
676
677 nvc0->dirty |= NVC0_NEW_CONSTBUF;
678 }
679
680 /* =============================================================================
681 */
682
683 static void
684 nvc0_set_blend_color(struct pipe_context *pipe,
685 const struct pipe_blend_color *bcol)
686 {
687 struct nvc0_context *nvc0 = nvc0_context(pipe);
688
689 nvc0->blend_colour = *bcol;
690 nvc0->dirty |= NVC0_NEW_BLEND_COLOUR;
691 }
692
693 static void
694 nvc0_set_stencil_ref(struct pipe_context *pipe,
695 const struct pipe_stencil_ref *sr)
696 {
697 struct nvc0_context *nvc0 = nvc0_context(pipe);
698
699 nvc0->stencil_ref = *sr;
700 nvc0->dirty |= NVC0_NEW_STENCIL_REF;
701 }
702
703 static void
704 nvc0_set_clip_state(struct pipe_context *pipe,
705 const struct pipe_clip_state *clip)
706 {
707 struct nvc0_context *nvc0 = nvc0_context(pipe);
708 const unsigned size = clip->nr * sizeof(clip->ucp[0]);
709
710 memcpy(&nvc0->clip.ucp[0][0], &clip->ucp[0][0], size);
711 nvc0->clip.nr = clip->nr;
712
713 nvc0->clip.depth_clamp = clip->depth_clamp;
714
715 nvc0->dirty |= NVC0_NEW_CLIP;
716 }
717
718 static void
719 nvc0_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
720 {
721 struct nvc0_context *nvc0 = nvc0_context(pipe);
722
723 nvc0->sample_mask = sample_mask;
724 nvc0->dirty |= NVC0_NEW_SAMPLE_MASK;
725 }
726
727
728 static void
729 nvc0_set_framebuffer_state(struct pipe_context *pipe,
730 const struct pipe_framebuffer_state *fb)
731 {
732 struct nvc0_context *nvc0 = nvc0_context(pipe);
733
734 nvc0->framebuffer = *fb;
735 nvc0->dirty |= NVC0_NEW_FRAMEBUFFER;
736 }
737
738 static void
739 nvc0_set_polygon_stipple(struct pipe_context *pipe,
740 const struct pipe_poly_stipple *stipple)
741 {
742 struct nvc0_context *nvc0 = nvc0_context(pipe);
743
744 nvc0->stipple = *stipple;
745 nvc0->dirty |= NVC0_NEW_STIPPLE;
746 }
747
748 static void
749 nvc0_set_scissor_state(struct pipe_context *pipe,
750 const struct pipe_scissor_state *scissor)
751 {
752 struct nvc0_context *nvc0 = nvc0_context(pipe);
753
754 nvc0->scissor = *scissor;
755 nvc0->dirty |= NVC0_NEW_SCISSOR;
756 }
757
758 static void
759 nvc0_set_viewport_state(struct pipe_context *pipe,
760 const struct pipe_viewport_state *vpt)
761 {
762 struct nvc0_context *nvc0 = nvc0_context(pipe);
763
764 nvc0->viewport = *vpt;
765 nvc0->dirty |= NVC0_NEW_VIEWPORT;
766 }
767
768 static void
769 nvc0_set_vertex_buffers(struct pipe_context *pipe,
770 unsigned count,
771 const struct pipe_vertex_buffer *vb)
772 {
773 struct nvc0_context *nvc0 = nvc0_context(pipe);
774 unsigned i;
775
776 for (i = 0; i < count; ++i)
777 pipe_resource_reference(&nvc0->vtxbuf[i].buffer, vb[i].buffer);
778 for (; i < nvc0->num_vtxbufs; ++i)
779 pipe_resource_reference(&nvc0->vtxbuf[i].buffer, NULL);
780
781 memcpy(nvc0->vtxbuf, vb, sizeof(*vb) * count);
782 nvc0->num_vtxbufs = count;
783
784 nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_VERTEX);
785
786 nvc0->dirty |= NVC0_NEW_ARRAYS;
787 }
788
789 static void
790 nvc0_set_index_buffer(struct pipe_context *pipe,
791 const struct pipe_index_buffer *ib)
792 {
793 struct nvc0_context *nvc0 = nvc0_context(pipe);
794
795 if (ib)
796 memcpy(&nvc0->idxbuf, ib, sizeof(nvc0->idxbuf));
797 else
798 nvc0->idxbuf.buffer = NULL;
799 }
800
801 static void
802 nvc0_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
803 {
804 struct nvc0_context *nvc0 = nvc0_context(pipe);
805
806 nvc0->vertex = hwcso;
807 nvc0->dirty |= NVC0_NEW_VERTEX;
808 }
809
810 void
811 nvc0_init_state_functions(struct nvc0_context *nvc0)
812 {
813 nvc0->pipe.create_blend_state = nvc0_blend_state_create;
814 nvc0->pipe.bind_blend_state = nvc0_blend_state_bind;
815 nvc0->pipe.delete_blend_state = nvc0_blend_state_delete;
816
817 nvc0->pipe.create_rasterizer_state = nvc0_rasterizer_state_create;
818 nvc0->pipe.bind_rasterizer_state = nvc0_rasterizer_state_bind;
819 nvc0->pipe.delete_rasterizer_state = nvc0_rasterizer_state_delete;
820
821 nvc0->pipe.create_depth_stencil_alpha_state = nvc0_zsa_state_create;
822 nvc0->pipe.bind_depth_stencil_alpha_state = nvc0_zsa_state_bind;
823 nvc0->pipe.delete_depth_stencil_alpha_state = nvc0_zsa_state_delete;
824
825 nvc0->pipe.create_sampler_state = nvc0_sampler_state_create;
826 nvc0->pipe.delete_sampler_state = nvc0_sampler_state_delete;
827 nvc0->pipe.bind_vertex_sampler_states = nvc0_vp_sampler_states_bind;
828 nvc0->pipe.bind_fragment_sampler_states = nvc0_fp_sampler_states_bind;
829 nvc0->pipe.bind_geometry_sampler_states = nvc0_gp_sampler_states_bind;
830
831 nvc0->pipe.create_sampler_view = nvc0_create_sampler_view;
832 nvc0->pipe.sampler_view_destroy = nvc0_sampler_view_destroy;
833 nvc0->pipe.set_vertex_sampler_views = nvc0_vp_set_sampler_views;
834 nvc0->pipe.set_fragment_sampler_views = nvc0_fp_set_sampler_views;
835 nvc0->pipe.set_geometry_sampler_views = nvc0_gp_set_sampler_views;
836
837 nvc0->pipe.create_vs_state = nvc0_vp_state_create;
838 nvc0->pipe.create_fs_state = nvc0_fp_state_create;
839 nvc0->pipe.create_gs_state = nvc0_gp_state_create;
840 nvc0->pipe.bind_vs_state = nvc0_vp_state_bind;
841 nvc0->pipe.bind_fs_state = nvc0_fp_state_bind;
842 nvc0->pipe.bind_gs_state = nvc0_gp_state_bind;
843 nvc0->pipe.delete_vs_state = nvc0_sp_state_delete;
844 nvc0->pipe.delete_fs_state = nvc0_sp_state_delete;
845 nvc0->pipe.delete_gs_state = nvc0_sp_state_delete;
846
847 nvc0->pipe.set_blend_color = nvc0_set_blend_color;
848 nvc0->pipe.set_stencil_ref = nvc0_set_stencil_ref;
849 nvc0->pipe.set_clip_state = nvc0_set_clip_state;
850 nvc0->pipe.set_sample_mask = nvc0_set_sample_mask;
851 nvc0->pipe.set_constant_buffer = nvc0_set_constant_buffer;
852 nvc0->pipe.set_framebuffer_state = nvc0_set_framebuffer_state;
853 nvc0->pipe.set_polygon_stipple = nvc0_set_polygon_stipple;
854 nvc0->pipe.set_scissor_state = nvc0_set_scissor_state;
855 nvc0->pipe.set_viewport_state = nvc0_set_viewport_state;
856
857 nvc0->pipe.create_vertex_elements_state = nvc0_vertex_state_create;
858 nvc0->pipe.delete_vertex_elements_state = nvc0_vertex_state_delete;
859 nvc0->pipe.bind_vertex_elements_state = nvc0_vertex_state_bind;
860
861 nvc0->pipe.set_vertex_buffers = nvc0_set_vertex_buffers;
862 nvc0->pipe.set_index_buffer = nvc0_set_index_buffer;
863 }
864