gallium: notify drivers about possible changes in user buffer contents
[mesa.git] / src / gallium / drivers / nvc0 / nvc0_state.c
1 /*
2 * Copyright 2010 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include "pipe/p_defines.h"
24 #include "util/u_inlines.h"
25 #include "util/u_transfer.h"
26
27 #include "tgsi/tgsi_parse.h"
28
29 #include "nvc0_stateobj.h"
30 #include "nvc0_context.h"
31
32 #include "nvc0_3d.xml.h"
33 #include "nv50_texture.xml.h"
34
35 #include "nouveau/nouveau_gldefs.h"
36
37 static INLINE uint32_t
38 nvc0_colormask(unsigned mask)
39 {
40 uint32_t ret = 0;
41
42 if (mask & PIPE_MASK_R)
43 ret |= 0x0001;
44 if (mask & PIPE_MASK_G)
45 ret |= 0x0010;
46 if (mask & PIPE_MASK_B)
47 ret |= 0x0100;
48 if (mask & PIPE_MASK_A)
49 ret |= 0x1000;
50
51 return ret;
52 }
53
54 static INLINE uint32_t
55 nvc0_blend_fac(unsigned factor)
56 {
57 static const uint16_t bf[] = {
58 NV50_3D_BLEND_FACTOR_ZERO, /* 0x00 */
59 NV50_3D_BLEND_FACTOR_ONE,
60 NV50_3D_BLEND_FACTOR_SRC_COLOR,
61 NV50_3D_BLEND_FACTOR_SRC_ALPHA,
62 NV50_3D_BLEND_FACTOR_DST_ALPHA,
63 NV50_3D_BLEND_FACTOR_DST_COLOR,
64 NV50_3D_BLEND_FACTOR_SRC_ALPHA_SATURATE,
65 NV50_3D_BLEND_FACTOR_CONSTANT_COLOR,
66 NV50_3D_BLEND_FACTOR_CONSTANT_ALPHA,
67 NV50_3D_BLEND_FACTOR_SRC1_COLOR,
68 NV50_3D_BLEND_FACTOR_SRC1_ALPHA,
69 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0b */
70 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0c */
71 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0d */
72 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0e */
73 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0f */
74 NV50_3D_BLEND_FACTOR_ZERO, /* 0x10 */
75 NV50_3D_BLEND_FACTOR_ZERO, /* 0x11 */
76 NV50_3D_BLEND_FACTOR_ONE_MINUS_SRC_COLOR,
77 NV50_3D_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
78 NV50_3D_BLEND_FACTOR_ONE_MINUS_DST_ALPHA,
79 NV50_3D_BLEND_FACTOR_ONE_MINUS_DST_COLOR,
80 NV50_3D_BLEND_FACTOR_ONE_MINUS_CONSTANT_COLOR,
81 NV50_3D_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA,
82 NV50_3D_BLEND_FACTOR_ONE_MINUS_SRC1_COLOR,
83 NV50_3D_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA
84 };
85
86 assert(factor < (sizeof(bf) / sizeof(bf[0])));
87 return bf[factor];
88 }
89
90 static void *
91 nvc0_blend_state_create(struct pipe_context *pipe,
92 const struct pipe_blend_state *cso)
93 {
94 struct nvc0_blend_stateobj *so = CALLOC_STRUCT(nvc0_blend_stateobj);
95 int i;
96
97 so->pipe = *cso;
98
99 SB_IMMED_3D(so, BLEND_INDEPENDENT, cso->independent_blend_enable);
100
101 if (!cso->independent_blend_enable) {
102 SB_BEGIN_3D(so, BLEND_ENABLES, 1);
103 SB_DATA (so, cso->rt[0].blend_enable ? 0xff : 0);
104
105 if (cso->rt[0].blend_enable) {
106 SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5);
107 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].rgb_func));
108 SB_DATA (so, nvc0_blend_fac(cso->rt[0].rgb_src_factor));
109 SB_DATA (so, nvc0_blend_fac(cso->rt[0].rgb_dst_factor));
110 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].alpha_func));
111 SB_DATA (so, nvc0_blend_fac(cso->rt[0].alpha_src_factor));
112 SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1);
113 SB_DATA (so, nvc0_blend_fac(cso->rt[0].alpha_dst_factor));
114 }
115
116 SB_BEGIN_3D(so, COLOR_MASK_BROADCAST, 1);
117 SB_DATA (so, nvc0_colormask(cso->rt[0].colormask));
118 } else {
119 uint8_t en = 0;
120
121 for (i = 0; i < 8; ++i) {
122 if (!cso->rt[i].blend_enable)
123 continue;
124 en |= 1 << i;
125
126 SB_BEGIN_3D(so, IBLEND_EQUATION_RGB(i), 6);
127 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].rgb_func));
128 SB_DATA (so, nvc0_blend_fac(cso->rt[i].rgb_src_factor));
129 SB_DATA (so, nvc0_blend_fac(cso->rt[i].rgb_dst_factor));
130 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].alpha_func));
131 SB_DATA (so, nvc0_blend_fac(cso->rt[i].alpha_src_factor));
132 SB_DATA (so, nvc0_blend_fac(cso->rt[i].alpha_dst_factor));
133 }
134 SB_BEGIN_3D(so, BLEND_ENABLES, 1);
135 SB_DATA (so, en);
136
137 SB_BEGIN_3D(so, COLOR_MASK(0), 8);
138 for (i = 0; i < 8; ++i)
139 SB_DATA(so, nvc0_colormask(cso->rt[i].colormask));
140 }
141
142 if (cso->logicop_enable) {
143 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2);
144 SB_DATA (so, 1);
145 SB_DATA (so, nvgl_logicop_func(cso->logicop_func));
146 } else {
147 SB_IMMED_3D(so, LOGIC_OP_ENABLE, 0);
148 }
149
150 assert(so->size < (sizeof(so->state) / sizeof(so->state[0])));
151 return so;
152 }
153
154 static void
155 nvc0_blend_state_bind(struct pipe_context *pipe, void *hwcso)
156 {
157 struct nvc0_context *nvc0 = nvc0_context(pipe);
158
159 nvc0->blend = hwcso;
160 nvc0->dirty |= NVC0_NEW_BLEND;
161 }
162
163 static void
164 nvc0_blend_state_delete(struct pipe_context *pipe, void *hwcso)
165 {
166 FREE(hwcso);
167 }
168
169 static void *
170 nvc0_rasterizer_state_create(struct pipe_context *pipe,
171 const struct pipe_rasterizer_state *cso)
172 {
173 struct nvc0_rasterizer_stateobj *so;
174
175 so = CALLOC_STRUCT(nvc0_rasterizer_stateobj);
176 if (!so)
177 return NULL;
178 so->pipe = *cso;
179
180 #ifndef NVC0_SCISSORS_CLIPPING
181 SB_IMMED_3D(so, SCISSOR_ENABLE(0), cso->scissor);
182 #endif
183
184 SB_BEGIN_3D(so, SHADE_MODEL, 1);
185 SB_DATA (so, cso->flatshade ? NVC0_3D_SHADE_MODEL_FLAT :
186 NVC0_3D_SHADE_MODEL_SMOOTH);
187 SB_IMMED_3D(so, PROVOKING_VERTEX_LAST, !cso->flatshade_first);
188 SB_IMMED_3D(so, VERTEX_TWO_SIDE_ENABLE, cso->light_twoside);
189
190 SB_BEGIN_3D(so, LINE_WIDTH, 1);
191 SB_DATA (so, fui(cso->line_width));
192 SB_IMMED_3D(so, LINE_SMOOTH_ENABLE, cso->line_smooth);
193
194 SB_BEGIN_3D(so, LINE_STIPPLE_ENABLE, 1);
195 if (cso->line_stipple_enable) {
196 SB_DATA (so, 1);
197 SB_BEGIN_3D(so, LINE_STIPPLE_PATTERN, 1);
198 SB_DATA (so, (cso->line_stipple_pattern << 8) |
199 cso->line_stipple_factor);
200
201 } else {
202 SB_DATA (so, 0);
203 }
204
205 SB_IMMED_3D(so, VP_POINT_SIZE_EN, cso->point_size_per_vertex);
206 if (!cso->point_size_per_vertex) {
207 SB_BEGIN_3D(so, POINT_SIZE, 1);
208 SB_DATA (so, fui(cso->point_size));
209 }
210 SB_IMMED_3D(so, POINT_SPRITE_ENABLE, cso->point_quad_rasterization);
211 SB_IMMED_3D(so, POINT_SMOOTH_ENABLE, cso->point_smooth);
212
213 SB_BEGIN_3D(so, POLYGON_MODE_FRONT, 1);
214 SB_DATA (so, nvgl_polygon_mode(cso->fill_front));
215 SB_BEGIN_3D(so, POLYGON_MODE_BACK, 1);
216 SB_DATA (so, nvgl_polygon_mode(cso->fill_back));
217 SB_IMMED_3D(so, POLYGON_SMOOTH_ENABLE, cso->poly_smooth);
218
219 SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3);
220 SB_DATA (so, cso->cull_face != PIPE_FACE_NONE);
221 SB_DATA (so, cso->front_ccw ? NVC0_3D_FRONT_FACE_CCW :
222 NVC0_3D_FRONT_FACE_CW);
223 switch (cso->cull_face) {
224 case PIPE_FACE_FRONT_AND_BACK:
225 SB_DATA(so, NVC0_3D_CULL_FACE_FRONT_AND_BACK);
226 break;
227 case PIPE_FACE_FRONT:
228 SB_DATA(so, NVC0_3D_CULL_FACE_FRONT);
229 break;
230 case PIPE_FACE_BACK:
231 default:
232 SB_DATA(so, NVC0_3D_CULL_FACE_BACK);
233 break;
234 }
235
236 SB_IMMED_3D(so, POLYGON_STIPPLE_ENABLE, cso->poly_stipple_enable);
237 SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3);
238 SB_DATA (so, cso->offset_point);
239 SB_DATA (so, cso->offset_line);
240 SB_DATA (so, cso->offset_tri);
241
242 if (cso->offset_point || cso->offset_line || cso->offset_tri) {
243 SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1);
244 SB_DATA (so, fui(cso->offset_scale));
245 SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1);
246 SB_DATA (so, fui(cso->offset_units)); /* XXX: multiply by 2 ? */
247 }
248
249 assert(so->size < (sizeof(so->state) / sizeof(so->state[0])));
250 return (void *)so;
251 }
252
253 static void
254 nvc0_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
255 {
256 struct nvc0_context *nvc0 = nvc0_context(pipe);
257
258 nvc0->rast = hwcso;
259 nvc0->dirty |= NVC0_NEW_RASTERIZER;
260 }
261
262 static void
263 nvc0_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
264 {
265 FREE(hwcso);
266 }
267
268 static void *
269 nvc0_zsa_state_create(struct pipe_context *pipe,
270 const struct pipe_depth_stencil_alpha_state *cso)
271 {
272 struct nvc0_zsa_stateobj *so = CALLOC_STRUCT(nvc0_zsa_stateobj);
273
274 so->pipe = *cso;
275
276 SB_IMMED_3D(so, DEPTH_WRITE_ENABLE, cso->depth.writemask);
277 SB_BEGIN_3D(so, DEPTH_TEST_ENABLE, 1);
278 if (cso->depth.enabled) {
279 SB_DATA (so, 1);
280 SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
281 SB_DATA (so, nvgl_comparison_op(cso->depth.func));
282 } else {
283 SB_DATA (so, 0);
284 }
285
286 if (cso->stencil[0].enabled) {
287 SB_BEGIN_3D(so, STENCIL_FRONT_ENABLE, 5);
288 SB_DATA (so, 1);
289 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].fail_op));
290 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
291 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
292 SB_DATA (so, nvgl_comparison_op(cso->stencil[0].func));
293 SB_BEGIN_3D(so, STENCIL_FRONT_MASK, 2);
294 SB_DATA (so, cso->stencil[0].writemask);
295 SB_DATA (so, cso->stencil[0].valuemask);
296 } else {
297 SB_IMMED_3D(so, STENCIL_FRONT_ENABLE, 0);
298 }
299
300 if (cso->stencil[1].enabled) {
301 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5);
302 SB_DATA (so, 1);
303 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].fail_op));
304 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
305 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
306 SB_DATA (so, nvgl_comparison_op(cso->stencil[1].func));
307 SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2);
308 SB_DATA (so, cso->stencil[1].writemask);
309 SB_DATA (so, cso->stencil[1].valuemask);
310 } else {
311 SB_IMMED_3D(so, STENCIL_TWO_SIDE_ENABLE, 0);
312 }
313
314 SB_BEGIN_3D(so, ALPHA_TEST_ENABLE, 1);
315 if (cso->alpha.enabled) {
316 SB_DATA (so, 1);
317 SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
318 SB_DATA (so, fui(cso->alpha.ref_value));
319 SB_DATA (so, nvgl_comparison_op(cso->alpha.func));
320 } else {
321 SB_DATA (so, 0);
322 }
323
324 assert(so->size < (sizeof(so->state) / sizeof(so->state[0])));
325 return (void *)so;
326 }
327
328 static void
329 nvc0_zsa_state_bind(struct pipe_context *pipe, void *hwcso)
330 {
331 struct nvc0_context *nvc0 = nvc0_context(pipe);
332
333 nvc0->zsa = hwcso;
334 nvc0->dirty |= NVC0_NEW_ZSA;
335 }
336
337 static void
338 nvc0_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
339 {
340 FREE(hwcso);
341 }
342
343 /* ====================== SAMPLERS AND TEXTURES ================================
344 */
345
346 #define NV50_TSC_WRAP_CASE(n) \
347 case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
348
349 static INLINE unsigned
350 nv50_tsc_wrap_mode(unsigned wrap)
351 {
352 switch (wrap) {
353 NV50_TSC_WRAP_CASE(REPEAT);
354 NV50_TSC_WRAP_CASE(MIRROR_REPEAT);
355 NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE);
356 NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER);
357 NV50_TSC_WRAP_CASE(CLAMP);
358 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE);
359 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER);
360 NV50_TSC_WRAP_CASE(MIRROR_CLAMP);
361 default:
362 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
363 return NV50_TSC_WRAP_REPEAT;
364 }
365 }
366
367 static void *
368 nvc0_sampler_state_create(struct pipe_context *pipe,
369 const struct pipe_sampler_state *cso)
370 {
371 struct nvc0_tsc_entry *so = CALLOC_STRUCT(nvc0_tsc_entry);
372 float f[2];
373
374 so->id = -1;
375
376 so->tsc[0] = (0x00026000 |
377 (nv50_tsc_wrap_mode(cso->wrap_s) << 0) |
378 (nv50_tsc_wrap_mode(cso->wrap_t) << 3) |
379 (nv50_tsc_wrap_mode(cso->wrap_r) << 6));
380
381 switch (cso->mag_img_filter) {
382 case PIPE_TEX_FILTER_LINEAR:
383 so->tsc[1] |= NV50_TSC_1_MAGF_LINEAR;
384 break;
385 case PIPE_TEX_FILTER_NEAREST:
386 default:
387 so->tsc[1] |= NV50_TSC_1_MAGF_NEAREST;
388 break;
389 }
390
391 switch (cso->min_img_filter) {
392 case PIPE_TEX_FILTER_LINEAR:
393 so->tsc[1] |= NV50_TSC_1_MINF_LINEAR;
394 break;
395 case PIPE_TEX_FILTER_NEAREST:
396 default:
397 so->tsc[1] |= NV50_TSC_1_MINF_NEAREST;
398 break;
399 }
400
401 switch (cso->min_mip_filter) {
402 case PIPE_TEX_MIPFILTER_LINEAR:
403 so->tsc[1] |= NV50_TSC_1_MIPF_LINEAR;
404 break;
405 case PIPE_TEX_MIPFILTER_NEAREST:
406 so->tsc[1] |= NV50_TSC_1_MIPF_NEAREST;
407 break;
408 case PIPE_TEX_MIPFILTER_NONE:
409 default:
410 so->tsc[1] |= NV50_TSC_1_MIPF_NONE;
411 break;
412 }
413
414 if (cso->max_anisotropy >= 16)
415 so->tsc[0] |= (7 << 20);
416 else
417 if (cso->max_anisotropy >= 12)
418 so->tsc[0] |= (6 << 20);
419 else {
420 so->tsc[0] |= (cso->max_anisotropy >> 1) << 20;
421
422 if (cso->max_anisotropy >= 4)
423 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_35;
424 else
425 if (cso->max_anisotropy >= 2)
426 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_15;
427 }
428
429 if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
430 /* NOTE: must be deactivated for non-shadow textures */
431 so->tsc[0] |= (1 << 9);
432 so->tsc[0] |= (nvgl_comparison_op(cso->compare_func) & 0x7) << 10;
433 }
434
435 f[0] = CLAMP(cso->lod_bias, -16.0f, 15.0f);
436 so->tsc[1] |= ((int)(f[0] * 256.0f) & 0x1fff) << 12;
437
438 f[0] = CLAMP(cso->min_lod, 0.0f, 15.0f);
439 f[1] = CLAMP(cso->max_lod, 0.0f, 15.0f);
440 so->tsc[2] |=
441 (((int)(f[1] * 256.0f) & 0xfff) << 12) | ((int)(f[0] * 256.0f) & 0xfff);
442
443 so->tsc[4] = fui(cso->border_color[0]);
444 so->tsc[5] = fui(cso->border_color[1]);
445 so->tsc[6] = fui(cso->border_color[2]);
446 so->tsc[7] = fui(cso->border_color[3]);
447
448 return (void *)so;
449 }
450
451 static void
452 nvc0_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
453 {
454 unsigned s, i;
455
456 for (s = 0; s < 5; ++s)
457 for (i = 0; i < nvc0_context(pipe)->num_samplers[s]; ++i)
458 if (nvc0_context(pipe)->samplers[s][i] == hwcso)
459 nvc0_context(pipe)->samplers[s][i] = NULL;
460
461 nvc0_screen_tsc_free(nvc0_context(pipe)->screen, nvc0_tsc_entry(hwcso));
462
463 FREE(hwcso);
464 }
465
466 static INLINE void
467 nvc0_stage_sampler_states_bind(struct nvc0_context *nvc0, int s,
468 unsigned nr, void **hwcso)
469 {
470 unsigned i;
471
472 for (i = 0; i < nr; ++i) {
473 struct nvc0_tsc_entry *old = nvc0->samplers[s][i];
474
475 nvc0->samplers[s][i] = nvc0_tsc_entry(hwcso[i]);
476 if (old)
477 nvc0_screen_tsc_unlock(nvc0->screen, old);
478 }
479 for (; i < nvc0->num_samplers[s]; ++i)
480 if (nvc0->samplers[s][i])
481 nvc0_screen_tsc_unlock(nvc0->screen, nvc0->samplers[s][i]);
482
483 nvc0->num_samplers[s] = nr;
484
485 nvc0->dirty |= NVC0_NEW_SAMPLERS;
486 }
487
488 static void
489 nvc0_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
490 {
491 nvc0_stage_sampler_states_bind(nvc0_context(pipe), 0, nr, s);
492 }
493
494 static void
495 nvc0_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
496 {
497 nvc0_stage_sampler_states_bind(nvc0_context(pipe), 4, nr, s);
498 }
499
500 static void
501 nvc0_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
502 {
503 nvc0_stage_sampler_states_bind(nvc0_context(pipe), 3, nr, s);
504 }
505
506 /* NOTE: only called when not referenced anywhere, won't be bound */
507 static void
508 nvc0_sampler_view_destroy(struct pipe_context *pipe,
509 struct pipe_sampler_view *view)
510 {
511 pipe_resource_reference(&view->texture, NULL);
512
513 nvc0_screen_tic_free(nvc0_context(pipe)->screen, nvc0_tic_entry(view));
514
515 FREE(nvc0_tic_entry(view));
516 }
517
518 static INLINE void
519 nvc0_stage_set_sampler_views(struct nvc0_context *nvc0, int s,
520 unsigned nr,
521 struct pipe_sampler_view **views)
522 {
523 unsigned i;
524
525 for (i = 0; i < nr; ++i) {
526 struct nvc0_tic_entry *old = nvc0_tic_entry(nvc0->textures[s][i]);
527 if (old)
528 nvc0_screen_tic_unlock(nvc0->screen, old);
529
530 pipe_sampler_view_reference(&nvc0->textures[s][i], views[i]);
531 }
532
533 for (i = nr; i < nvc0->num_textures[s]; ++i) {
534 struct nvc0_tic_entry *old = nvc0_tic_entry(nvc0->textures[s][i]);
535 if (!old)
536 continue;
537 nvc0_screen_tic_unlock(nvc0->screen, old);
538
539 pipe_sampler_view_reference(&nvc0->textures[s][i], NULL);
540 }
541
542 nvc0->num_textures[s] = nr;
543
544 nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_TEXTURES);
545
546 nvc0->dirty |= NVC0_NEW_TEXTURES;
547 }
548
549 static void
550 nvc0_vp_set_sampler_views(struct pipe_context *pipe,
551 unsigned nr,
552 struct pipe_sampler_view **views)
553 {
554 nvc0_stage_set_sampler_views(nvc0_context(pipe), 0, nr, views);
555 }
556
557 static void
558 nvc0_fp_set_sampler_views(struct pipe_context *pipe,
559 unsigned nr,
560 struct pipe_sampler_view **views)
561 {
562 nvc0_stage_set_sampler_views(nvc0_context(pipe), 4, nr, views);
563 }
564
565 static void
566 nvc0_gp_set_sampler_views(struct pipe_context *pipe,
567 unsigned nr,
568 struct pipe_sampler_view **views)
569 {
570 nvc0_stage_set_sampler_views(nvc0_context(pipe), 3, nr, views);
571 }
572
573 /* ============================= SHADERS =======================================
574 */
575
576 static void *
577 nvc0_sp_state_create(struct pipe_context *pipe,
578 const struct pipe_shader_state *cso, unsigned type)
579 {
580 struct nvc0_program *prog;
581
582 prog = CALLOC_STRUCT(nvc0_program);
583 if (!prog)
584 return NULL;
585
586 prog->type = type;
587 prog->pipe.tokens = tgsi_dup_tokens(cso->tokens);
588
589 return (void *)prog;
590 }
591
592 static void
593 nvc0_sp_state_delete(struct pipe_context *pipe, void *hwcso)
594 {
595 struct nvc0_program *prog = (struct nvc0_program *)hwcso;
596
597 nvc0_program_destroy(nvc0_context(pipe), prog);
598
599 FREE((void *)prog->pipe.tokens);
600 FREE(prog);
601 }
602
603 static void *
604 nvc0_vp_state_create(struct pipe_context *pipe,
605 const struct pipe_shader_state *cso)
606 {
607 return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
608 }
609
610 static void
611 nvc0_vp_state_bind(struct pipe_context *pipe, void *hwcso)
612 {
613 struct nvc0_context *nvc0 = nvc0_context(pipe);
614
615 nvc0->vertprog = hwcso;
616 nvc0->dirty |= NVC0_NEW_VERTPROG;
617 }
618
619 static void *
620 nvc0_fp_state_create(struct pipe_context *pipe,
621 const struct pipe_shader_state *cso)
622 {
623 return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
624 }
625
626 static void
627 nvc0_fp_state_bind(struct pipe_context *pipe, void *hwcso)
628 {
629 struct nvc0_context *nvc0 = nvc0_context(pipe);
630
631 nvc0->fragprog = hwcso;
632 nvc0->dirty |= NVC0_NEW_FRAGPROG;
633 }
634
635 static void *
636 nvc0_gp_state_create(struct pipe_context *pipe,
637 const struct pipe_shader_state *cso)
638 {
639 return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY);
640 }
641
642 static void
643 nvc0_gp_state_bind(struct pipe_context *pipe, void *hwcso)
644 {
645 struct nvc0_context *nvc0 = nvc0_context(pipe);
646
647 nvc0->gmtyprog = hwcso;
648 nvc0->dirty |= NVC0_NEW_GMTYPROG;
649 }
650
651 static void
652 nvc0_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
653 struct pipe_resource *res)
654 {
655 struct nvc0_context *nvc0 = nvc0_context(pipe);
656
657 switch (shader) {
658 case PIPE_SHADER_VERTEX: shader = 0; break;
659 /*
660 case PIPE_SHADER_TESSELLATION_CONTROL: shader = 1; break;
661 case PIPE_SHADER_TESSELLATION_EVALUATION: shader = 2; break;
662 */
663 case PIPE_SHADER_GEOMETRY: shader = 3; break;
664 case PIPE_SHADER_FRAGMENT: shader = 4; break;
665 default:
666 assert(0);
667 break;
668 }
669
670 if (nvc0->constbuf[shader][index])
671 nvc0_bufctx_del_resident(nvc0, NVC0_BUFCTX_CONSTANT,
672 nvc0_resource(
673 nvc0->constbuf[shader][index]));
674
675 pipe_resource_reference(&nvc0->constbuf[shader][index], res);
676
677 nvc0->constbuf_dirty[shader] |= 1 << index;
678
679 nvc0->dirty |= NVC0_NEW_CONSTBUF;
680 }
681
682 /* =============================================================================
683 */
684
685 static void
686 nvc0_set_blend_color(struct pipe_context *pipe,
687 const struct pipe_blend_color *bcol)
688 {
689 struct nvc0_context *nvc0 = nvc0_context(pipe);
690
691 nvc0->blend_colour = *bcol;
692 nvc0->dirty |= NVC0_NEW_BLEND_COLOUR;
693 }
694
695 static void
696 nvc0_set_stencil_ref(struct pipe_context *pipe,
697 const struct pipe_stencil_ref *sr)
698 {
699 struct nvc0_context *nvc0 = nvc0_context(pipe);
700
701 nvc0->stencil_ref = *sr;
702 nvc0->dirty |= NVC0_NEW_STENCIL_REF;
703 }
704
705 static void
706 nvc0_set_clip_state(struct pipe_context *pipe,
707 const struct pipe_clip_state *clip)
708 {
709 struct nvc0_context *nvc0 = nvc0_context(pipe);
710 const unsigned size = clip->nr * sizeof(clip->ucp[0]);
711
712 memcpy(&nvc0->clip.ucp[0][0], &clip->ucp[0][0], size);
713 nvc0->clip.nr = clip->nr;
714
715 nvc0->clip.depth_clamp = clip->depth_clamp;
716
717 nvc0->dirty |= NVC0_NEW_CLIP;
718 }
719
720 static void
721 nvc0_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
722 {
723 struct nvc0_context *nvc0 = nvc0_context(pipe);
724
725 nvc0->sample_mask = sample_mask;
726 nvc0->dirty |= NVC0_NEW_SAMPLE_MASK;
727 }
728
729
730 static void
731 nvc0_set_framebuffer_state(struct pipe_context *pipe,
732 const struct pipe_framebuffer_state *fb)
733 {
734 struct nvc0_context *nvc0 = nvc0_context(pipe);
735
736 nvc0->framebuffer = *fb;
737 nvc0->dirty |= NVC0_NEW_FRAMEBUFFER;
738 }
739
740 static void
741 nvc0_set_polygon_stipple(struct pipe_context *pipe,
742 const struct pipe_poly_stipple *stipple)
743 {
744 struct nvc0_context *nvc0 = nvc0_context(pipe);
745
746 nvc0->stipple = *stipple;
747 nvc0->dirty |= NVC0_NEW_STIPPLE;
748 }
749
750 static void
751 nvc0_set_scissor_state(struct pipe_context *pipe,
752 const struct pipe_scissor_state *scissor)
753 {
754 struct nvc0_context *nvc0 = nvc0_context(pipe);
755
756 nvc0->scissor = *scissor;
757 nvc0->dirty |= NVC0_NEW_SCISSOR;
758 }
759
760 static void
761 nvc0_set_viewport_state(struct pipe_context *pipe,
762 const struct pipe_viewport_state *vpt)
763 {
764 struct nvc0_context *nvc0 = nvc0_context(pipe);
765
766 nvc0->viewport = *vpt;
767 nvc0->dirty |= NVC0_NEW_VIEWPORT;
768 }
769
770 static void
771 nvc0_set_vertex_buffers(struct pipe_context *pipe,
772 unsigned count,
773 const struct pipe_vertex_buffer *vb)
774 {
775 struct nvc0_context *nvc0 = nvc0_context(pipe);
776 unsigned i;
777
778 for (i = 0; i < count; ++i)
779 pipe_resource_reference(&nvc0->vtxbuf[i].buffer, vb[i].buffer);
780 for (; i < nvc0->num_vtxbufs; ++i)
781 pipe_resource_reference(&nvc0->vtxbuf[i].buffer, NULL);
782
783 memcpy(nvc0->vtxbuf, vb, sizeof(*vb) * count);
784 nvc0->num_vtxbufs = count;
785
786 nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_VERTEX);
787
788 nvc0->dirty |= NVC0_NEW_ARRAYS;
789 }
790
791 static void
792 nvc0_set_index_buffer(struct pipe_context *pipe,
793 const struct pipe_index_buffer *ib)
794 {
795 struct nvc0_context *nvc0 = nvc0_context(pipe);
796
797 if (ib)
798 memcpy(&nvc0->idxbuf, ib, sizeof(nvc0->idxbuf));
799 else
800 nvc0->idxbuf.buffer = NULL;
801 }
802
803 static void
804 nvc0_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
805 {
806 struct nvc0_context *nvc0 = nvc0_context(pipe);
807
808 nvc0->vertex = hwcso;
809 nvc0->dirty |= NVC0_NEW_VERTEX;
810 }
811
812 static void *
813 nvc0_tfb_state_create(struct pipe_context *pipe,
814 const struct pipe_stream_output_state *pso)
815 {
816 struct nvc0_transform_feedback_state *so;
817 int n = 0;
818 int i, c, b;
819
820 so = MALLOC(sizeof(*so) + pso->num_outputs * 4 * sizeof(uint8_t));
821 if (!so)
822 return NULL;
823
824 for (b = 0; b < 4; ++b) {
825 for (i = 0; i < pso->num_outputs; ++i) {
826 if (pso->output_buffer[i] != b)
827 continue;
828 for (c = 0; c < 4; ++c) {
829 if (!(pso->register_mask[i] & (1 << c)))
830 continue;
831 so->varying_count[b]++;
832 so->varying_index[n++] = (pso->register_index[i] << 2) | c;
833 }
834 }
835 so->stride[b] = so->varying_count[b] * 4;
836 }
837 if (pso->stride)
838 so->stride[0] = pso->stride;
839
840 return so;
841 }
842
843 static void
844 nvc0_tfb_state_delete(struct pipe_context *pipe, void *hwcso)
845 {
846 FREE(hwcso);
847 }
848
849 static void
850 nvc0_tfb_state_bind(struct pipe_context *pipe, void *hwcso)
851 {
852 nvc0_context(pipe)->tfb = hwcso;
853 nvc0_context(pipe)->dirty |= NVC0_NEW_TFB;
854 }
855
856 static void
857 nvc0_set_transform_feedback_buffers(struct pipe_context *pipe,
858 struct pipe_resource **buffers,
859 int *offsets,
860 int num_buffers)
861 {
862 struct nvc0_context *nvc0 = nvc0_context(pipe);
863 int i;
864
865 assert(num_buffers >= 0 && num_buffers <= 4); /* why signed ? */
866
867 for (i = 0; i < num_buffers; ++i) {
868 assert(offsets[i] >= 0);
869 nvc0->tfb_offset[i] = offsets[i];
870 pipe_resource_reference(&nvc0->tfbbuf[i], buffers[i]);
871 }
872 for (; i < nvc0->num_tfbbufs; ++i)
873 pipe_resource_reference(&nvc0->tfbbuf[i], NULL);
874
875 nvc0->num_tfbbufs = num_buffers;
876
877 nvc0->dirty |= NVC0_NEW_TFB_BUFFERS;
878 }
879
880 void
881 nvc0_init_state_functions(struct nvc0_context *nvc0)
882 {
883 nvc0->pipe.create_blend_state = nvc0_blend_state_create;
884 nvc0->pipe.bind_blend_state = nvc0_blend_state_bind;
885 nvc0->pipe.delete_blend_state = nvc0_blend_state_delete;
886
887 nvc0->pipe.create_rasterizer_state = nvc0_rasterizer_state_create;
888 nvc0->pipe.bind_rasterizer_state = nvc0_rasterizer_state_bind;
889 nvc0->pipe.delete_rasterizer_state = nvc0_rasterizer_state_delete;
890
891 nvc0->pipe.create_depth_stencil_alpha_state = nvc0_zsa_state_create;
892 nvc0->pipe.bind_depth_stencil_alpha_state = nvc0_zsa_state_bind;
893 nvc0->pipe.delete_depth_stencil_alpha_state = nvc0_zsa_state_delete;
894
895 nvc0->pipe.create_sampler_state = nvc0_sampler_state_create;
896 nvc0->pipe.delete_sampler_state = nvc0_sampler_state_delete;
897 nvc0->pipe.bind_vertex_sampler_states = nvc0_vp_sampler_states_bind;
898 nvc0->pipe.bind_fragment_sampler_states = nvc0_fp_sampler_states_bind;
899 nvc0->pipe.bind_geometry_sampler_states = nvc0_gp_sampler_states_bind;
900
901 nvc0->pipe.create_sampler_view = nvc0_create_sampler_view;
902 nvc0->pipe.sampler_view_destroy = nvc0_sampler_view_destroy;
903 nvc0->pipe.set_vertex_sampler_views = nvc0_vp_set_sampler_views;
904 nvc0->pipe.set_fragment_sampler_views = nvc0_fp_set_sampler_views;
905 nvc0->pipe.set_geometry_sampler_views = nvc0_gp_set_sampler_views;
906
907 nvc0->pipe.create_vs_state = nvc0_vp_state_create;
908 nvc0->pipe.create_fs_state = nvc0_fp_state_create;
909 nvc0->pipe.create_gs_state = nvc0_gp_state_create;
910 nvc0->pipe.bind_vs_state = nvc0_vp_state_bind;
911 nvc0->pipe.bind_fs_state = nvc0_fp_state_bind;
912 nvc0->pipe.bind_gs_state = nvc0_gp_state_bind;
913 nvc0->pipe.delete_vs_state = nvc0_sp_state_delete;
914 nvc0->pipe.delete_fs_state = nvc0_sp_state_delete;
915 nvc0->pipe.delete_gs_state = nvc0_sp_state_delete;
916
917 nvc0->pipe.set_blend_color = nvc0_set_blend_color;
918 nvc0->pipe.set_stencil_ref = nvc0_set_stencil_ref;
919 nvc0->pipe.set_clip_state = nvc0_set_clip_state;
920 nvc0->pipe.set_sample_mask = nvc0_set_sample_mask;
921 nvc0->pipe.set_constant_buffer = nvc0_set_constant_buffer;
922 nvc0->pipe.set_framebuffer_state = nvc0_set_framebuffer_state;
923 nvc0->pipe.set_polygon_stipple = nvc0_set_polygon_stipple;
924 nvc0->pipe.set_scissor_state = nvc0_set_scissor_state;
925 nvc0->pipe.set_viewport_state = nvc0_set_viewport_state;
926
927 nvc0->pipe.create_vertex_elements_state = nvc0_vertex_state_create;
928 nvc0->pipe.delete_vertex_elements_state = nvc0_vertex_state_delete;
929 nvc0->pipe.bind_vertex_elements_state = nvc0_vertex_state_bind;
930
931 nvc0->pipe.set_vertex_buffers = nvc0_set_vertex_buffers;
932 nvc0->pipe.set_index_buffer = nvc0_set_index_buffer;
933
934 nvc0->pipe.create_stream_output_state = nvc0_tfb_state_create;
935 nvc0->pipe.delete_stream_output_state = nvc0_tfb_state_delete;
936 nvc0->pipe.bind_stream_output_state = nvc0_tfb_state_bind;
937 nvc0->pipe.set_stream_output_buffers = nvc0_set_transform_feedback_buffers;
938
939 nvc0->pipe.redefine_user_buffer = u_default_redefine_user_buffer;
940 }
941