2 * Copyright 2010 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "pipe/p_defines.h"
24 #include "util/u_inlines.h"
25 #include "util/u_transfer.h"
27 #include "tgsi/tgsi_parse.h"
29 #include "nvc0_stateobj.h"
30 #include "nvc0_context.h"
32 #include "nvc0_3d.xml.h"
33 #include "nv50_texture.xml.h"
35 #include "nouveau/nouveau_gldefs.h"
37 static INLINE
uint32_t
38 nvc0_colormask(unsigned mask
)
42 if (mask
& PIPE_MASK_R
)
44 if (mask
& PIPE_MASK_G
)
46 if (mask
& PIPE_MASK_B
)
48 if (mask
& PIPE_MASK_A
)
54 #define NVC0_BLEND_FACTOR_CASE(a, b) \
55 case PIPE_BLENDFACTOR_##a: return NV50_3D_BLEND_FACTOR_##b
57 static INLINE
uint32_t
58 nvc0_blend_fac(unsigned factor
)
61 NVC0_BLEND_FACTOR_CASE(ONE
, ONE
);
62 NVC0_BLEND_FACTOR_CASE(SRC_COLOR
, SRC_COLOR
);
63 NVC0_BLEND_FACTOR_CASE(SRC_ALPHA
, SRC_ALPHA
);
64 NVC0_BLEND_FACTOR_CASE(DST_ALPHA
, DST_ALPHA
);
65 NVC0_BLEND_FACTOR_CASE(DST_COLOR
, DST_COLOR
);
66 NVC0_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE
, SRC_ALPHA_SATURATE
);
67 NVC0_BLEND_FACTOR_CASE(CONST_COLOR
, CONSTANT_COLOR
);
68 NVC0_BLEND_FACTOR_CASE(CONST_ALPHA
, CONSTANT_ALPHA
);
69 NVC0_BLEND_FACTOR_CASE(SRC1_COLOR
, SRC1_COLOR
);
70 NVC0_BLEND_FACTOR_CASE(SRC1_ALPHA
, SRC1_ALPHA
);
71 NVC0_BLEND_FACTOR_CASE(ZERO
, ZERO
);
72 NVC0_BLEND_FACTOR_CASE(INV_SRC_COLOR
, ONE_MINUS_SRC_COLOR
);
73 NVC0_BLEND_FACTOR_CASE(INV_SRC_ALPHA
, ONE_MINUS_SRC_ALPHA
);
74 NVC0_BLEND_FACTOR_CASE(INV_DST_ALPHA
, ONE_MINUS_DST_ALPHA
);
75 NVC0_BLEND_FACTOR_CASE(INV_DST_COLOR
, ONE_MINUS_DST_COLOR
);
76 NVC0_BLEND_FACTOR_CASE(INV_CONST_COLOR
, ONE_MINUS_CONSTANT_COLOR
);
77 NVC0_BLEND_FACTOR_CASE(INV_CONST_ALPHA
, ONE_MINUS_CONSTANT_ALPHA
);
78 NVC0_BLEND_FACTOR_CASE(INV_SRC1_COLOR
, ONE_MINUS_SRC1_COLOR
);
79 NVC0_BLEND_FACTOR_CASE(INV_SRC1_ALPHA
, ONE_MINUS_SRC1_ALPHA
);
81 return NV50_3D_BLEND_FACTOR_ZERO
;
86 nvc0_blend_state_create(struct pipe_context
*pipe
,
87 const struct pipe_blend_state
*cso
)
89 struct nvc0_blend_stateobj
*so
= CALLOC_STRUCT(nvc0_blend_stateobj
);
94 SB_IMMED_3D(so
, BLEND_INDEPENDENT
, cso
->independent_blend_enable
);
96 if (!cso
->independent_blend_enable
) {
97 SB_BEGIN_3D(so
, BLEND_ENABLES
, 1);
98 SB_DATA (so
, cso
->rt
[0].blend_enable
? 0xff : 0);
100 if (cso
->rt
[0].blend_enable
) {
101 SB_BEGIN_3D(so
, BLEND_EQUATION_RGB
, 5);
102 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[0].rgb_func
));
103 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[0].rgb_src_factor
));
104 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[0].rgb_dst_factor
));
105 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[0].alpha_func
));
106 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[0].alpha_src_factor
));
107 SB_BEGIN_3D(so
, BLEND_FUNC_DST_ALPHA
, 1);
108 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[0].alpha_dst_factor
));
111 SB_BEGIN_3D(so
, COLOR_MASK_BROADCAST
, 1);
112 SB_DATA (so
, nvc0_colormask(cso
->rt
[0].colormask
));
116 for (i
= 0; i
< 8; ++i
) {
117 if (!cso
->rt
[i
].blend_enable
)
121 SB_BEGIN_3D(so
, IBLEND_EQUATION_RGB(i
), 6);
122 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[i
].rgb_func
));
123 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[i
].rgb_src_factor
));
124 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[i
].rgb_dst_factor
));
125 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[i
].alpha_func
));
126 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[i
].alpha_src_factor
));
127 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[i
].alpha_dst_factor
));
129 SB_BEGIN_3D(so
, BLEND_ENABLES
, 1);
132 SB_BEGIN_3D(so
, COLOR_MASK(0), 8);
133 for (i
= 0; i
< 8; ++i
)
134 SB_DATA(so
, nvc0_colormask(cso
->rt
[i
].colormask
));
137 if (cso
->logicop_enable
) {
138 SB_BEGIN_3D(so
, LOGIC_OP_ENABLE
, 2);
140 SB_DATA (so
, nvgl_logicop_func(cso
->logicop_func
));
142 SB_IMMED_3D(so
, LOGIC_OP_ENABLE
, 0);
145 assert(so
->size
< (sizeof(so
->state
) / sizeof(so
->state
[0])));
150 nvc0_blend_state_bind(struct pipe_context
*pipe
, void *hwcso
)
152 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
155 nvc0
->dirty
|= NVC0_NEW_BLEND
;
159 nvc0_blend_state_delete(struct pipe_context
*pipe
, void *hwcso
)
165 nvc0_rasterizer_state_create(struct pipe_context
*pipe
,
166 const struct pipe_rasterizer_state
*cso
)
168 struct nvc0_rasterizer_stateobj
*so
;
170 so
= CALLOC_STRUCT(nvc0_rasterizer_stateobj
);
175 /* Scissor enables are handled in scissor state, we will not want to
176 * always emit 16 commands, one for each scissor rectangle, here.
179 SB_BEGIN_3D(so
, SHADE_MODEL
, 1);
180 SB_DATA (so
, cso
->flatshade
? NVC0_3D_SHADE_MODEL_FLAT
:
181 NVC0_3D_SHADE_MODEL_SMOOTH
);
182 SB_IMMED_3D(so
, PROVOKING_VERTEX_LAST
, !cso
->flatshade_first
);
183 SB_IMMED_3D(so
, VERTEX_TWO_SIDE_ENABLE
, cso
->light_twoside
);
185 SB_BEGIN_3D(so
, LINE_WIDTH
, 1);
186 SB_DATA (so
, fui(cso
->line_width
));
187 SB_IMMED_3D(so
, LINE_SMOOTH_ENABLE
, cso
->line_smooth
);
189 SB_BEGIN_3D(so
, LINE_STIPPLE_ENABLE
, 1);
190 if (cso
->line_stipple_enable
) {
192 SB_BEGIN_3D(so
, LINE_STIPPLE_PATTERN
, 1);
193 SB_DATA (so
, (cso
->line_stipple_pattern
<< 8) |
194 cso
->line_stipple_factor
);
200 SB_IMMED_3D(so
, VP_POINT_SIZE_EN
, cso
->point_size_per_vertex
);
201 if (!cso
->point_size_per_vertex
) {
202 SB_BEGIN_3D(so
, POINT_SIZE
, 1);
203 SB_DATA (so
, fui(cso
->point_size
));
205 SB_IMMED_3D(so
, POINT_SPRITE_ENABLE
, cso
->point_quad_rasterization
);
206 SB_IMMED_3D(so
, POINT_SMOOTH_ENABLE
, cso
->point_smooth
);
208 SB_BEGIN_3D(so
, POLYGON_MODE_FRONT
, 1);
209 SB_DATA (so
, nvgl_polygon_mode(cso
->fill_front
));
210 SB_BEGIN_3D(so
, POLYGON_MODE_BACK
, 1);
211 SB_DATA (so
, nvgl_polygon_mode(cso
->fill_back
));
212 SB_IMMED_3D(so
, POLYGON_SMOOTH_ENABLE
, cso
->poly_smooth
);
214 SB_BEGIN_3D(so
, CULL_FACE_ENABLE
, 3);
215 SB_DATA (so
, cso
->cull_face
!= PIPE_FACE_NONE
);
216 SB_DATA (so
, cso
->front_ccw
? NVC0_3D_FRONT_FACE_CCW
:
217 NVC0_3D_FRONT_FACE_CW
);
218 switch (cso
->cull_face
) {
219 case PIPE_FACE_FRONT_AND_BACK
:
220 SB_DATA(so
, NVC0_3D_CULL_FACE_FRONT_AND_BACK
);
222 case PIPE_FACE_FRONT
:
223 SB_DATA(so
, NVC0_3D_CULL_FACE_FRONT
);
227 SB_DATA(so
, NVC0_3D_CULL_FACE_BACK
);
231 SB_IMMED_3D(so
, POLYGON_STIPPLE_ENABLE
, cso
->poly_stipple_enable
);
232 SB_BEGIN_3D(so
, POLYGON_OFFSET_POINT_ENABLE
, 3);
233 SB_DATA (so
, cso
->offset_point
);
234 SB_DATA (so
, cso
->offset_line
);
235 SB_DATA (so
, cso
->offset_tri
);
237 if (cso
->offset_point
|| cso
->offset_line
|| cso
->offset_tri
) {
238 SB_BEGIN_3D(so
, POLYGON_OFFSET_FACTOR
, 1);
239 SB_DATA (so
, fui(cso
->offset_scale
));
240 SB_BEGIN_3D(so
, POLYGON_OFFSET_UNITS
, 1);
241 SB_DATA (so
, fui(cso
->offset_units
* 2.0f
));
244 assert(so
->size
< (sizeof(so
->state
) / sizeof(so
->state
[0])));
249 nvc0_rasterizer_state_bind(struct pipe_context
*pipe
, void *hwcso
)
251 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
254 nvc0
->dirty
|= NVC0_NEW_RASTERIZER
;
258 nvc0_rasterizer_state_delete(struct pipe_context
*pipe
, void *hwcso
)
264 nvc0_zsa_state_create(struct pipe_context
*pipe
,
265 const struct pipe_depth_stencil_alpha_state
*cso
)
267 struct nvc0_zsa_stateobj
*so
= CALLOC_STRUCT(nvc0_zsa_stateobj
);
271 SB_IMMED_3D(so
, DEPTH_WRITE_ENABLE
, cso
->depth
.writemask
);
272 SB_BEGIN_3D(so
, DEPTH_TEST_ENABLE
, 1);
273 if (cso
->depth
.enabled
) {
275 SB_BEGIN_3D(so
, DEPTH_TEST_FUNC
, 1);
276 SB_DATA (so
, nvgl_comparison_op(cso
->depth
.func
));
281 if (cso
->stencil
[0].enabled
) {
282 SB_BEGIN_3D(so
, STENCIL_ENABLE
, 5);
284 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].fail_op
));
285 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].zfail_op
));
286 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].zpass_op
));
287 SB_DATA (so
, nvgl_comparison_op(cso
->stencil
[0].func
));
288 SB_BEGIN_3D(so
, STENCIL_FRONT_FUNC_MASK
, 2);
289 SB_DATA (so
, cso
->stencil
[0].valuemask
);
290 SB_DATA (so
, cso
->stencil
[0].writemask
);
292 SB_IMMED_3D(so
, STENCIL_ENABLE
, 0);
295 if (cso
->stencil
[1].enabled
) {
296 assert(cso
->stencil
[0].enabled
);
297 SB_BEGIN_3D(so
, STENCIL_TWO_SIDE_ENABLE
, 5);
299 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].fail_op
));
300 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].zfail_op
));
301 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].zpass_op
));
302 SB_DATA (so
, nvgl_comparison_op(cso
->stencil
[1].func
));
303 SB_BEGIN_3D(so
, STENCIL_BACK_MASK
, 2);
304 SB_DATA (so
, cso
->stencil
[1].writemask
);
305 SB_DATA (so
, cso
->stencil
[1].valuemask
);
307 if (cso
->stencil
[0].enabled
) {
308 SB_IMMED_3D(so
, STENCIL_TWO_SIDE_ENABLE
, 0);
311 SB_BEGIN_3D(so
, ALPHA_TEST_ENABLE
, 1);
312 if (cso
->alpha
.enabled
) {
314 SB_BEGIN_3D(so
, ALPHA_TEST_REF
, 2);
315 SB_DATA (so
, fui(cso
->alpha
.ref_value
));
316 SB_DATA (so
, nvgl_comparison_op(cso
->alpha
.func
));
321 assert(so
->size
< (sizeof(so
->state
) / sizeof(so
->state
[0])));
326 nvc0_zsa_state_bind(struct pipe_context
*pipe
, void *hwcso
)
328 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
331 nvc0
->dirty
|= NVC0_NEW_ZSA
;
335 nvc0_zsa_state_delete(struct pipe_context
*pipe
, void *hwcso
)
340 /* ====================== SAMPLERS AND TEXTURES ================================
343 #define NV50_TSC_WRAP_CASE(n) \
344 case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
346 static INLINE
unsigned
347 nv50_tsc_wrap_mode(unsigned wrap
)
350 NV50_TSC_WRAP_CASE(REPEAT
);
351 NV50_TSC_WRAP_CASE(MIRROR_REPEAT
);
352 NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE
);
353 NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER
);
354 NV50_TSC_WRAP_CASE(CLAMP
);
355 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE
);
356 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER
);
357 NV50_TSC_WRAP_CASE(MIRROR_CLAMP
);
359 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap
);
360 return NV50_TSC_WRAP_REPEAT
;
365 nvc0_sampler_state_create(struct pipe_context
*pipe
,
366 const struct pipe_sampler_state
*cso
)
368 struct nvc0_tsc_entry
*so
= CALLOC_STRUCT(nvc0_tsc_entry
);
373 so
->tsc
[0] = (0x00026000 |
374 (nv50_tsc_wrap_mode(cso
->wrap_s
) << 0) |
375 (nv50_tsc_wrap_mode(cso
->wrap_t
) << 3) |
376 (nv50_tsc_wrap_mode(cso
->wrap_r
) << 6));
378 switch (cso
->mag_img_filter
) {
379 case PIPE_TEX_FILTER_LINEAR
:
380 so
->tsc
[1] |= NV50_TSC_1_MAGF_LINEAR
;
382 case PIPE_TEX_FILTER_NEAREST
:
384 so
->tsc
[1] |= NV50_TSC_1_MAGF_NEAREST
;
388 switch (cso
->min_img_filter
) {
389 case PIPE_TEX_FILTER_LINEAR
:
390 so
->tsc
[1] |= NV50_TSC_1_MINF_LINEAR
;
392 case PIPE_TEX_FILTER_NEAREST
:
394 so
->tsc
[1] |= NV50_TSC_1_MINF_NEAREST
;
398 switch (cso
->min_mip_filter
) {
399 case PIPE_TEX_MIPFILTER_LINEAR
:
400 so
->tsc
[1] |= NV50_TSC_1_MIPF_LINEAR
;
402 case PIPE_TEX_MIPFILTER_NEAREST
:
403 so
->tsc
[1] |= NV50_TSC_1_MIPF_NEAREST
;
405 case PIPE_TEX_MIPFILTER_NONE
:
407 so
->tsc
[1] |= NV50_TSC_1_MIPF_NONE
;
411 if (cso
->max_anisotropy
>= 16)
412 so
->tsc
[0] |= (7 << 20);
414 if (cso
->max_anisotropy
>= 12)
415 so
->tsc
[0] |= (6 << 20);
417 so
->tsc
[0] |= (cso
->max_anisotropy
>> 1) << 20;
419 if (cso
->max_anisotropy
>= 4)
420 so
->tsc
[1] |= NV50_TSC_1_UNKN_ANISO_35
;
422 if (cso
->max_anisotropy
>= 2)
423 so
->tsc
[1] |= NV50_TSC_1_UNKN_ANISO_15
;
426 if (cso
->compare_mode
== PIPE_TEX_COMPARE_R_TO_TEXTURE
) {
427 /* NOTE: must be deactivated for non-shadow textures */
428 so
->tsc
[0] |= (1 << 9);
429 so
->tsc
[0] |= (nvgl_comparison_op(cso
->compare_func
) & 0x7) << 10;
432 f
[0] = CLAMP(cso
->lod_bias
, -16.0f
, 15.0f
);
433 so
->tsc
[1] |= ((int)(f
[0] * 256.0f
) & 0x1fff) << 12;
435 f
[0] = CLAMP(cso
->min_lod
, 0.0f
, 15.0f
);
436 f
[1] = CLAMP(cso
->max_lod
, 0.0f
, 15.0f
);
438 (((int)(f
[1] * 256.0f
) & 0xfff) << 12) | ((int)(f
[0] * 256.0f
) & 0xfff);
440 so
->tsc
[4] = fui(cso
->border_color
[0]);
441 so
->tsc
[5] = fui(cso
->border_color
[1]);
442 so
->tsc
[6] = fui(cso
->border_color
[2]);
443 so
->tsc
[7] = fui(cso
->border_color
[3]);
449 nvc0_sampler_state_delete(struct pipe_context
*pipe
, void *hwcso
)
453 for (s
= 0; s
< 5; ++s
)
454 for (i
= 0; i
< nvc0_context(pipe
)->num_samplers
[s
]; ++i
)
455 if (nvc0_context(pipe
)->samplers
[s
][i
] == hwcso
)
456 nvc0_context(pipe
)->samplers
[s
][i
] = NULL
;
458 nvc0_screen_tsc_free(nvc0_context(pipe
)->screen
, nvc0_tsc_entry(hwcso
));
464 nvc0_stage_sampler_states_bind(struct nvc0_context
*nvc0
, int s
,
465 unsigned nr
, void **hwcso
)
469 for (i
= 0; i
< nr
; ++i
) {
470 struct nvc0_tsc_entry
*old
= nvc0
->samplers
[s
][i
];
472 nvc0
->samplers
[s
][i
] = nvc0_tsc_entry(hwcso
[i
]);
474 nvc0_screen_tsc_unlock(nvc0
->screen
, old
);
476 for (; i
< nvc0
->num_samplers
[s
]; ++i
)
477 if (nvc0
->samplers
[s
][i
])
478 nvc0_screen_tsc_unlock(nvc0
->screen
, nvc0
->samplers
[s
][i
]);
480 nvc0
->num_samplers
[s
] = nr
;
482 nvc0
->dirty
|= NVC0_NEW_SAMPLERS
;
486 nvc0_vp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
488 nvc0_stage_sampler_states_bind(nvc0_context(pipe
), 0, nr
, s
);
492 nvc0_fp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
494 nvc0_stage_sampler_states_bind(nvc0_context(pipe
), 4, nr
, s
);
498 nvc0_gp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
500 nvc0_stage_sampler_states_bind(nvc0_context(pipe
), 3, nr
, s
);
503 /* NOTE: only called when not referenced anywhere, won't be bound */
505 nvc0_sampler_view_destroy(struct pipe_context
*pipe
,
506 struct pipe_sampler_view
*view
)
508 pipe_resource_reference(&view
->texture
, NULL
);
510 nvc0_screen_tic_free(nvc0_context(pipe
)->screen
, nvc0_tic_entry(view
));
512 FREE(nvc0_tic_entry(view
));
516 nvc0_stage_set_sampler_views(struct nvc0_context
*nvc0
, int s
,
518 struct pipe_sampler_view
**views
)
522 for (i
= 0; i
< nr
; ++i
) {
523 struct nvc0_tic_entry
*old
= nvc0_tic_entry(nvc0
->textures
[s
][i
]);
525 nvc0_screen_tic_unlock(nvc0
->screen
, old
);
527 pipe_sampler_view_reference(&nvc0
->textures
[s
][i
], views
[i
]);
530 for (i
= nr
; i
< nvc0
->num_textures
[s
]; ++i
) {
531 struct nvc0_tic_entry
*old
= nvc0_tic_entry(nvc0
->textures
[s
][i
]);
534 nvc0_screen_tic_unlock(nvc0
->screen
, old
);
536 pipe_sampler_view_reference(&nvc0
->textures
[s
][i
], NULL
);
539 nvc0
->num_textures
[s
] = nr
;
541 nvc0_bufctx_reset(nvc0
, NVC0_BUFCTX_TEXTURES
);
543 nvc0
->dirty
|= NVC0_NEW_TEXTURES
;
547 nvc0_vp_set_sampler_views(struct pipe_context
*pipe
,
549 struct pipe_sampler_view
**views
)
551 nvc0_stage_set_sampler_views(nvc0_context(pipe
), 0, nr
, views
);
555 nvc0_fp_set_sampler_views(struct pipe_context
*pipe
,
557 struct pipe_sampler_view
**views
)
559 nvc0_stage_set_sampler_views(nvc0_context(pipe
), 4, nr
, views
);
563 nvc0_gp_set_sampler_views(struct pipe_context
*pipe
,
565 struct pipe_sampler_view
**views
)
567 nvc0_stage_set_sampler_views(nvc0_context(pipe
), 3, nr
, views
);
570 /* ============================= SHADERS =======================================
574 nvc0_sp_state_create(struct pipe_context
*pipe
,
575 const struct pipe_shader_state
*cso
, unsigned type
)
577 struct nvc0_program
*prog
;
579 prog
= CALLOC_STRUCT(nvc0_program
);
584 prog
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
590 nvc0_sp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
592 struct nvc0_program
*prog
= (struct nvc0_program
*)hwcso
;
594 nvc0_program_destroy(nvc0_context(pipe
), prog
);
596 FREE((void *)prog
->pipe
.tokens
);
601 nvc0_vp_state_create(struct pipe_context
*pipe
,
602 const struct pipe_shader_state
*cso
)
604 return nvc0_sp_state_create(pipe
, cso
, PIPE_SHADER_VERTEX
);
608 nvc0_vp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
610 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
612 nvc0
->vertprog
= hwcso
;
613 nvc0
->dirty
|= NVC0_NEW_VERTPROG
;
617 nvc0_fp_state_create(struct pipe_context
*pipe
,
618 const struct pipe_shader_state
*cso
)
620 return nvc0_sp_state_create(pipe
, cso
, PIPE_SHADER_FRAGMENT
);
624 nvc0_fp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
626 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
628 nvc0
->fragprog
= hwcso
;
629 nvc0
->dirty
|= NVC0_NEW_FRAGPROG
;
633 nvc0_gp_state_create(struct pipe_context
*pipe
,
634 const struct pipe_shader_state
*cso
)
636 return nvc0_sp_state_create(pipe
, cso
, PIPE_SHADER_GEOMETRY
);
640 nvc0_gp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
642 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
644 nvc0
->gmtyprog
= hwcso
;
645 nvc0
->dirty
|= NVC0_NEW_GMTYPROG
;
649 nvc0_set_constant_buffer(struct pipe_context
*pipe
, uint shader
, uint index
,
650 struct pipe_resource
*res
)
652 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
655 case PIPE_SHADER_VERTEX
: shader
= 0; break;
657 case PIPE_SHADER_TESSELLATION_CONTROL: shader = 1; break;
658 case PIPE_SHADER_TESSELLATION_EVALUATION: shader = 2; break;
660 case PIPE_SHADER_GEOMETRY
: shader
= 3; break;
661 case PIPE_SHADER_FRAGMENT
: shader
= 4; break;
667 if (nvc0
->constbuf
[shader
][index
])
668 nvc0_bufctx_del_resident(nvc0
, NVC0_BUFCTX_CONSTANT
,
670 nvc0
->constbuf
[shader
][index
]));
672 pipe_resource_reference(&nvc0
->constbuf
[shader
][index
], res
);
674 nvc0
->constbuf_dirty
[shader
] |= 1 << index
;
676 nvc0
->dirty
|= NVC0_NEW_CONSTBUF
;
679 /* =============================================================================
683 nvc0_set_blend_color(struct pipe_context
*pipe
,
684 const struct pipe_blend_color
*bcol
)
686 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
688 nvc0
->blend_colour
= *bcol
;
689 nvc0
->dirty
|= NVC0_NEW_BLEND_COLOUR
;
693 nvc0_set_stencil_ref(struct pipe_context
*pipe
,
694 const struct pipe_stencil_ref
*sr
)
696 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
698 nvc0
->stencil_ref
= *sr
;
699 nvc0
->dirty
|= NVC0_NEW_STENCIL_REF
;
703 nvc0_set_clip_state(struct pipe_context
*pipe
,
704 const struct pipe_clip_state
*clip
)
706 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
707 const unsigned size
= clip
->nr
* sizeof(clip
->ucp
[0]);
709 memcpy(&nvc0
->clip
.ucp
[0][0], &clip
->ucp
[0][0], size
);
710 nvc0
->clip
.nr
= clip
->nr
;
712 nvc0
->clip
.depth_clamp
= clip
->depth_clamp
;
714 nvc0
->dirty
|= NVC0_NEW_CLIP
;
718 nvc0_set_sample_mask(struct pipe_context
*pipe
, unsigned sample_mask
)
720 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
722 nvc0
->sample_mask
= sample_mask
;
723 nvc0
->dirty
|= NVC0_NEW_SAMPLE_MASK
;
728 nvc0_set_framebuffer_state(struct pipe_context
*pipe
,
729 const struct pipe_framebuffer_state
*fb
)
731 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
733 nvc0
->framebuffer
= *fb
;
734 nvc0
->dirty
|= NVC0_NEW_FRAMEBUFFER
;
738 nvc0_set_polygon_stipple(struct pipe_context
*pipe
,
739 const struct pipe_poly_stipple
*stipple
)
741 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
743 nvc0
->stipple
= *stipple
;
744 nvc0
->dirty
|= NVC0_NEW_STIPPLE
;
748 nvc0_set_scissor_state(struct pipe_context
*pipe
,
749 const struct pipe_scissor_state
*scissor
)
751 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
753 nvc0
->scissor
= *scissor
;
754 nvc0
->dirty
|= NVC0_NEW_SCISSOR
;
758 nvc0_set_viewport_state(struct pipe_context
*pipe
,
759 const struct pipe_viewport_state
*vpt
)
761 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
763 nvc0
->viewport
= *vpt
;
764 nvc0
->dirty
|= NVC0_NEW_VIEWPORT
;
768 nvc0_set_vertex_buffers(struct pipe_context
*pipe
,
770 const struct pipe_vertex_buffer
*vb
)
772 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
775 for (i
= 0; i
< count
; ++i
)
776 pipe_resource_reference(&nvc0
->vtxbuf
[i
].buffer
, vb
[i
].buffer
);
777 for (; i
< nvc0
->num_vtxbufs
; ++i
)
778 pipe_resource_reference(&nvc0
->vtxbuf
[i
].buffer
, NULL
);
780 memcpy(nvc0
->vtxbuf
, vb
, sizeof(*vb
) * count
);
781 nvc0
->num_vtxbufs
= count
;
783 nvc0_bufctx_reset(nvc0
, NVC0_BUFCTX_VERTEX
);
785 nvc0
->dirty
|= NVC0_NEW_ARRAYS
;
789 nvc0_set_index_buffer(struct pipe_context
*pipe
,
790 const struct pipe_index_buffer
*ib
)
792 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
795 memcpy(&nvc0
->idxbuf
, ib
, sizeof(nvc0
->idxbuf
));
797 nvc0
->idxbuf
.buffer
= NULL
;
801 nvc0_vertex_state_bind(struct pipe_context
*pipe
, void *hwcso
)
803 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
805 nvc0
->vertex
= hwcso
;
806 nvc0
->dirty
|= NVC0_NEW_VERTEX
;
810 nvc0_tfb_state_create(struct pipe_context
*pipe
,
811 const struct pipe_stream_output_state
*pso
)
813 struct nvc0_transform_feedback_state
*so
;
817 so
= MALLOC(sizeof(*so
) + pso
->num_outputs
* 4 * sizeof(uint8_t));
821 for (b
= 0; b
< 4; ++b
) {
822 for (i
= 0; i
< pso
->num_outputs
; ++i
) {
823 if (pso
->output_buffer
[i
] != b
)
825 for (c
= 0; c
< 4; ++c
) {
826 if (!(pso
->register_mask
[i
] & (1 << c
)))
828 so
->varying_count
[b
]++;
829 so
->varying_index
[n
++] = (pso
->register_index
[i
] << 2) | c
;
832 so
->stride
[b
] = so
->varying_count
[b
] * 4;
835 so
->stride
[0] = pso
->stride
;
841 nvc0_tfb_state_delete(struct pipe_context
*pipe
, void *hwcso
)
847 nvc0_tfb_state_bind(struct pipe_context
*pipe
, void *hwcso
)
849 nvc0_context(pipe
)->tfb
= hwcso
;
850 nvc0_context(pipe
)->dirty
|= NVC0_NEW_TFB
;
854 nvc0_set_transform_feedback_buffers(struct pipe_context
*pipe
,
855 struct pipe_resource
**buffers
,
859 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
862 assert(num_buffers
>= 0 && num_buffers
<= 4); /* why signed ? */
864 for (i
= 0; i
< num_buffers
; ++i
) {
865 assert(offsets
[i
] >= 0);
866 nvc0
->tfb_offset
[i
] = offsets
[i
];
867 pipe_resource_reference(&nvc0
->tfbbuf
[i
], buffers
[i
]);
869 for (; i
< nvc0
->num_tfbbufs
; ++i
)
870 pipe_resource_reference(&nvc0
->tfbbuf
[i
], NULL
);
872 nvc0
->num_tfbbufs
= num_buffers
;
874 nvc0
->dirty
|= NVC0_NEW_TFB_BUFFERS
;
878 nvc0_init_state_functions(struct nvc0_context
*nvc0
)
880 nvc0
->pipe
.create_blend_state
= nvc0_blend_state_create
;
881 nvc0
->pipe
.bind_blend_state
= nvc0_blend_state_bind
;
882 nvc0
->pipe
.delete_blend_state
= nvc0_blend_state_delete
;
884 nvc0
->pipe
.create_rasterizer_state
= nvc0_rasterizer_state_create
;
885 nvc0
->pipe
.bind_rasterizer_state
= nvc0_rasterizer_state_bind
;
886 nvc0
->pipe
.delete_rasterizer_state
= nvc0_rasterizer_state_delete
;
888 nvc0
->pipe
.create_depth_stencil_alpha_state
= nvc0_zsa_state_create
;
889 nvc0
->pipe
.bind_depth_stencil_alpha_state
= nvc0_zsa_state_bind
;
890 nvc0
->pipe
.delete_depth_stencil_alpha_state
= nvc0_zsa_state_delete
;
892 nvc0
->pipe
.create_sampler_state
= nvc0_sampler_state_create
;
893 nvc0
->pipe
.delete_sampler_state
= nvc0_sampler_state_delete
;
894 nvc0
->pipe
.bind_vertex_sampler_states
= nvc0_vp_sampler_states_bind
;
895 nvc0
->pipe
.bind_fragment_sampler_states
= nvc0_fp_sampler_states_bind
;
896 nvc0
->pipe
.bind_geometry_sampler_states
= nvc0_gp_sampler_states_bind
;
898 nvc0
->pipe
.create_sampler_view
= nvc0_create_sampler_view
;
899 nvc0
->pipe
.sampler_view_destroy
= nvc0_sampler_view_destroy
;
900 nvc0
->pipe
.set_vertex_sampler_views
= nvc0_vp_set_sampler_views
;
901 nvc0
->pipe
.set_fragment_sampler_views
= nvc0_fp_set_sampler_views
;
902 nvc0
->pipe
.set_geometry_sampler_views
= nvc0_gp_set_sampler_views
;
904 nvc0
->pipe
.create_vs_state
= nvc0_vp_state_create
;
905 nvc0
->pipe
.create_fs_state
= nvc0_fp_state_create
;
906 nvc0
->pipe
.create_gs_state
= nvc0_gp_state_create
;
907 nvc0
->pipe
.bind_vs_state
= nvc0_vp_state_bind
;
908 nvc0
->pipe
.bind_fs_state
= nvc0_fp_state_bind
;
909 nvc0
->pipe
.bind_gs_state
= nvc0_gp_state_bind
;
910 nvc0
->pipe
.delete_vs_state
= nvc0_sp_state_delete
;
911 nvc0
->pipe
.delete_fs_state
= nvc0_sp_state_delete
;
912 nvc0
->pipe
.delete_gs_state
= nvc0_sp_state_delete
;
914 nvc0
->pipe
.set_blend_color
= nvc0_set_blend_color
;
915 nvc0
->pipe
.set_stencil_ref
= nvc0_set_stencil_ref
;
916 nvc0
->pipe
.set_clip_state
= nvc0_set_clip_state
;
917 nvc0
->pipe
.set_sample_mask
= nvc0_set_sample_mask
;
918 nvc0
->pipe
.set_constant_buffer
= nvc0_set_constant_buffer
;
919 nvc0
->pipe
.set_framebuffer_state
= nvc0_set_framebuffer_state
;
920 nvc0
->pipe
.set_polygon_stipple
= nvc0_set_polygon_stipple
;
921 nvc0
->pipe
.set_scissor_state
= nvc0_set_scissor_state
;
922 nvc0
->pipe
.set_viewport_state
= nvc0_set_viewport_state
;
924 nvc0
->pipe
.create_vertex_elements_state
= nvc0_vertex_state_create
;
925 nvc0
->pipe
.delete_vertex_elements_state
= nvc0_vertex_state_delete
;
926 nvc0
->pipe
.bind_vertex_elements_state
= nvc0_vertex_state_bind
;
928 nvc0
->pipe
.set_vertex_buffers
= nvc0_set_vertex_buffers
;
929 nvc0
->pipe
.set_index_buffer
= nvc0_set_index_buffer
;
931 nvc0
->pipe
.create_stream_output_state
= nvc0_tfb_state_create
;
932 nvc0
->pipe
.delete_stream_output_state
= nvc0_tfb_state_delete
;
933 nvc0
->pipe
.bind_stream_output_state
= nvc0_tfb_state_bind
;
934 nvc0
->pipe
.set_stream_output_buffers
= nvc0_set_transform_feedback_buffers
;
936 nvc0
->pipe
.redefine_user_buffer
= u_default_redefine_user_buffer
;