2 * Copyright 2010 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "pipe/p_defines.h"
24 #include "util/u_inlines.h"
25 #include "util/u_transfer.h"
27 #include "tgsi/tgsi_parse.h"
29 #include "nvc0_stateobj.h"
30 #include "nvc0_context.h"
32 #include "nvc0_3d.xml.h"
33 #include "nv50/nv50_texture.xml.h"
35 #include "nouveau/nouveau_gldefs.h"
37 static INLINE
uint32_t
38 nvc0_colormask(unsigned mask
)
42 if (mask
& PIPE_MASK_R
)
44 if (mask
& PIPE_MASK_G
)
46 if (mask
& PIPE_MASK_B
)
48 if (mask
& PIPE_MASK_A
)
54 #define NVC0_BLEND_FACTOR_CASE(a, b) \
55 case PIPE_BLENDFACTOR_##a: return NV50_3D_BLEND_FACTOR_##b
57 static INLINE
uint32_t
58 nvc0_blend_fac(unsigned factor
)
61 NVC0_BLEND_FACTOR_CASE(ONE
, ONE
);
62 NVC0_BLEND_FACTOR_CASE(SRC_COLOR
, SRC_COLOR
);
63 NVC0_BLEND_FACTOR_CASE(SRC_ALPHA
, SRC_ALPHA
);
64 NVC0_BLEND_FACTOR_CASE(DST_ALPHA
, DST_ALPHA
);
65 NVC0_BLEND_FACTOR_CASE(DST_COLOR
, DST_COLOR
);
66 NVC0_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE
, SRC_ALPHA_SATURATE
);
67 NVC0_BLEND_FACTOR_CASE(CONST_COLOR
, CONSTANT_COLOR
);
68 NVC0_BLEND_FACTOR_CASE(CONST_ALPHA
, CONSTANT_ALPHA
);
69 NVC0_BLEND_FACTOR_CASE(SRC1_COLOR
, SRC1_COLOR
);
70 NVC0_BLEND_FACTOR_CASE(SRC1_ALPHA
, SRC1_ALPHA
);
71 NVC0_BLEND_FACTOR_CASE(ZERO
, ZERO
);
72 NVC0_BLEND_FACTOR_CASE(INV_SRC_COLOR
, ONE_MINUS_SRC_COLOR
);
73 NVC0_BLEND_FACTOR_CASE(INV_SRC_ALPHA
, ONE_MINUS_SRC_ALPHA
);
74 NVC0_BLEND_FACTOR_CASE(INV_DST_ALPHA
, ONE_MINUS_DST_ALPHA
);
75 NVC0_BLEND_FACTOR_CASE(INV_DST_COLOR
, ONE_MINUS_DST_COLOR
);
76 NVC0_BLEND_FACTOR_CASE(INV_CONST_COLOR
, ONE_MINUS_CONSTANT_COLOR
);
77 NVC0_BLEND_FACTOR_CASE(INV_CONST_ALPHA
, ONE_MINUS_CONSTANT_ALPHA
);
78 NVC0_BLEND_FACTOR_CASE(INV_SRC1_COLOR
, ONE_MINUS_SRC1_COLOR
);
79 NVC0_BLEND_FACTOR_CASE(INV_SRC1_ALPHA
, ONE_MINUS_SRC1_ALPHA
);
81 return NV50_3D_BLEND_FACTOR_ZERO
;
86 nvc0_blend_state_create(struct pipe_context
*pipe
,
87 const struct pipe_blend_state
*cso
)
89 struct nvc0_blend_stateobj
*so
= CALLOC_STRUCT(nvc0_blend_stateobj
);
95 SB_IMMED_3D(so
, BLEND_INDEPENDENT
, cso
->independent_blend_enable
);
97 if (!cso
->logicop_enable
)
98 SB_IMMED_3D(so
, LOGIC_OP_ENABLE
, 0);
100 if (cso
->logicop_enable
) {
101 SB_BEGIN_3D(so
, LOGIC_OP_ENABLE
, 2);
103 SB_DATA (so
, nvgl_logicop_func(cso
->logicop_func
));
105 SB_IMMED_3D(so
, BLEND_ENABLES
, 0);
107 if (!cso
->independent_blend_enable
) {
108 SB_IMMED_3D(so
, BLEND_ENABLES
, cso
->rt
[0].blend_enable
? 0xff : 0);
110 if (cso
->rt
[0].blend_enable
) {
111 SB_BEGIN_3D(so
, BLEND_EQUATION_RGB
, 5);
112 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[0].rgb_func
));
113 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[0].rgb_src_factor
));
114 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[0].rgb_dst_factor
));
115 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[0].alpha_func
));
116 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[0].alpha_src_factor
));
117 SB_BEGIN_3D(so
, BLEND_FUNC_DST_ALPHA
, 1);
118 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[0].alpha_dst_factor
));
121 SB_IMMED_3D(so
, COLOR_MASK_COMMON
, 1);
122 SB_BEGIN_3D(so
, COLOR_MASK(0), 1);
123 SB_DATA (so
, nvc0_colormask(cso
->rt
[0].colormask
));
127 for (i
= 0; i
< 8; ++i
) {
128 if (!cso
->rt
[i
].blend_enable
)
132 SB_BEGIN_3D(so
, IBLEND_EQUATION_RGB(i
), 6);
133 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[i
].rgb_func
));
134 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[i
].rgb_src_factor
));
135 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[i
].rgb_dst_factor
));
136 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[i
].alpha_func
));
137 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[i
].alpha_src_factor
));
138 SB_DATA (so
, nvc0_blend_fac(cso
->rt
[i
].alpha_dst_factor
));
140 SB_IMMED_3D(so
, BLEND_ENABLES
, en
);
142 SB_IMMED_3D(so
, COLOR_MASK_COMMON
, 0);
143 SB_BEGIN_3D(so
, COLOR_MASK(0), 8);
144 for (i
= 0; i
< 8; ++i
)
145 SB_DATA(so
, nvc0_colormask(cso
->rt
[i
].colormask
));
149 if (cso
->alpha_to_coverage
)
150 ms
|= NVC0_3D_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE
;
151 if (cso
->alpha_to_one
)
152 ms
|= NVC0_3D_MULTISAMPLE_CTRL_ALPHA_TO_ONE
;
154 SB_BEGIN_3D(so
, MULTISAMPLE_CTRL
, 1);
157 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
162 nvc0_blend_state_bind(struct pipe_context
*pipe
, void *hwcso
)
164 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
167 nvc0
->dirty
|= NVC0_NEW_BLEND
;
171 nvc0_blend_state_delete(struct pipe_context
*pipe
, void *hwcso
)
176 /* NOTE: ignoring line_last_pixel, using FALSE (set on screen init) */
178 nvc0_rasterizer_state_create(struct pipe_context
*pipe
,
179 const struct pipe_rasterizer_state
*cso
)
181 struct nvc0_rasterizer_stateobj
*so
;
184 so
= CALLOC_STRUCT(nvc0_rasterizer_stateobj
);
189 /* Scissor enables are handled in scissor state, we will not want to
190 * always emit 16 commands, one for each scissor rectangle, here.
193 SB_BEGIN_3D(so
, SHADE_MODEL
, 1);
194 SB_DATA (so
, cso
->flatshade
? NVC0_3D_SHADE_MODEL_FLAT
:
195 NVC0_3D_SHADE_MODEL_SMOOTH
);
196 SB_IMMED_3D(so
, PROVOKING_VERTEX_LAST
, !cso
->flatshade_first
);
197 SB_IMMED_3D(so
, VERTEX_TWO_SIDE_ENABLE
, cso
->light_twoside
);
199 SB_IMMED_3D(so
, VERT_COLOR_CLAMP_EN
, cso
->clamp_vertex_color
);
200 SB_BEGIN_3D(so
, FRAG_COLOR_CLAMP_EN
, 1);
201 SB_DATA (so
, cso
->clamp_fragment_color
? 0x11111111 : 0x00000000);
203 SB_IMMED_3D(so
, MULTISAMPLE_ENABLE
, cso
->multisample
);
205 SB_IMMED_3D(so
, LINE_SMOOTH_ENABLE
, cso
->line_smooth
);
206 if (cso
->line_smooth
)
207 SB_BEGIN_3D(so
, LINE_WIDTH_SMOOTH
, 1);
209 SB_BEGIN_3D(so
, LINE_WIDTH_ALIASED
, 1);
210 SB_DATA (so
, fui(cso
->line_width
));
212 SB_IMMED_3D(so
, LINE_STIPPLE_ENABLE
, cso
->line_stipple_enable
);
213 if (cso
->line_stipple_enable
) {
214 SB_BEGIN_3D(so
, LINE_STIPPLE_PATTERN
, 1);
215 SB_DATA (so
, (cso
->line_stipple_pattern
<< 8) |
216 cso
->line_stipple_factor
);
220 SB_IMMED_3D(so
, VP_POINT_SIZE_EN
, cso
->point_size_per_vertex
);
221 if (!cso
->point_size_per_vertex
) {
222 SB_BEGIN_3D(so
, POINT_SIZE
, 1);
223 SB_DATA (so
, fui(cso
->point_size
));
226 reg
= (cso
->sprite_coord_mode
== PIPE_SPRITE_COORD_UPPER_LEFT
) ?
227 NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_UPPER_LEFT
:
228 NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_LOWER_LEFT
;
230 SB_BEGIN_3D(so
, POINT_COORD_REPLACE
, 1);
231 SB_DATA (so
, ((cso
->sprite_coord_enable
& 0xff) << 3) | reg
);
232 SB_IMMED_3D(so
, POINT_SPRITE_ENABLE
, cso
->point_quad_rasterization
);
233 SB_IMMED_3D(so
, POINT_SMOOTH_ENABLE
, cso
->point_smooth
);
235 SB_BEGIN_3D(so
, POLYGON_MODE_FRONT
, 1);
236 SB_DATA (so
, nvgl_polygon_mode(cso
->fill_front
));
237 SB_BEGIN_3D(so
, POLYGON_MODE_BACK
, 1);
238 SB_DATA (so
, nvgl_polygon_mode(cso
->fill_back
));
239 SB_IMMED_3D(so
, POLYGON_SMOOTH_ENABLE
, cso
->poly_smooth
);
241 SB_BEGIN_3D(so
, CULL_FACE_ENABLE
, 3);
242 SB_DATA (so
, cso
->cull_face
!= PIPE_FACE_NONE
);
243 SB_DATA (so
, cso
->front_ccw
? NVC0_3D_FRONT_FACE_CCW
:
244 NVC0_3D_FRONT_FACE_CW
);
245 switch (cso
->cull_face
) {
246 case PIPE_FACE_FRONT_AND_BACK
:
247 SB_DATA(so
, NVC0_3D_CULL_FACE_FRONT_AND_BACK
);
249 case PIPE_FACE_FRONT
:
250 SB_DATA(so
, NVC0_3D_CULL_FACE_FRONT
);
254 SB_DATA(so
, NVC0_3D_CULL_FACE_BACK
);
258 SB_IMMED_3D(so
, POLYGON_STIPPLE_ENABLE
, cso
->poly_stipple_enable
);
259 SB_BEGIN_3D(so
, POLYGON_OFFSET_POINT_ENABLE
, 3);
260 SB_DATA (so
, cso
->offset_point
);
261 SB_DATA (so
, cso
->offset_line
);
262 SB_DATA (so
, cso
->offset_tri
);
264 if (cso
->offset_point
|| cso
->offset_line
|| cso
->offset_tri
) {
265 SB_BEGIN_3D(so
, POLYGON_OFFSET_FACTOR
, 1);
266 SB_DATA (so
, fui(cso
->offset_scale
));
267 SB_BEGIN_3D(so
, POLYGON_OFFSET_UNITS
, 1);
268 SB_DATA (so
, fui(cso
->offset_units
* 2.0f
));
269 SB_BEGIN_3D(so
, POLYGON_OFFSET_CLAMP
, 1);
270 SB_DATA (so
, fui(cso
->offset_clamp
));
274 reg
= NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1
;
277 NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1
|
278 NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_NEAR
|
279 NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_FAR
|
280 NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK2
;
282 SB_BEGIN_3D(so
, VIEW_VOLUME_CLIP_CTRL
, 1);
285 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
290 nvc0_rasterizer_state_bind(struct pipe_context
*pipe
, void *hwcso
)
292 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
295 nvc0
->dirty
|= NVC0_NEW_RASTERIZER
;
299 nvc0_rasterizer_state_delete(struct pipe_context
*pipe
, void *hwcso
)
305 nvc0_zsa_state_create(struct pipe_context
*pipe
,
306 const struct pipe_depth_stencil_alpha_state
*cso
)
308 struct nvc0_zsa_stateobj
*so
= CALLOC_STRUCT(nvc0_zsa_stateobj
);
312 SB_IMMED_3D(so
, DEPTH_TEST_ENABLE
, cso
->depth
.enabled
);
313 if (cso
->depth
.enabled
) {
314 SB_IMMED_3D(so
, DEPTH_WRITE_ENABLE
, cso
->depth
.writemask
);
315 SB_BEGIN_3D(so
, DEPTH_TEST_FUNC
, 1);
316 SB_DATA (so
, nvgl_comparison_op(cso
->depth
.func
));
319 if (cso
->stencil
[0].enabled
) {
320 SB_BEGIN_3D(so
, STENCIL_ENABLE
, 5);
322 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].fail_op
));
323 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].zfail_op
));
324 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].zpass_op
));
325 SB_DATA (so
, nvgl_comparison_op(cso
->stencil
[0].func
));
326 SB_BEGIN_3D(so
, STENCIL_FRONT_FUNC_MASK
, 2);
327 SB_DATA (so
, cso
->stencil
[0].valuemask
);
328 SB_DATA (so
, cso
->stencil
[0].writemask
);
330 SB_IMMED_3D(so
, STENCIL_ENABLE
, 0);
333 if (cso
->stencil
[1].enabled
) {
334 assert(cso
->stencil
[0].enabled
);
335 SB_BEGIN_3D(so
, STENCIL_TWO_SIDE_ENABLE
, 5);
337 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].fail_op
));
338 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].zfail_op
));
339 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].zpass_op
));
340 SB_DATA (so
, nvgl_comparison_op(cso
->stencil
[1].func
));
341 SB_BEGIN_3D(so
, STENCIL_BACK_MASK
, 2);
342 SB_DATA (so
, cso
->stencil
[1].writemask
);
343 SB_DATA (so
, cso
->stencil
[1].valuemask
);
345 if (cso
->stencil
[0].enabled
) {
346 SB_IMMED_3D(so
, STENCIL_TWO_SIDE_ENABLE
, 0);
349 SB_IMMED_3D(so
, ALPHA_TEST_ENABLE
, cso
->alpha
.enabled
);
350 if (cso
->alpha
.enabled
) {
351 SB_BEGIN_3D(so
, ALPHA_TEST_REF
, 2);
352 SB_DATA (so
, fui(cso
->alpha
.ref_value
));
353 SB_DATA (so
, nvgl_comparison_op(cso
->alpha
.func
));
356 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
361 nvc0_zsa_state_bind(struct pipe_context
*pipe
, void *hwcso
)
363 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
366 nvc0
->dirty
|= NVC0_NEW_ZSA
;
370 nvc0_zsa_state_delete(struct pipe_context
*pipe
, void *hwcso
)
375 /* ====================== SAMPLERS AND TEXTURES ================================
378 #define NV50_TSC_WRAP_CASE(n) \
379 case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
381 static INLINE
unsigned
382 nv50_tsc_wrap_mode(unsigned wrap
)
385 NV50_TSC_WRAP_CASE(REPEAT
);
386 NV50_TSC_WRAP_CASE(MIRROR_REPEAT
);
387 NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE
);
388 NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER
);
389 NV50_TSC_WRAP_CASE(CLAMP
);
390 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE
);
391 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER
);
392 NV50_TSC_WRAP_CASE(MIRROR_CLAMP
);
394 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap
);
395 return NV50_TSC_WRAP_REPEAT
;
400 nvc0_sampler_state_delete(struct pipe_context
*pipe
, void *hwcso
)
404 for (s
= 0; s
< 5; ++s
)
405 for (i
= 0; i
< nvc0_context(pipe
)->num_samplers
[s
]; ++i
)
406 if (nvc0_context(pipe
)->samplers
[s
][i
] == hwcso
)
407 nvc0_context(pipe
)->samplers
[s
][i
] = NULL
;
409 nvc0_screen_tsc_free(nvc0_context(pipe
)->screen
, nv50_tsc_entry(hwcso
));
415 nvc0_stage_sampler_states_bind(struct nvc0_context
*nvc0
, int s
,
416 unsigned nr
, void **hwcso
)
420 for (i
= 0; i
< nr
; ++i
) {
421 struct nv50_tsc_entry
*old
= nvc0
->samplers
[s
][i
];
425 nvc0
->samplers_dirty
[s
] |= 1 << i
;
427 nvc0
->samplers
[s
][i
] = nv50_tsc_entry(hwcso
[i
]);
429 nvc0_screen_tsc_unlock(nvc0
->screen
, old
);
431 for (; i
< nvc0
->num_samplers
[s
]; ++i
) {
432 if (nvc0
->samplers
[s
][i
]) {
433 nvc0_screen_tsc_unlock(nvc0
->screen
, nvc0
->samplers
[s
][i
]);
434 nvc0
->samplers
[s
][i
] = NULL
;
438 nvc0
->num_samplers
[s
] = nr
;
440 nvc0
->dirty
|= NVC0_NEW_SAMPLERS
;
444 nvc0_vp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
446 nvc0_stage_sampler_states_bind(nvc0_context(pipe
), 0, nr
, s
);
450 nvc0_fp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
452 nvc0_stage_sampler_states_bind(nvc0_context(pipe
), 4, nr
, s
);
456 nvc0_gp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
458 nvc0_stage_sampler_states_bind(nvc0_context(pipe
), 3, nr
, s
);
461 /* NOTE: only called when not referenced anywhere, won't be bound */
463 nvc0_sampler_view_destroy(struct pipe_context
*pipe
,
464 struct pipe_sampler_view
*view
)
466 pipe_resource_reference(&view
->texture
, NULL
);
468 nvc0_screen_tic_free(nvc0_context(pipe
)->screen
, nv50_tic_entry(view
));
470 FREE(nv50_tic_entry(view
));
474 nvc0_stage_set_sampler_views(struct nvc0_context
*nvc0
, int s
,
476 struct pipe_sampler_view
**views
)
480 for (i
= 0; i
< nr
; ++i
) {
481 struct nv50_tic_entry
*old
= nv50_tic_entry(nvc0
->textures
[s
][i
]);
483 if (views
[i
] == nvc0
->textures
[s
][i
])
485 nvc0
->textures_dirty
[s
] |= 1 << i
;
488 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_TEX(s
, i
));
489 nvc0_screen_tic_unlock(nvc0
->screen
, old
);
492 pipe_sampler_view_reference(&nvc0
->textures
[s
][i
], views
[i
]);
495 for (i
= nr
; i
< nvc0
->num_textures
[s
]; ++i
) {
496 struct nv50_tic_entry
*old
= nv50_tic_entry(nvc0
->textures
[s
][i
]);
498 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_TEX(s
, i
));
499 nvc0_screen_tic_unlock(nvc0
->screen
, old
);
500 pipe_sampler_view_reference(&nvc0
->textures
[s
][i
], NULL
);
504 nvc0
->num_textures
[s
] = nr
;
506 nvc0
->dirty
|= NVC0_NEW_TEXTURES
;
510 nvc0_vp_set_sampler_views(struct pipe_context
*pipe
,
512 struct pipe_sampler_view
**views
)
514 nvc0_stage_set_sampler_views(nvc0_context(pipe
), 0, nr
, views
);
518 nvc0_fp_set_sampler_views(struct pipe_context
*pipe
,
520 struct pipe_sampler_view
**views
)
522 nvc0_stage_set_sampler_views(nvc0_context(pipe
), 4, nr
, views
);
526 nvc0_gp_set_sampler_views(struct pipe_context
*pipe
,
528 struct pipe_sampler_view
**views
)
530 nvc0_stage_set_sampler_views(nvc0_context(pipe
), 3, nr
, views
);
533 /* ============================= SHADERS =======================================
537 nvc0_sp_state_create(struct pipe_context
*pipe
,
538 const struct pipe_shader_state
*cso
, unsigned type
)
540 struct nvc0_program
*prog
;
542 prog
= CALLOC_STRUCT(nvc0_program
);
549 prog
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
551 if (cso
->stream_output
.num_outputs
)
552 prog
->pipe
.stream_output
= cso
->stream_output
;
558 nvc0_sp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
560 struct nvc0_program
*prog
= (struct nvc0_program
*)hwcso
;
562 nvc0_program_destroy(nvc0_context(pipe
), prog
);
564 FREE((void *)prog
->pipe
.tokens
);
569 nvc0_vp_state_create(struct pipe_context
*pipe
,
570 const struct pipe_shader_state
*cso
)
572 return nvc0_sp_state_create(pipe
, cso
, PIPE_SHADER_VERTEX
);
576 nvc0_vp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
578 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
580 nvc0
->vertprog
= hwcso
;
581 nvc0
->dirty
|= NVC0_NEW_VERTPROG
;
585 nvc0_fp_state_create(struct pipe_context
*pipe
,
586 const struct pipe_shader_state
*cso
)
588 return nvc0_sp_state_create(pipe
, cso
, PIPE_SHADER_FRAGMENT
);
592 nvc0_fp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
594 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
596 nvc0
->fragprog
= hwcso
;
597 nvc0
->dirty
|= NVC0_NEW_FRAGPROG
;
601 nvc0_gp_state_create(struct pipe_context
*pipe
,
602 const struct pipe_shader_state
*cso
)
604 return nvc0_sp_state_create(pipe
, cso
, PIPE_SHADER_GEOMETRY
);
608 nvc0_gp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
610 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
612 nvc0
->gmtyprog
= hwcso
;
613 nvc0
->dirty
|= NVC0_NEW_GMTYPROG
;
617 nvc0_set_constant_buffer(struct pipe_context
*pipe
, uint shader
, uint index
,
618 struct pipe_resource
*res
)
620 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
623 case PIPE_SHADER_VERTEX
: shader
= 0; break;
625 case PIPE_SHADER_TESSELLATION_CONTROL: shader = 1; break;
626 case PIPE_SHADER_TESSELLATION_EVALUATION: shader = 2; break;
628 case PIPE_SHADER_GEOMETRY
: shader
= 3; break;
629 case PIPE_SHADER_FRAGMENT
: shader
= 4; break;
635 if (nvc0
->constbuf
[shader
][index
])
636 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_CB(shader
, index
));
638 pipe_resource_reference(&nvc0
->constbuf
[shader
][index
], res
);
640 nvc0
->constbuf_dirty
[shader
] |= 1 << index
;
642 nvc0
->dirty
|= NVC0_NEW_CONSTBUF
;
645 /* =============================================================================
649 nvc0_set_blend_color(struct pipe_context
*pipe
,
650 const struct pipe_blend_color
*bcol
)
652 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
654 nvc0
->blend_colour
= *bcol
;
655 nvc0
->dirty
|= NVC0_NEW_BLEND_COLOUR
;
659 nvc0_set_stencil_ref(struct pipe_context
*pipe
,
660 const struct pipe_stencil_ref
*sr
)
662 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
664 nvc0
->stencil_ref
= *sr
;
665 nvc0
->dirty
|= NVC0_NEW_STENCIL_REF
;
669 nvc0_set_clip_state(struct pipe_context
*pipe
,
670 const struct pipe_clip_state
*clip
)
672 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
674 memcpy(nvc0
->clip
.ucp
, clip
->ucp
, sizeof(clip
->ucp
));
676 nvc0
->dirty
|= NVC0_NEW_CLIP
;
680 nvc0_set_sample_mask(struct pipe_context
*pipe
, unsigned sample_mask
)
682 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
684 nvc0
->sample_mask
= sample_mask
;
685 nvc0
->dirty
|= NVC0_NEW_SAMPLE_MASK
;
690 nvc0_set_framebuffer_state(struct pipe_context
*pipe
,
691 const struct pipe_framebuffer_state
*fb
)
693 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
696 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_FB
);
698 for (i
= 0; i
< fb
->nr_cbufs
; ++i
)
699 pipe_surface_reference(&nvc0
->framebuffer
.cbufs
[i
], fb
->cbufs
[i
]);
700 for (; i
< nvc0
->framebuffer
.nr_cbufs
; ++i
)
701 pipe_surface_reference(&nvc0
->framebuffer
.cbufs
[i
], NULL
);
703 nvc0
->framebuffer
.nr_cbufs
= fb
->nr_cbufs
;
705 nvc0
->framebuffer
.width
= fb
->width
;
706 nvc0
->framebuffer
.height
= fb
->height
;
708 pipe_surface_reference(&nvc0
->framebuffer
.zsbuf
, fb
->zsbuf
);
710 nvc0
->dirty
|= NVC0_NEW_FRAMEBUFFER
;
714 nvc0_set_polygon_stipple(struct pipe_context
*pipe
,
715 const struct pipe_poly_stipple
*stipple
)
717 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
719 nvc0
->stipple
= *stipple
;
720 nvc0
->dirty
|= NVC0_NEW_STIPPLE
;
724 nvc0_set_scissor_state(struct pipe_context
*pipe
,
725 const struct pipe_scissor_state
*scissor
)
727 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
729 nvc0
->scissor
= *scissor
;
730 nvc0
->dirty
|= NVC0_NEW_SCISSOR
;
734 nvc0_set_viewport_state(struct pipe_context
*pipe
,
735 const struct pipe_viewport_state
*vpt
)
737 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
739 nvc0
->viewport
= *vpt
;
740 nvc0
->dirty
|= NVC0_NEW_VIEWPORT
;
744 nvc0_set_vertex_buffers(struct pipe_context
*pipe
,
746 const struct pipe_vertex_buffer
*vb
)
748 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
751 for (i
= 0; i
< count
; ++i
)
752 pipe_resource_reference(&nvc0
->vtxbuf
[i
].buffer
, vb
[i
].buffer
);
753 for (; i
< nvc0
->num_vtxbufs
; ++i
)
754 pipe_resource_reference(&nvc0
->vtxbuf
[i
].buffer
, NULL
);
756 memcpy(nvc0
->vtxbuf
, vb
, sizeof(*vb
) * count
);
757 nvc0
->num_vtxbufs
= count
;
759 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_VTX
);
761 nvc0
->dirty
|= NVC0_NEW_ARRAYS
;
765 nvc0_set_index_buffer(struct pipe_context
*pipe
,
766 const struct pipe_index_buffer
*ib
)
768 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
770 if (nvc0
->idxbuf
.buffer
)
771 nouveau_bufctx_reset(nvc0
->bufctx_3d
, NVC0_BIND_IDX
);
773 if (ib
&& ib
->buffer
) {
774 nvc0
->dirty
|= NVC0_NEW_IDXBUF
;
775 pipe_resource_reference(&nvc0
->idxbuf
.buffer
, ib
->buffer
);
776 nvc0
->idxbuf
.offset
= ib
->offset
;
777 nvc0
->idxbuf
.index_size
= ib
->index_size
;
779 nvc0
->dirty
&= ~NVC0_NEW_IDXBUF
;
780 pipe_resource_reference(&nvc0
->idxbuf
.buffer
, NULL
);
785 nvc0_vertex_state_bind(struct pipe_context
*pipe
, void *hwcso
)
787 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
789 nvc0
->vertex
= hwcso
;
790 nvc0
->dirty
|= NVC0_NEW_VERTEX
;
793 static struct pipe_stream_output_target
*
794 nvc0_so_target_create(struct pipe_context
*pipe
,
795 struct pipe_resource
*res
,
796 unsigned offset
, unsigned size
)
798 struct nvc0_so_target
*targ
= MALLOC_STRUCT(nvc0_so_target
);
802 targ
->pq
= pipe
->create_query(pipe
, NVC0_QUERY_TFB_BUFFER_OFFSET
);
809 targ
->pipe
.buffer_size
= size
;
810 targ
->pipe
.buffer_offset
= offset
;
811 targ
->pipe
.context
= pipe
;
812 targ
->pipe
.buffer
= NULL
;
813 pipe_resource_reference(&targ
->pipe
.buffer
, res
);
814 pipe_reference_init(&targ
->pipe
.reference
, 1);
820 nvc0_so_target_destroy(struct pipe_context
*pipe
,
821 struct pipe_stream_output_target
*ptarg
)
823 struct nvc0_so_target
*targ
= nvc0_so_target(ptarg
);
824 pipe
->destroy_query(pipe
, targ
->pq
);
829 nvc0_set_transform_feedback_targets(struct pipe_context
*pipe
,
830 unsigned num_targets
,
831 struct pipe_stream_output_target
**targets
,
832 unsigned append_mask
)
834 struct nvc0_context
*nvc0
= nvc0_context(pipe
);
836 boolean serialize
= TRUE
;
838 assert(num_targets
<= 4);
840 for (i
= 0; i
< num_targets
; ++i
) {
841 if (nvc0
->tfbbuf
[i
] == targets
[i
] && (append_mask
& (1 << i
)))
843 nvc0
->tfbbuf_dirty
|= 1 << i
;
845 if (nvc0
->tfbbuf
[i
] && nvc0
->tfbbuf
[i
] != targets
[i
])
846 nvc0_so_target_save_offset(pipe
, nvc0
->tfbbuf
[i
], i
, &serialize
);
848 if (targets
[i
] && !(append_mask
& (1 << i
)))
849 nvc0_so_target(targets
[i
])->clean
= TRUE
;
851 pipe_so_target_reference(&nvc0
->tfbbuf
[i
], targets
[i
]);
853 for (; i
< nvc0
->num_tfbbufs
; ++i
) {
854 nvc0
->tfbbuf_dirty
|= 1 << i
;
855 nvc0_so_target_save_offset(pipe
, nvc0
->tfbbuf
[i
], i
, &serialize
);
856 pipe_so_target_reference(&nvc0
->tfbbuf
[i
], NULL
);
858 nvc0
->num_tfbbufs
= num_targets
;
860 if (nvc0
->tfbbuf_dirty
)
861 nvc0
->dirty
|= NVC0_NEW_TFB_TARGETS
;
865 nvc0_init_state_functions(struct nvc0_context
*nvc0
)
867 struct pipe_context
*pipe
= &nvc0
->base
.pipe
;
869 pipe
->create_blend_state
= nvc0_blend_state_create
;
870 pipe
->bind_blend_state
= nvc0_blend_state_bind
;
871 pipe
->delete_blend_state
= nvc0_blend_state_delete
;
873 pipe
->create_rasterizer_state
= nvc0_rasterizer_state_create
;
874 pipe
->bind_rasterizer_state
= nvc0_rasterizer_state_bind
;
875 pipe
->delete_rasterizer_state
= nvc0_rasterizer_state_delete
;
877 pipe
->create_depth_stencil_alpha_state
= nvc0_zsa_state_create
;
878 pipe
->bind_depth_stencil_alpha_state
= nvc0_zsa_state_bind
;
879 pipe
->delete_depth_stencil_alpha_state
= nvc0_zsa_state_delete
;
881 pipe
->create_sampler_state
= nv50_sampler_state_create
;
882 pipe
->delete_sampler_state
= nvc0_sampler_state_delete
;
883 pipe
->bind_vertex_sampler_states
= nvc0_vp_sampler_states_bind
;
884 pipe
->bind_fragment_sampler_states
= nvc0_fp_sampler_states_bind
;
885 pipe
->bind_geometry_sampler_states
= nvc0_gp_sampler_states_bind
;
887 pipe
->create_sampler_view
= nvc0_create_sampler_view
;
888 pipe
->sampler_view_destroy
= nvc0_sampler_view_destroy
;
889 pipe
->set_vertex_sampler_views
= nvc0_vp_set_sampler_views
;
890 pipe
->set_fragment_sampler_views
= nvc0_fp_set_sampler_views
;
891 pipe
->set_geometry_sampler_views
= nvc0_gp_set_sampler_views
;
893 pipe
->create_vs_state
= nvc0_vp_state_create
;
894 pipe
->create_fs_state
= nvc0_fp_state_create
;
895 pipe
->create_gs_state
= nvc0_gp_state_create
;
896 pipe
->bind_vs_state
= nvc0_vp_state_bind
;
897 pipe
->bind_fs_state
= nvc0_fp_state_bind
;
898 pipe
->bind_gs_state
= nvc0_gp_state_bind
;
899 pipe
->delete_vs_state
= nvc0_sp_state_delete
;
900 pipe
->delete_fs_state
= nvc0_sp_state_delete
;
901 pipe
->delete_gs_state
= nvc0_sp_state_delete
;
903 pipe
->set_blend_color
= nvc0_set_blend_color
;
904 pipe
->set_stencil_ref
= nvc0_set_stencil_ref
;
905 pipe
->set_clip_state
= nvc0_set_clip_state
;
906 pipe
->set_sample_mask
= nvc0_set_sample_mask
;
907 pipe
->set_constant_buffer
= nvc0_set_constant_buffer
;
908 pipe
->set_framebuffer_state
= nvc0_set_framebuffer_state
;
909 pipe
->set_polygon_stipple
= nvc0_set_polygon_stipple
;
910 pipe
->set_scissor_state
= nvc0_set_scissor_state
;
911 pipe
->set_viewport_state
= nvc0_set_viewport_state
;
913 pipe
->create_vertex_elements_state
= nvc0_vertex_state_create
;
914 pipe
->delete_vertex_elements_state
= nvc0_vertex_state_delete
;
915 pipe
->bind_vertex_elements_state
= nvc0_vertex_state_bind
;
917 pipe
->set_vertex_buffers
= nvc0_set_vertex_buffers
;
918 pipe
->set_index_buffer
= nvc0_set_index_buffer
;
920 pipe
->create_stream_output_target
= nvc0_so_target_create
;
921 pipe
->stream_output_target_destroy
= nvc0_so_target_destroy
;
922 pipe
->set_stream_output_targets
= nvc0_set_transform_feedback_targets
;
924 pipe
->redefine_user_buffer
= u_default_redefine_user_buffer
;