Merge remote branch 'origin/master' into pipe-video
[mesa.git] / src / gallium / drivers / nvc0 / nvc0_state.c
1 /*
2 * Copyright 2010 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include "pipe/p_defines.h"
24 #include "util/u_inlines.h"
25
26 #include "tgsi/tgsi_parse.h"
27
28 #include "nvc0_stateobj.h"
29 #include "nvc0_context.h"
30
31 #include "nvc0_3d.xml.h"
32 #include "nv50_texture.xml.h"
33
34 #include "nouveau/nouveau_gldefs.h"
35
36 static INLINE uint32_t
37 nvc0_colormask(unsigned mask)
38 {
39 uint32_t ret = 0;
40
41 if (mask & PIPE_MASK_R)
42 ret |= 0x0001;
43 if (mask & PIPE_MASK_G)
44 ret |= 0x0010;
45 if (mask & PIPE_MASK_B)
46 ret |= 0x0100;
47 if (mask & PIPE_MASK_A)
48 ret |= 0x1000;
49
50 return ret;
51 }
52
53 static INLINE uint32_t
54 nvc0_blend_fac(unsigned factor)
55 {
56 static const uint16_t bf[] = {
57 NV50_3D_BLEND_FACTOR_ZERO, /* 0x00 */
58 NV50_3D_BLEND_FACTOR_ONE,
59 NV50_3D_BLEND_FACTOR_SRC_COLOR,
60 NV50_3D_BLEND_FACTOR_SRC_ALPHA,
61 NV50_3D_BLEND_FACTOR_DST_ALPHA,
62 NV50_3D_BLEND_FACTOR_DST_COLOR,
63 NV50_3D_BLEND_FACTOR_SRC_ALPHA_SATURATE,
64 NV50_3D_BLEND_FACTOR_CONSTANT_COLOR,
65 NV50_3D_BLEND_FACTOR_CONSTANT_ALPHA,
66 NV50_3D_BLEND_FACTOR_SRC1_COLOR,
67 NV50_3D_BLEND_FACTOR_SRC1_ALPHA,
68 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0b */
69 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0c */
70 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0d */
71 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0e */
72 NV50_3D_BLEND_FACTOR_ZERO, /* 0x0f */
73 NV50_3D_BLEND_FACTOR_ZERO, /* 0x10 */
74 NV50_3D_BLEND_FACTOR_ZERO, /* 0x11 */
75 NV50_3D_BLEND_FACTOR_ONE_MINUS_SRC_COLOR,
76 NV50_3D_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
77 NV50_3D_BLEND_FACTOR_ONE_MINUS_DST_ALPHA,
78 NV50_3D_BLEND_FACTOR_ONE_MINUS_DST_COLOR,
79 NV50_3D_BLEND_FACTOR_ONE_MINUS_CONSTANT_COLOR,
80 NV50_3D_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA,
81 NV50_3D_BLEND_FACTOR_ONE_MINUS_SRC1_COLOR,
82 NV50_3D_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA
83 };
84
85 assert(factor < (sizeof(bf) / sizeof(bf[0])));
86 return bf[factor];
87 }
88
89 static void *
90 nvc0_blend_state_create(struct pipe_context *pipe,
91 const struct pipe_blend_state *cso)
92 {
93 struct nvc0_blend_stateobj *so = CALLOC_STRUCT(nvc0_blend_stateobj);
94 int i;
95
96 so->pipe = *cso;
97
98 SB_IMMED_3D(so, BLEND_INDEPENDENT, cso->independent_blend_enable);
99
100 if (!cso->independent_blend_enable) {
101 SB_BEGIN_3D(so, BLEND_ENABLES, 1);
102 SB_DATA (so, cso->rt[0].blend_enable ? 0xff : 0);
103
104 if (cso->rt[0].blend_enable) {
105 SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5);
106 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].rgb_func));
107 SB_DATA (so, nvc0_blend_fac(cso->rt[0].rgb_src_factor));
108 SB_DATA (so, nvc0_blend_fac(cso->rt[0].rgb_dst_factor));
109 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].alpha_func));
110 SB_DATA (so, nvc0_blend_fac(cso->rt[0].alpha_src_factor));
111 SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1);
112 SB_DATA (so, nvc0_blend_fac(cso->rt[0].alpha_dst_factor));
113 }
114
115 SB_BEGIN_3D(so, COLOR_MASK_BROADCAST, 1);
116 SB_DATA (so, nvc0_colormask(cso->rt[0].colormask));
117 } else {
118 uint8_t en = 0;
119
120 for (i = 0; i < 8; ++i) {
121 if (!cso->rt[i].blend_enable)
122 continue;
123 en |= 1 << i;
124
125 SB_BEGIN_3D(so, IBLEND_EQUATION_RGB(i), 6);
126 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].rgb_func));
127 SB_DATA (so, nvc0_blend_fac(cso->rt[i].rgb_src_factor));
128 SB_DATA (so, nvc0_blend_fac(cso->rt[i].rgb_dst_factor));
129 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].alpha_func));
130 SB_DATA (so, nvc0_blend_fac(cso->rt[i].alpha_src_factor));
131 SB_DATA (so, nvc0_blend_fac(cso->rt[i].alpha_dst_factor));
132 }
133 SB_BEGIN_3D(so, BLEND_ENABLES, 1);
134 SB_DATA (so, en);
135
136 SB_BEGIN_3D(so, COLOR_MASK(0), 8);
137 for (i = 0; i < 8; ++i)
138 SB_DATA(so, nvc0_colormask(cso->rt[i].colormask));
139 }
140
141 if (cso->logicop_enable) {
142 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2);
143 SB_DATA (so, 1);
144 SB_DATA (so, nvgl_logicop_func(cso->logicop_func));
145 } else {
146 SB_IMMED_3D(so, LOGIC_OP_ENABLE, 0);
147 }
148
149 assert(so->size < (sizeof(so->state) / sizeof(so->state[0])));
150 return so;
151 }
152
153 static void
154 nvc0_blend_state_bind(struct pipe_context *pipe, void *hwcso)
155 {
156 struct nvc0_context *nvc0 = nvc0_context(pipe);
157
158 nvc0->blend = hwcso;
159 nvc0->dirty |= NVC0_NEW_BLEND;
160 }
161
162 static void
163 nvc0_blend_state_delete(struct pipe_context *pipe, void *hwcso)
164 {
165 FREE(hwcso);
166 }
167
168 static void *
169 nvc0_rasterizer_state_create(struct pipe_context *pipe,
170 const struct pipe_rasterizer_state *cso)
171 {
172 struct nvc0_rasterizer_stateobj *so;
173
174 so = CALLOC_STRUCT(nvc0_rasterizer_stateobj);
175 if (!so)
176 return NULL;
177 so->pipe = *cso;
178
179 #ifndef NVC0_SCISSORS_CLIPPING
180 SB_IMMED_3D(so, SCISSOR_ENABLE(0), cso->scissor);
181 #endif
182
183 SB_BEGIN_3D(so, SHADE_MODEL, 1);
184 SB_DATA (so, cso->flatshade ? NVC0_3D_SHADE_MODEL_FLAT :
185 NVC0_3D_SHADE_MODEL_SMOOTH);
186 SB_IMMED_3D(so, PROVOKING_VERTEX_LAST, !cso->flatshade_first);
187 SB_IMMED_3D(so, VERTEX_TWO_SIDE_ENABLE, cso->light_twoside);
188
189 SB_BEGIN_3D(so, LINE_WIDTH, 1);
190 SB_DATA (so, fui(cso->line_width));
191 SB_IMMED_3D(so, LINE_SMOOTH_ENABLE, cso->line_smooth);
192
193 SB_BEGIN_3D(so, LINE_STIPPLE_ENABLE, 1);
194 if (cso->line_stipple_enable) {
195 SB_DATA (so, 1);
196 SB_BEGIN_3D(so, LINE_STIPPLE_PATTERN, 1);
197 SB_DATA (so, (cso->line_stipple_pattern << 8) |
198 cso->line_stipple_factor);
199
200 } else {
201 SB_DATA (so, 0);
202 }
203
204 SB_IMMED_3D(so, VP_POINT_SIZE_EN, cso->point_size_per_vertex);
205 if (!cso->point_size_per_vertex) {
206 SB_BEGIN_3D(so, POINT_SIZE, 1);
207 SB_DATA (so, fui(cso->point_size));
208 }
209 SB_IMMED_3D(so, POINT_SPRITE_ENABLE, cso->point_quad_rasterization);
210 SB_IMMED_3D(so, POINT_SMOOTH_ENABLE, cso->point_smooth);
211
212 SB_BEGIN_3D(so, POLYGON_MODE_FRONT, 1);
213 SB_DATA (so, nvgl_polygon_mode(cso->fill_front));
214 SB_BEGIN_3D(so, POLYGON_MODE_BACK, 1);
215 SB_DATA (so, nvgl_polygon_mode(cso->fill_back));
216 SB_IMMED_3D(so, POLYGON_SMOOTH_ENABLE, cso->poly_smooth);
217
218 SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3);
219 SB_DATA (so, cso->cull_face != PIPE_FACE_NONE);
220 SB_DATA (so, cso->front_ccw ? NVC0_3D_FRONT_FACE_CCW :
221 NVC0_3D_FRONT_FACE_CW);
222 switch (cso->cull_face) {
223 case PIPE_FACE_FRONT_AND_BACK:
224 SB_DATA(so, NVC0_3D_CULL_FACE_FRONT_AND_BACK);
225 break;
226 case PIPE_FACE_FRONT:
227 SB_DATA(so, NVC0_3D_CULL_FACE_FRONT);
228 break;
229 case PIPE_FACE_BACK:
230 default:
231 SB_DATA(so, NVC0_3D_CULL_FACE_BACK);
232 break;
233 }
234
235 SB_IMMED_3D(so, POLYGON_STIPPLE_ENABLE, cso->poly_stipple_enable);
236 SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3);
237 SB_DATA (so, cso->offset_point);
238 SB_DATA (so, cso->offset_line);
239 SB_DATA (so, cso->offset_tri);
240
241 if (cso->offset_point || cso->offset_line || cso->offset_tri) {
242 SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1);
243 SB_DATA (so, fui(cso->offset_scale));
244 SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1);
245 SB_DATA (so, fui(cso->offset_units)); /* XXX: multiply by 2 ? */
246 }
247
248 assert(so->size < (sizeof(so->state) / sizeof(so->state[0])));
249 return (void *)so;
250 }
251
252 static void
253 nvc0_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
254 {
255 struct nvc0_context *nvc0 = nvc0_context(pipe);
256
257 nvc0->rast = hwcso;
258 nvc0->dirty |= NVC0_NEW_RASTERIZER;
259 }
260
261 static void
262 nvc0_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
263 {
264 FREE(hwcso);
265 }
266
267 static void *
268 nvc0_zsa_state_create(struct pipe_context *pipe,
269 const struct pipe_depth_stencil_alpha_state *cso)
270 {
271 struct nvc0_zsa_stateobj *so = CALLOC_STRUCT(nvc0_zsa_stateobj);
272
273 so->pipe = *cso;
274
275 SB_IMMED_3D(so, DEPTH_WRITE_ENABLE, cso->depth.writemask);
276 SB_BEGIN_3D(so, DEPTH_TEST_ENABLE, 1);
277 if (cso->depth.enabled) {
278 SB_DATA (so, 1);
279 SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
280 SB_DATA (so, nvgl_comparison_op(cso->depth.func));
281 } else {
282 SB_DATA (so, 0);
283 }
284
285 if (cso->stencil[0].enabled) {
286 SB_BEGIN_3D(so, STENCIL_FRONT_ENABLE, 5);
287 SB_DATA (so, 1);
288 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].fail_op));
289 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
290 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
291 SB_DATA (so, nvgl_comparison_op(cso->stencil[0].func));
292 SB_BEGIN_3D(so, STENCIL_FRONT_MASK, 2);
293 SB_DATA (so, cso->stencil[0].writemask);
294 SB_DATA (so, cso->stencil[0].valuemask);
295 } else {
296 SB_IMMED_3D(so, STENCIL_FRONT_ENABLE, 0);
297 }
298
299 if (cso->stencil[1].enabled) {
300 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5);
301 SB_DATA (so, 1);
302 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].fail_op));
303 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
304 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
305 SB_DATA (so, nvgl_comparison_op(cso->stencil[1].func));
306 SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2);
307 SB_DATA (so, cso->stencil[1].writemask);
308 SB_DATA (so, cso->stencil[1].valuemask);
309 } else {
310 SB_IMMED_3D(so, STENCIL_TWO_SIDE_ENABLE, 0);
311 }
312
313 SB_BEGIN_3D(so, ALPHA_TEST_ENABLE, 1);
314 if (cso->alpha.enabled) {
315 SB_DATA (so, 1);
316 SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
317 SB_DATA (so, fui(cso->alpha.ref_value));
318 SB_DATA (so, nvgl_comparison_op(cso->alpha.func));
319 } else {
320 SB_DATA (so, 0);
321 }
322
323 assert(so->size < (sizeof(so->state) / sizeof(so->state[0])));
324 return (void *)so;
325 }
326
327 static void
328 nvc0_zsa_state_bind(struct pipe_context *pipe, void *hwcso)
329 {
330 struct nvc0_context *nvc0 = nvc0_context(pipe);
331
332 nvc0->zsa = hwcso;
333 nvc0->dirty |= NVC0_NEW_ZSA;
334 }
335
336 static void
337 nvc0_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
338 {
339 FREE(hwcso);
340 }
341
342 /* ====================== SAMPLERS AND TEXTURES ================================
343 */
344
345 #define NV50_TSC_WRAP_CASE(n) \
346 case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
347
348 static INLINE unsigned
349 nv50_tsc_wrap_mode(unsigned wrap)
350 {
351 switch (wrap) {
352 NV50_TSC_WRAP_CASE(REPEAT);
353 NV50_TSC_WRAP_CASE(MIRROR_REPEAT);
354 NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE);
355 NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER);
356 NV50_TSC_WRAP_CASE(CLAMP);
357 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE);
358 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER);
359 NV50_TSC_WRAP_CASE(MIRROR_CLAMP);
360 default:
361 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
362 return NV50_TSC_WRAP_REPEAT;
363 }
364 }
365
366 static void *
367 nvc0_sampler_state_create(struct pipe_context *pipe,
368 const struct pipe_sampler_state *cso)
369 {
370 struct nvc0_tsc_entry *so = CALLOC_STRUCT(nvc0_tsc_entry);
371 float f[2];
372
373 so->id = -1;
374
375 so->tsc[0] = (0x00026000 |
376 (nv50_tsc_wrap_mode(cso->wrap_s) << 0) |
377 (nv50_tsc_wrap_mode(cso->wrap_t) << 3) |
378 (nv50_tsc_wrap_mode(cso->wrap_r) << 6));
379
380 switch (cso->mag_img_filter) {
381 case PIPE_TEX_FILTER_LINEAR:
382 so->tsc[1] |= NV50_TSC_1_MAGF_LINEAR;
383 break;
384 case PIPE_TEX_FILTER_NEAREST:
385 default:
386 so->tsc[1] |= NV50_TSC_1_MAGF_NEAREST;
387 break;
388 }
389
390 switch (cso->min_img_filter) {
391 case PIPE_TEX_FILTER_LINEAR:
392 so->tsc[1] |= NV50_TSC_1_MINF_LINEAR;
393 break;
394 case PIPE_TEX_FILTER_NEAREST:
395 default:
396 so->tsc[1] |= NV50_TSC_1_MINF_NEAREST;
397 break;
398 }
399
400 switch (cso->min_mip_filter) {
401 case PIPE_TEX_MIPFILTER_LINEAR:
402 so->tsc[1] |= NV50_TSC_1_MIPF_LINEAR;
403 break;
404 case PIPE_TEX_MIPFILTER_NEAREST:
405 so->tsc[1] |= NV50_TSC_1_MIPF_NEAREST;
406 break;
407 case PIPE_TEX_MIPFILTER_NONE:
408 default:
409 so->tsc[1] |= NV50_TSC_1_MIPF_NONE;
410 break;
411 }
412
413 if (cso->max_anisotropy >= 16)
414 so->tsc[0] |= (7 << 20);
415 else
416 if (cso->max_anisotropy >= 12)
417 so->tsc[0] |= (6 << 20);
418 else {
419 so->tsc[0] |= (cso->max_anisotropy >> 1) << 20;
420
421 if (cso->max_anisotropy >= 4)
422 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_35;
423 else
424 if (cso->max_anisotropy >= 2)
425 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_15;
426 }
427
428 if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
429 /* NOTE: must be deactivated for non-shadow textures */
430 so->tsc[0] |= (1 << 9);
431 so->tsc[0] |= (nvgl_comparison_op(cso->compare_func) & 0x7) << 10;
432 }
433
434 f[0] = CLAMP(cso->lod_bias, -16.0f, 15.0f);
435 so->tsc[1] |= ((int)(f[0] * 256.0f) & 0x1fff) << 12;
436
437 f[0] = CLAMP(cso->min_lod, 0.0f, 15.0f);
438 f[1] = CLAMP(cso->max_lod, 0.0f, 15.0f);
439 so->tsc[2] |=
440 (((int)(f[1] * 256.0f) & 0xfff) << 12) | ((int)(f[0] * 256.0f) & 0xfff);
441
442 so->tsc[4] = fui(cso->border_color[0]);
443 so->tsc[5] = fui(cso->border_color[1]);
444 so->tsc[6] = fui(cso->border_color[2]);
445 so->tsc[7] = fui(cso->border_color[3]);
446
447 return (void *)so;
448 }
449
450 static void
451 nvc0_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
452 {
453 unsigned s, i;
454
455 for (s = 0; s < 5; ++s)
456 for (i = 0; i < nvc0_context(pipe)->num_samplers[s]; ++i)
457 if (nvc0_context(pipe)->samplers[s][i] == hwcso)
458 nvc0_context(pipe)->samplers[s][i] = NULL;
459
460 nvc0_screen_tsc_free(nvc0_context(pipe)->screen, nvc0_tsc_entry(hwcso));
461
462 FREE(hwcso);
463 }
464
465 static INLINE void
466 nvc0_stage_sampler_states_bind(struct nvc0_context *nvc0, int s,
467 unsigned nr, void **hwcso)
468 {
469 unsigned i;
470
471 for (i = 0; i < nr; ++i) {
472 struct nvc0_tsc_entry *old = nvc0->samplers[s][i];
473
474 nvc0->samplers[s][i] = nvc0_tsc_entry(hwcso[i]);
475 if (old)
476 nvc0_screen_tsc_unlock(nvc0->screen, old);
477 }
478 for (; i < nvc0->num_samplers[s]; ++i)
479 if (nvc0->samplers[s][i])
480 nvc0_screen_tsc_unlock(nvc0->screen, nvc0->samplers[s][i]);
481
482 nvc0->num_samplers[s] = nr;
483
484 nvc0->dirty |= NVC0_NEW_SAMPLERS;
485 }
486
487 static void
488 nvc0_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
489 {
490 nvc0_stage_sampler_states_bind(nvc0_context(pipe), 0, nr, s);
491 }
492
493 static void
494 nvc0_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
495 {
496 nvc0_stage_sampler_states_bind(nvc0_context(pipe), 4, nr, s);
497 }
498
499 static void
500 nvc0_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
501 {
502 nvc0_stage_sampler_states_bind(nvc0_context(pipe), 3, nr, s);
503 }
504
505 /* NOTE: only called when not referenced anywhere, won't be bound */
506 static void
507 nvc0_sampler_view_destroy(struct pipe_context *pipe,
508 struct pipe_sampler_view *view)
509 {
510 pipe_resource_reference(&view->texture, NULL);
511
512 nvc0_screen_tic_free(nvc0_context(pipe)->screen, nvc0_tic_entry(view));
513
514 FREE(nvc0_tic_entry(view));
515 }
516
517 static INLINE void
518 nvc0_stage_set_sampler_views(struct nvc0_context *nvc0, int s,
519 unsigned nr,
520 struct pipe_sampler_view **views)
521 {
522 unsigned i;
523
524 for (i = 0; i < nr; ++i) {
525 struct nvc0_tic_entry *old = nvc0_tic_entry(nvc0->textures[s][i]);
526 if (old)
527 nvc0_screen_tic_unlock(nvc0->screen, old);
528
529 pipe_sampler_view_reference(&nvc0->textures[s][i], views[i]);
530 }
531
532 for (i = nr; i < nvc0->num_textures[s]; ++i) {
533 struct nvc0_tic_entry *old = nvc0_tic_entry(nvc0->textures[s][i]);
534 if (!old)
535 continue;
536 nvc0_screen_tic_unlock(nvc0->screen, old);
537
538 pipe_sampler_view_reference(&nvc0->textures[s][i], NULL);
539 }
540
541 nvc0->num_textures[s] = nr;
542
543 nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_TEXTURES);
544
545 nvc0->dirty |= NVC0_NEW_TEXTURES;
546 }
547
548 static void
549 nvc0_vp_set_sampler_views(struct pipe_context *pipe,
550 unsigned nr,
551 struct pipe_sampler_view **views)
552 {
553 nvc0_stage_set_sampler_views(nvc0_context(pipe), 0, nr, views);
554 }
555
556 static void
557 nvc0_fp_set_sampler_views(struct pipe_context *pipe,
558 unsigned nr,
559 struct pipe_sampler_view **views)
560 {
561 nvc0_stage_set_sampler_views(nvc0_context(pipe), 4, nr, views);
562 }
563
564 static void
565 nvc0_gp_set_sampler_views(struct pipe_context *pipe,
566 unsigned nr,
567 struct pipe_sampler_view **views)
568 {
569 nvc0_stage_set_sampler_views(nvc0_context(pipe), 3, nr, views);
570 }
571
572 /* ============================= SHADERS =======================================
573 */
574
575 static void *
576 nvc0_sp_state_create(struct pipe_context *pipe,
577 const struct pipe_shader_state *cso, unsigned type)
578 {
579 struct nvc0_program *prog;
580
581 prog = CALLOC_STRUCT(nvc0_program);
582 if (!prog)
583 return NULL;
584
585 prog->type = type;
586 prog->pipe.tokens = tgsi_dup_tokens(cso->tokens);
587
588 return (void *)prog;
589 }
590
591 static void
592 nvc0_sp_state_delete(struct pipe_context *pipe, void *hwcso)
593 {
594 struct nvc0_program *prog = (struct nvc0_program *)hwcso;
595
596 nvc0_program_destroy(nvc0_context(pipe), prog);
597
598 FREE((void *)prog->pipe.tokens);
599 FREE(prog);
600 }
601
602 static void *
603 nvc0_vp_state_create(struct pipe_context *pipe,
604 const struct pipe_shader_state *cso)
605 {
606 return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
607 }
608
609 static void
610 nvc0_vp_state_bind(struct pipe_context *pipe, void *hwcso)
611 {
612 struct nvc0_context *nvc0 = nvc0_context(pipe);
613
614 nvc0->vertprog = hwcso;
615 nvc0->dirty |= NVC0_NEW_VERTPROG;
616 }
617
618 static void *
619 nvc0_fp_state_create(struct pipe_context *pipe,
620 const struct pipe_shader_state *cso)
621 {
622 return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
623 }
624
625 static void
626 nvc0_fp_state_bind(struct pipe_context *pipe, void *hwcso)
627 {
628 struct nvc0_context *nvc0 = nvc0_context(pipe);
629
630 nvc0->fragprog = hwcso;
631 nvc0->dirty |= NVC0_NEW_FRAGPROG;
632 }
633
634 static void *
635 nvc0_gp_state_create(struct pipe_context *pipe,
636 const struct pipe_shader_state *cso)
637 {
638 return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY);
639 }
640
641 static void
642 nvc0_gp_state_bind(struct pipe_context *pipe, void *hwcso)
643 {
644 struct nvc0_context *nvc0 = nvc0_context(pipe);
645
646 nvc0->gmtyprog = hwcso;
647 nvc0->dirty |= NVC0_NEW_GMTYPROG;
648 }
649
650 static void
651 nvc0_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
652 struct pipe_resource *res)
653 {
654 struct nvc0_context *nvc0 = nvc0_context(pipe);
655
656 switch (shader) {
657 case PIPE_SHADER_VERTEX: shader = 0; break;
658 /*
659 case PIPE_SHADER_TESSELLATION_CONTROL: shader = 1; break;
660 case PIPE_SHADER_TESSELLATION_EVALUATION: shader = 2; break;
661 */
662 case PIPE_SHADER_GEOMETRY: shader = 3; break;
663 case PIPE_SHADER_FRAGMENT: shader = 4; break;
664 default:
665 assert(0);
666 break;
667 }
668
669 if (nvc0->constbuf[shader][index])
670 nvc0_bufctx_del_resident(nvc0, NVC0_BUFCTX_CONSTANT,
671 nvc0_resource(
672 nvc0->constbuf[shader][index]));
673
674 pipe_resource_reference(&nvc0->constbuf[shader][index], res);
675
676 nvc0->constbuf_dirty[shader] |= 1 << index;
677
678 nvc0->dirty |= NVC0_NEW_CONSTBUF;
679 }
680
681 /* =============================================================================
682 */
683
684 static void
685 nvc0_set_blend_color(struct pipe_context *pipe,
686 const struct pipe_blend_color *bcol)
687 {
688 struct nvc0_context *nvc0 = nvc0_context(pipe);
689
690 nvc0->blend_colour = *bcol;
691 nvc0->dirty |= NVC0_NEW_BLEND_COLOUR;
692 }
693
694 static void
695 nvc0_set_stencil_ref(struct pipe_context *pipe,
696 const struct pipe_stencil_ref *sr)
697 {
698 struct nvc0_context *nvc0 = nvc0_context(pipe);
699
700 nvc0->stencil_ref = *sr;
701 nvc0->dirty |= NVC0_NEW_STENCIL_REF;
702 }
703
704 static void
705 nvc0_set_clip_state(struct pipe_context *pipe,
706 const struct pipe_clip_state *clip)
707 {
708 struct nvc0_context *nvc0 = nvc0_context(pipe);
709 const unsigned size = clip->nr * sizeof(clip->ucp[0]);
710
711 memcpy(&nvc0->clip.ucp[0][0], &clip->ucp[0][0], size);
712 nvc0->clip.nr = clip->nr;
713
714 nvc0->clip.depth_clamp = clip->depth_clamp;
715
716 nvc0->dirty |= NVC0_NEW_CLIP;
717 }
718
719 static void
720 nvc0_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
721 {
722 struct nvc0_context *nvc0 = nvc0_context(pipe);
723
724 nvc0->sample_mask = sample_mask;
725 nvc0->dirty |= NVC0_NEW_SAMPLE_MASK;
726 }
727
728
729 static void
730 nvc0_set_framebuffer_state(struct pipe_context *pipe,
731 const struct pipe_framebuffer_state *fb)
732 {
733 struct nvc0_context *nvc0 = nvc0_context(pipe);
734
735 nvc0->framebuffer = *fb;
736 nvc0->dirty |= NVC0_NEW_FRAMEBUFFER;
737 }
738
739 static void
740 nvc0_set_polygon_stipple(struct pipe_context *pipe,
741 const struct pipe_poly_stipple *stipple)
742 {
743 struct nvc0_context *nvc0 = nvc0_context(pipe);
744
745 nvc0->stipple = *stipple;
746 nvc0->dirty |= NVC0_NEW_STIPPLE;
747 }
748
749 static void
750 nvc0_set_scissor_state(struct pipe_context *pipe,
751 const struct pipe_scissor_state *scissor)
752 {
753 struct nvc0_context *nvc0 = nvc0_context(pipe);
754
755 nvc0->scissor = *scissor;
756 nvc0->dirty |= NVC0_NEW_SCISSOR;
757 }
758
759 static void
760 nvc0_set_viewport_state(struct pipe_context *pipe,
761 const struct pipe_viewport_state *vpt)
762 {
763 struct nvc0_context *nvc0 = nvc0_context(pipe);
764
765 nvc0->viewport = *vpt;
766 nvc0->dirty |= NVC0_NEW_VIEWPORT;
767 }
768
769 static void
770 nvc0_set_vertex_buffers(struct pipe_context *pipe,
771 unsigned count,
772 const struct pipe_vertex_buffer *vb)
773 {
774 struct nvc0_context *nvc0 = nvc0_context(pipe);
775 unsigned i;
776
777 for (i = 0; i < count; ++i)
778 pipe_resource_reference(&nvc0->vtxbuf[i].buffer, vb[i].buffer);
779 for (; i < nvc0->num_vtxbufs; ++i)
780 pipe_resource_reference(&nvc0->vtxbuf[i].buffer, NULL);
781
782 memcpy(nvc0->vtxbuf, vb, sizeof(*vb) * count);
783 nvc0->num_vtxbufs = count;
784
785 nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_VERTEX);
786
787 nvc0->dirty |= NVC0_NEW_ARRAYS;
788 }
789
790 static void
791 nvc0_set_index_buffer(struct pipe_context *pipe,
792 const struct pipe_index_buffer *ib)
793 {
794 struct nvc0_context *nvc0 = nvc0_context(pipe);
795
796 if (ib)
797 memcpy(&nvc0->idxbuf, ib, sizeof(nvc0->idxbuf));
798 else
799 nvc0->idxbuf.buffer = NULL;
800 }
801
802 static void
803 nvc0_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
804 {
805 struct nvc0_context *nvc0 = nvc0_context(pipe);
806
807 nvc0->vertex = hwcso;
808 nvc0->dirty |= NVC0_NEW_VERTEX;
809 }
810
811 void
812 nvc0_init_state_functions(struct nvc0_context *nvc0)
813 {
814 nvc0->pipe.create_blend_state = nvc0_blend_state_create;
815 nvc0->pipe.bind_blend_state = nvc0_blend_state_bind;
816 nvc0->pipe.delete_blend_state = nvc0_blend_state_delete;
817
818 nvc0->pipe.create_rasterizer_state = nvc0_rasterizer_state_create;
819 nvc0->pipe.bind_rasterizer_state = nvc0_rasterizer_state_bind;
820 nvc0->pipe.delete_rasterizer_state = nvc0_rasterizer_state_delete;
821
822 nvc0->pipe.create_depth_stencil_alpha_state = nvc0_zsa_state_create;
823 nvc0->pipe.bind_depth_stencil_alpha_state = nvc0_zsa_state_bind;
824 nvc0->pipe.delete_depth_stencil_alpha_state = nvc0_zsa_state_delete;
825
826 nvc0->pipe.create_sampler_state = nvc0_sampler_state_create;
827 nvc0->pipe.delete_sampler_state = nvc0_sampler_state_delete;
828 nvc0->pipe.bind_vertex_sampler_states = nvc0_vp_sampler_states_bind;
829 nvc0->pipe.bind_fragment_sampler_states = nvc0_fp_sampler_states_bind;
830 nvc0->pipe.bind_geometry_sampler_states = nvc0_gp_sampler_states_bind;
831
832 nvc0->pipe.create_sampler_view = nvc0_create_sampler_view;
833 nvc0->pipe.sampler_view_destroy = nvc0_sampler_view_destroy;
834 nvc0->pipe.set_vertex_sampler_views = nvc0_vp_set_sampler_views;
835 nvc0->pipe.set_fragment_sampler_views = nvc0_fp_set_sampler_views;
836 nvc0->pipe.set_geometry_sampler_views = nvc0_gp_set_sampler_views;
837
838 nvc0->pipe.create_vs_state = nvc0_vp_state_create;
839 nvc0->pipe.create_fs_state = nvc0_fp_state_create;
840 nvc0->pipe.create_gs_state = nvc0_gp_state_create;
841 nvc0->pipe.bind_vs_state = nvc0_vp_state_bind;
842 nvc0->pipe.bind_fs_state = nvc0_fp_state_bind;
843 nvc0->pipe.bind_gs_state = nvc0_gp_state_bind;
844 nvc0->pipe.delete_vs_state = nvc0_sp_state_delete;
845 nvc0->pipe.delete_fs_state = nvc0_sp_state_delete;
846 nvc0->pipe.delete_gs_state = nvc0_sp_state_delete;
847
848 nvc0->pipe.set_blend_color = nvc0_set_blend_color;
849 nvc0->pipe.set_stencil_ref = nvc0_set_stencil_ref;
850 nvc0->pipe.set_clip_state = nvc0_set_clip_state;
851 nvc0->pipe.set_sample_mask = nvc0_set_sample_mask;
852 nvc0->pipe.set_constant_buffer = nvc0_set_constant_buffer;
853 nvc0->pipe.set_framebuffer_state = nvc0_set_framebuffer_state;
854 nvc0->pipe.set_polygon_stipple = nvc0_set_polygon_stipple;
855 nvc0->pipe.set_scissor_state = nvc0_set_scissor_state;
856 nvc0->pipe.set_viewport_state = nvc0_set_viewport_state;
857
858 nvc0->pipe.create_vertex_elements_state = nvc0_vertex_state_create;
859 nvc0->pipe.delete_vertex_elements_state = nvc0_vertex_state_delete;
860 nvc0->pipe.bind_vertex_elements_state = nvc0_vertex_state_bind;
861
862 nvc0->pipe.set_vertex_buffers = nvc0_set_vertex_buffers;
863 nvc0->pipe.set_index_buffer = nvc0_set_index_buffer;
864 }
865