src/gallium/drivers/nvc0/nvc0_state.c

   1 /*
   2  * Copyright 2010 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "pipe/p_defines.h"
  24 #include "util/u_inlines.h"
  25 #include "util/u_transfer.h"
  26
  27 #include "tgsi/tgsi_parse.h"
  28
  29 #include "nvc0_stateobj.h"
  30 #include "nvc0_context.h"
  31
  32 #include "nvc0_3d.xml.h"
  33 #include "nv50/nv50_texture.xml.h"
  34
  35 #include "nouveau/nouveau_gldefs.h"
  36
  37 static INLINE uint32_t
  38 nvc0_colormask(unsigned mask)
  39 {
  40     uint32_t ret = 0;
  41
  42     if (mask & PIPE_MASK_R)
  43         ret |= 0x0001;
  44     if (mask & PIPE_MASK_G)
  45         ret |= 0x0010;
  46     if (mask & PIPE_MASK_B)
  47         ret |= 0x0100;
  48     if (mask & PIPE_MASK_A)
  49         ret |= 0x1000;
  50
  51     return ret;
  52 }
  53
  54 #define NVC0_BLEND_FACTOR_CASE(a, b) \
  55    case PIPE_BLENDFACTOR_##a: return NV50_3D_BLEND_FACTOR_##b
  56
  57 static INLINE uint32_t
  58 nvc0_blend_fac(unsigned factor)
  59 {
  60    switch (factor) {
  61    NVC0_BLEND_FACTOR_CASE(ONE, ONE);
  62    NVC0_BLEND_FACTOR_CASE(SRC_COLOR, SRC_COLOR);
  63    NVC0_BLEND_FACTOR_CASE(SRC_ALPHA, SRC_ALPHA);
  64    NVC0_BLEND_FACTOR_CASE(DST_ALPHA, DST_ALPHA);
  65    NVC0_BLEND_FACTOR_CASE(DST_COLOR, DST_COLOR);
  66    NVC0_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE, SRC_ALPHA_SATURATE);
  67    NVC0_BLEND_FACTOR_CASE(CONST_COLOR, CONSTANT_COLOR);
  68    NVC0_BLEND_FACTOR_CASE(CONST_ALPHA, CONSTANT_ALPHA);
  69    NVC0_BLEND_FACTOR_CASE(SRC1_COLOR, SRC1_COLOR);
  70    NVC0_BLEND_FACTOR_CASE(SRC1_ALPHA, SRC1_ALPHA);
  71    NVC0_BLEND_FACTOR_CASE(ZERO, ZERO);
  72    NVC0_BLEND_FACTOR_CASE(INV_SRC_COLOR, ONE_MINUS_SRC_COLOR);
  73    NVC0_BLEND_FACTOR_CASE(INV_SRC_ALPHA, ONE_MINUS_SRC_ALPHA);
  74    NVC0_BLEND_FACTOR_CASE(INV_DST_ALPHA, ONE_MINUS_DST_ALPHA);
  75    NVC0_BLEND_FACTOR_CASE(INV_DST_COLOR, ONE_MINUS_DST_COLOR);
  76    NVC0_BLEND_FACTOR_CASE(INV_CONST_COLOR, ONE_MINUS_CONSTANT_COLOR);
  77    NVC0_BLEND_FACTOR_CASE(INV_CONST_ALPHA, ONE_MINUS_CONSTANT_ALPHA);
  78    NVC0_BLEND_FACTOR_CASE(INV_SRC1_COLOR, ONE_MINUS_SRC1_COLOR);
  79    NVC0_BLEND_FACTOR_CASE(INV_SRC1_ALPHA, ONE_MINUS_SRC1_ALPHA);
  80    default:
  81       return NV50_3D_BLEND_FACTOR_ZERO;
  82    }
  83 }
  84
  85 static void *
  86 nvc0_blend_state_create(struct pipe_context *pipe,
  87                         const struct pipe_blend_state *cso)
  88 {
  89     struct nvc0_blend_stateobj *so = CALLOC_STRUCT(nvc0_blend_stateobj);
  90     int i;
  91
  92     so->pipe = *cso;
  93
  94     SB_IMMED_3D(so, BLEND_INDEPENDENT, cso->independent_blend_enable);
  95
  96     if (!cso->logicop_enable)
  97        SB_IMMED_3D(so, LOGIC_OP_ENABLE, 0);
  98
  99     if (cso->logicop_enable) {
 100        SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2);
 101        SB_DATA    (so, 1);
 102        SB_DATA    (so, nvgl_logicop_func(cso->logicop_func));
 103
 104        SB_IMMED_3D(so, BLEND_ENABLES, 0);
 105     } else
 106     if (!cso->independent_blend_enable) {
 107         SB_IMMED_3D(so, BLEND_ENABLES, cso->rt[0].blend_enable ? 0xff : 0);
 108
 109         if (cso->rt[0].blend_enable) {
 110             SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5);
 111             SB_DATA    (so, nvgl_blend_eqn(cso->rt[0].rgb_func));
 112             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].rgb_src_factor));
 113             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].rgb_dst_factor));
 114             SB_DATA    (so, nvgl_blend_eqn(cso->rt[0].alpha_func));
 115             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].alpha_src_factor));
 116             SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1);
 117             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].alpha_dst_factor));
 118         }
 119
 120         SB_BEGIN_3D(so, COLOR_MASK_BROADCAST, 1);
 121         SB_DATA    (so, nvc0_colormask(cso->rt[0].colormask));
 122     } else {
 123         uint8_t en = 0;
 124
 125         for (i = 0; i < 8; ++i) {
 126             if (!cso->rt[i].blend_enable)
 127                 continue;
 128             en |= 1 << i;
 129
 130             SB_BEGIN_3D(so, IBLEND_EQUATION_RGB(i), 6);
 131             SB_DATA    (so, nvgl_blend_eqn(cso->rt[i].rgb_func));
 132             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].rgb_src_factor));
 133             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].rgb_dst_factor));
 134             SB_DATA    (so, nvgl_blend_eqn(cso->rt[i].alpha_func));
 135             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].alpha_src_factor));
 136             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].alpha_dst_factor));
 137         }
 138         SB_IMMED_3D(so, BLEND_ENABLES, en);
 139
 140         SB_BEGIN_3D(so, COLOR_MASK(0), 8);
 141         for (i = 0; i < 8; ++i)
 142             SB_DATA(so, nvc0_colormask(cso->rt[i].colormask));
 143     }
 144
 145     assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 146     return so;
 147 }
 148
 149 static void
 150 nvc0_blend_state_bind(struct pipe_context *pipe, void *hwcso)
 151 {
 152     struct nvc0_context *nvc0 = nvc0_context(pipe);
 153
 154     nvc0->blend = hwcso;
 155     nvc0->dirty |= NVC0_NEW_BLEND;
 156 }
 157
 158 static void
 159 nvc0_blend_state_delete(struct pipe_context *pipe, void *hwcso)
 160 {
 161     FREE(hwcso);
 162 }
 163
 164 /* NOTE: ignoring line_last_pixel, using FALSE (set on screen init) */
 165 static void *
 166 nvc0_rasterizer_state_create(struct pipe_context *pipe,
 167                              const struct pipe_rasterizer_state *cso)
 168 {
 169     struct nvc0_rasterizer_stateobj *so;
 170     uint32_t reg;
 171
 172     so = CALLOC_STRUCT(nvc0_rasterizer_stateobj);
 173     if (!so)
 174         return NULL;
 175     so->pipe = *cso;
 176
 177     /* Scissor enables are handled in scissor state, we will not want to
 178      * always emit 16 commands, one for each scissor rectangle, here.
 179      */
 180
 181     SB_BEGIN_3D(so, SHADE_MODEL, 1);
 182     SB_DATA    (so, cso->flatshade ? NVC0_3D_SHADE_MODEL_FLAT :
 183                                      NVC0_3D_SHADE_MODEL_SMOOTH);
 184     SB_IMMED_3D(so, PROVOKING_VERTEX_LAST, !cso->flatshade_first);
 185     SB_IMMED_3D(so, VERTEX_TWO_SIDE_ENABLE, cso->light_twoside);
 186
 187     SB_IMMED_3D(so, VERT_COLOR_CLAMP_EN, cso->clamp_vertex_color);
 188     SB_BEGIN_3D(so, FRAG_COLOR_CLAMP_EN, 1);
 189     SB_DATA    (so, cso->clamp_fragment_color ? 0x11111111 : 0x00000000);
 190
 191     SB_IMMED_3D(so, LINE_SMOOTH_ENABLE, cso->line_smooth);
 192     if (cso->line_smooth)
 193        SB_BEGIN_3D(so, LINE_WIDTH_SMOOTH, 1);
 194     else
 195        SB_BEGIN_3D(so, LINE_WIDTH_ALIASED, 1);
 196     SB_DATA    (so, fui(cso->line_width));
 197
 198     SB_IMMED_3D(so, LINE_STIPPLE_ENABLE, cso->line_stipple_enable);
 199     if (cso->line_stipple_enable) {
 200         SB_BEGIN_3D(so, LINE_STIPPLE_PATTERN, 1);
 201         SB_DATA    (so, (cso->line_stipple_pattern << 8) |
 202                          cso->line_stipple_factor);
 203
 204     }
 205
 206     SB_IMMED_3D(so, VP_POINT_SIZE_EN, cso->point_size_per_vertex);
 207     if (!cso->point_size_per_vertex) {
 208        SB_BEGIN_3D(so, POINT_SIZE, 1);
 209        SB_DATA    (so, fui(cso->point_size));
 210     }
 211
 212     reg = (cso->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT) ?
 213        NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_UPPER_LEFT :
 214        NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_LOWER_LEFT;
 215
 216     SB_BEGIN_3D(so, POINT_COORD_REPLACE, 1);
 217     SB_DATA    (so, ((cso->sprite_coord_enable & 0xff) << 3) | reg);
 218     SB_IMMED_3D(so, POINT_SPRITE_ENABLE, cso->point_quad_rasterization);
 219     SB_IMMED_3D(so, POINT_SMOOTH_ENABLE, cso->point_smooth);
 220
 221     SB_BEGIN_3D(so, POLYGON_MODE_FRONT, 1);
 222     SB_DATA    (so, nvgl_polygon_mode(cso->fill_front));
 223     SB_BEGIN_3D(so, POLYGON_MODE_BACK, 1);
 224     SB_DATA    (so, nvgl_polygon_mode(cso->fill_back));
 225     SB_IMMED_3D(so, POLYGON_SMOOTH_ENABLE, cso->poly_smooth);
 226
 227     SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3);
 228     SB_DATA    (so, cso->cull_face != PIPE_FACE_NONE);
 229     SB_DATA    (so, cso->front_ccw ? NVC0_3D_FRONT_FACE_CCW :
 230                                      NVC0_3D_FRONT_FACE_CW);
 231     switch (cso->cull_face) {
 232     case PIPE_FACE_FRONT_AND_BACK:
 233        SB_DATA(so, NVC0_3D_CULL_FACE_FRONT_AND_BACK);
 234        break;
 235     case PIPE_FACE_FRONT:
 236        SB_DATA(so, NVC0_3D_CULL_FACE_FRONT);
 237        break;
 238     case PIPE_FACE_BACK:
 239     default:
 240        SB_DATA(so, NVC0_3D_CULL_FACE_BACK);
 241        break;
 242     }
 243
 244     SB_IMMED_3D(so, POLYGON_STIPPLE_ENABLE, cso->poly_stipple_enable);
 245     SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3);
 246     SB_DATA    (so, cso->offset_point);
 247     SB_DATA    (so, cso->offset_line);
 248     SB_DATA    (so, cso->offset_tri);
 249
 250     if (cso->offset_point || cso->offset_line || cso->offset_tri) {
 251         SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1);
 252         SB_DATA    (so, fui(cso->offset_scale));
 253         SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1);
 254         SB_DATA    (so, fui(cso->offset_units * 2.0f));
 255     }
 256
 257     assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 258     return (void *)so;
 259 }
 260
 261 static void
 262 nvc0_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
 263 {
 264    struct nvc0_context *nvc0 = nvc0_context(pipe);
 265
 266    nvc0->rast = hwcso;
 267    nvc0->dirty |= NVC0_NEW_RASTERIZER;
 268 }
 269
 270 static void
 271 nvc0_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
 272 {
 273    FREE(hwcso);
 274 }
 275
 276 static void *
 277 nvc0_zsa_state_create(struct pipe_context *pipe,
 278                       const struct pipe_depth_stencil_alpha_state *cso)
 279 {
 280    struct nvc0_zsa_stateobj *so = CALLOC_STRUCT(nvc0_zsa_stateobj);
 281
 282    so->pipe = *cso;
 283
 284    SB_IMMED_3D(so, DEPTH_TEST_ENABLE, cso->depth.enabled);
 285    if (cso->depth.enabled) {
 286       SB_IMMED_3D(so, DEPTH_WRITE_ENABLE, cso->depth.writemask);
 287       SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
 288       SB_DATA    (so, nvgl_comparison_op(cso->depth.func));
 289    }
 290
 291    if (cso->stencil[0].enabled) {
 292       SB_BEGIN_3D(so, STENCIL_ENABLE, 5);
 293       SB_DATA    (so, 1);
 294       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].fail_op));
 295       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
 296       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
 297       SB_DATA    (so, nvgl_comparison_op(cso->stencil[0].func));
 298       SB_BEGIN_3D(so, STENCIL_FRONT_FUNC_MASK, 2);
 299       SB_DATA    (so, cso->stencil[0].valuemask);
 300       SB_DATA    (so, cso->stencil[0].writemask);
 301    } else {
 302       SB_IMMED_3D(so, STENCIL_ENABLE, 0);
 303    }
 304
 305    if (cso->stencil[1].enabled) {
 306       assert(cso->stencil[0].enabled);
 307       SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5);
 308       SB_DATA    (so, 1);
 309       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].fail_op));
 310       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
 311       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
 312       SB_DATA    (so, nvgl_comparison_op(cso->stencil[1].func));
 313       SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2);
 314       SB_DATA    (so, cso->stencil[1].writemask);
 315       SB_DATA    (so, cso->stencil[1].valuemask);
 316    } else
 317    if (cso->stencil[0].enabled) {
 318       SB_IMMED_3D(so, STENCIL_TWO_SIDE_ENABLE, 0);
 319    }
 320
 321    SB_IMMED_3D(so, ALPHA_TEST_ENABLE, cso->alpha.enabled);
 322    if (cso->alpha.enabled) {
 323       SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
 324       SB_DATA    (so, fui(cso->alpha.ref_value));
 325       SB_DATA    (so, nvgl_comparison_op(cso->alpha.func));
 326    }
 327
 328    assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 329    return (void *)so;
 330 }
 331
 332 static void
 333 nvc0_zsa_state_bind(struct pipe_context *pipe, void *hwcso)
 334 {
 335    struct nvc0_context *nvc0 = nvc0_context(pipe);
 336
 337    nvc0->zsa = hwcso;
 338    nvc0->dirty |= NVC0_NEW_ZSA;
 339 }
 340
 341 static void
 342 nvc0_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
 343 {
 344    FREE(hwcso);
 345 }
 346
 347 /* ====================== SAMPLERS AND TEXTURES ================================
 348  */
 349
 350 #define NV50_TSC_WRAP_CASE(n) \
 351     case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
 352
 353 static INLINE unsigned
 354 nv50_tsc_wrap_mode(unsigned wrap)
 355 {
 356    switch (wrap) {
 357    NV50_TSC_WRAP_CASE(REPEAT);
 358    NV50_TSC_WRAP_CASE(MIRROR_REPEAT);
 359    NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE);
 360    NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER);
 361    NV50_TSC_WRAP_CASE(CLAMP);
 362    NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE);
 363    NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER);
 364    NV50_TSC_WRAP_CASE(MIRROR_CLAMP);
 365    default:
 366        NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
 367        return NV50_TSC_WRAP_REPEAT;
 368    }
 369 }
 370
 371 static void
 372 nvc0_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
 373 {
 374    unsigned s, i;
 375
 376    for (s = 0; s < 5; ++s)
 377       for (i = 0; i < nvc0_context(pipe)->num_samplers[s]; ++i)
 378          if (nvc0_context(pipe)->samplers[s][i] == hwcso)
 379             nvc0_context(pipe)->samplers[s][i] = NULL;
 380
 381    nvc0_screen_tsc_free(nvc0_context(pipe)->screen, nv50_tsc_entry(hwcso));
 382
 383    FREE(hwcso);
 384 }
 385
 386 static INLINE void
 387 nvc0_stage_sampler_states_bind(struct nvc0_context *nvc0, int s,
 388                                unsigned nr, void **hwcso)
 389 {
 390    unsigned i;
 391
 392    for (i = 0; i < nr; ++i) {
 393       struct nv50_tsc_entry *old = nvc0->samplers[s][i];
 394
 395       nvc0->samplers[s][i] = nv50_tsc_entry(hwcso[i]);
 396       if (old)
 397          nvc0_screen_tsc_unlock(nvc0->screen, old);
 398    }
 399    for (; i < nvc0->num_samplers[s]; ++i)
 400       if (nvc0->samplers[s][i])
 401          nvc0_screen_tsc_unlock(nvc0->screen, nvc0->samplers[s][i]);
 402
 403    nvc0->num_samplers[s] = nr;
 404
 405    nvc0->dirty |= NVC0_NEW_SAMPLERS;
 406 }
 407
 408 static void
 409 nvc0_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 410 {
 411    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 0, nr, s);
 412 }
 413
 414 static void
 415 nvc0_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 416 {
 417    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 4, nr, s);
 418 }
 419
 420 static void
 421 nvc0_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 422 {
 423    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 3, nr, s);
 424 }
 425
 426 /* NOTE: only called when not referenced anywhere, won't be bound */
 427 static void
 428 nvc0_sampler_view_destroy(struct pipe_context *pipe,
 429                           struct pipe_sampler_view *view)
 430 {
 431    pipe_resource_reference(&view->texture, NULL);
 432
 433    nvc0_screen_tic_free(nvc0_context(pipe)->screen, nv50_tic_entry(view));
 434
 435    FREE(nv50_tic_entry(view));
 436 }
 437
 438 static INLINE void
 439 nvc0_stage_set_sampler_views(struct nvc0_context *nvc0, int s,
 440                              unsigned nr,
 441                              struct pipe_sampler_view **views)
 442 {
 443    unsigned i;
 444
 445    for (i = 0; i < nr; ++i) {
 446       struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]);
 447       if (old)
 448          nvc0_screen_tic_unlock(nvc0->screen, old);
 449
 450       pipe_sampler_view_reference(&nvc0->textures[s][i], views[i]);
 451    }
 452
 453    for (i = nr; i < nvc0->num_textures[s]; ++i) {
 454       struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]);
 455       if (!old)
 456          continue;
 457       nvc0_screen_tic_unlock(nvc0->screen, old);
 458
 459       pipe_sampler_view_reference(&nvc0->textures[s][i], NULL);
 460    }
 461
 462    nvc0->num_textures[s] = nr;
 463
 464    nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_TEXTURES);
 465
 466    nvc0->dirty |= NVC0_NEW_TEXTURES;
 467 }
 468
 469 static void
 470 nvc0_vp_set_sampler_views(struct pipe_context *pipe,
 471                           unsigned nr,
 472                           struct pipe_sampler_view **views)
 473 {
 474    nvc0_stage_set_sampler_views(nvc0_context(pipe), 0, nr, views);
 475 }
 476
 477 static void
 478 nvc0_fp_set_sampler_views(struct pipe_context *pipe,
 479                           unsigned nr,
 480                           struct pipe_sampler_view **views)
 481 {
 482    nvc0_stage_set_sampler_views(nvc0_context(pipe), 4, nr, views);
 483 }
 484
 485 static void
 486 nvc0_gp_set_sampler_views(struct pipe_context *pipe,
 487                           unsigned nr,
 488                           struct pipe_sampler_view **views)
 489 {
 490    nvc0_stage_set_sampler_views(nvc0_context(pipe), 3, nr, views);
 491 }
 492
 493 /* ============================= SHADERS =======================================
 494  */
 495
 496 static void *
 497 nvc0_sp_state_create(struct pipe_context *pipe,
 498                      const struct pipe_shader_state *cso, unsigned type)
 499 {
 500    struct nvc0_program *prog;
 501
 502    prog = CALLOC_STRUCT(nvc0_program);
 503    if (!prog)
 504       return NULL;
 505
 506    prog->type = type;
 507    prog->pipe.tokens = tgsi_dup_tokens(cso->tokens);
 508
 509    return (void *)prog;
 510 }
 511
 512 static void
 513 nvc0_sp_state_delete(struct pipe_context *pipe, void *hwcso)
 514 {
 515    struct nvc0_program *prog = (struct nvc0_program *)hwcso;
 516
 517    nvc0_program_destroy(nvc0_context(pipe), prog);
 518
 519    FREE((void *)prog->pipe.tokens);
 520    FREE(prog);
 521 }
 522
 523 static void *
 524 nvc0_vp_state_create(struct pipe_context *pipe,
 525                      const struct pipe_shader_state *cso)
 526 {
 527    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
 528 }
 529
 530 static void
 531 nvc0_vp_state_bind(struct pipe_context *pipe, void *hwcso)
 532 {
 533     struct nvc0_context *nvc0 = nvc0_context(pipe);
 534
 535     nvc0->vertprog = hwcso;
 536     nvc0->dirty |= NVC0_NEW_VERTPROG;
 537 }
 538
 539 static void *
 540 nvc0_fp_state_create(struct pipe_context *pipe,
 541                      const struct pipe_shader_state *cso)
 542 {
 543    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
 544 }
 545
 546 static void
 547 nvc0_fp_state_bind(struct pipe_context *pipe, void *hwcso)
 548 {
 549     struct nvc0_context *nvc0 = nvc0_context(pipe);
 550
 551     nvc0->fragprog = hwcso;
 552     nvc0->dirty |= NVC0_NEW_FRAGPROG;
 553 }
 554
 555 static void *
 556 nvc0_gp_state_create(struct pipe_context *pipe,
 557                      const struct pipe_shader_state *cso)
 558 {
 559    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY);
 560 }
 561
 562 static void
 563 nvc0_gp_state_bind(struct pipe_context *pipe, void *hwcso)
 564 {
 565     struct nvc0_context *nvc0 = nvc0_context(pipe);
 566
 567     nvc0->gmtyprog = hwcso;
 568     nvc0->dirty |= NVC0_NEW_GMTYPROG;
 569 }
 570
 571 static void
 572 nvc0_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
 573                          struct pipe_resource *res)
 574 {
 575    struct nvc0_context *nvc0 = nvc0_context(pipe);
 576
 577    switch (shader) {
 578    case PIPE_SHADER_VERTEX: shader = 0; break;
 579       /*
 580    case PIPE_SHADER_TESSELLATION_CONTROL: shader = 1; break;
 581    case PIPE_SHADER_TESSELLATION_EVALUATION: shader = 2; break;
 582       */
 583    case PIPE_SHADER_GEOMETRY: shader = 3; break;
 584    case PIPE_SHADER_FRAGMENT: shader = 4; break;
 585    default:
 586       assert(0);
 587       break;
 588    }
 589
 590    if (nvc0->constbuf[shader][index])
 591       nvc0_bufctx_del_resident(nvc0, NVC0_BUFCTX_CONSTANT,
 592                                nv04_resource(nvc0->constbuf[shader][index]));
 593
 594    pipe_resource_reference(&nvc0->constbuf[shader][index], res);
 595
 596    nvc0->constbuf_dirty[shader] |= 1 << index;
 597
 598    nvc0->dirty |= NVC0_NEW_CONSTBUF;
 599 }
 600
 601 /* =============================================================================
 602  */
 603
 604 static void
 605 nvc0_set_blend_color(struct pipe_context *pipe,
 606                      const struct pipe_blend_color *bcol)
 607 {
 608     struct nvc0_context *nvc0 = nvc0_context(pipe);
 609
 610     nvc0->blend_colour = *bcol;
 611     nvc0->dirty |= NVC0_NEW_BLEND_COLOUR;
 612 }
 613
 614 static void
 615 nvc0_set_stencil_ref(struct pipe_context *pipe,
 616                      const struct pipe_stencil_ref *sr)
 617 {
 618     struct nvc0_context *nvc0 = nvc0_context(pipe);
 619
 620     nvc0->stencil_ref = *sr;
 621     nvc0->dirty |= NVC0_NEW_STENCIL_REF;
 622 }
 623
 624 static void
 625 nvc0_set_clip_state(struct pipe_context *pipe,
 626                     const struct pipe_clip_state *clip)
 627 {
 628     struct nvc0_context *nvc0 = nvc0_context(pipe);
 629     const unsigned size = clip->nr * sizeof(clip->ucp[0]);
 630
 631     memcpy(&nvc0->clip.ucp[0][0], &clip->ucp[0][0], size);
 632     nvc0->clip.nr = clip->nr;
 633
 634     nvc0->clip.depth_clamp = clip->depth_clamp;
 635
 636     nvc0->dirty |= NVC0_NEW_CLIP;
 637 }
 638
 639 static void
 640 nvc0_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
 641 {
 642     struct nvc0_context *nvc0 = nvc0_context(pipe);
 643
 644     nvc0->sample_mask = sample_mask;
 645     nvc0->dirty |= NVC0_NEW_SAMPLE_MASK;
 646 }
 647
 648
 649 static void
 650 nvc0_set_framebuffer_state(struct pipe_context *pipe,
 651                            const struct pipe_framebuffer_state *fb)
 652 {
 653     struct nvc0_context *nvc0 = nvc0_context(pipe);
 654
 655     nvc0->framebuffer = *fb;
 656     nvc0->dirty |= NVC0_NEW_FRAMEBUFFER;
 657 }
 658
 659 static void
 660 nvc0_set_polygon_stipple(struct pipe_context *pipe,
 661                          const struct pipe_poly_stipple *stipple)
 662 {
 663     struct nvc0_context *nvc0 = nvc0_context(pipe);
 664
 665     nvc0->stipple = *stipple;
 666     nvc0->dirty |= NVC0_NEW_STIPPLE;
 667 }
 668
 669 static void
 670 nvc0_set_scissor_state(struct pipe_context *pipe,
 671                        const struct pipe_scissor_state *scissor)
 672 {
 673     struct nvc0_context *nvc0 = nvc0_context(pipe);
 674
 675     nvc0->scissor = *scissor;
 676     nvc0->dirty |= NVC0_NEW_SCISSOR;
 677 }
 678
 679 static void
 680 nvc0_set_viewport_state(struct pipe_context *pipe,
 681                         const struct pipe_viewport_state *vpt)
 682 {
 683     struct nvc0_context *nvc0 = nvc0_context(pipe);
 684
 685     nvc0->viewport = *vpt;
 686     nvc0->dirty |= NVC0_NEW_VIEWPORT;
 687 }
 688
 689 static void
 690 nvc0_set_vertex_buffers(struct pipe_context *pipe,
 691                         unsigned count,
 692                         const struct pipe_vertex_buffer *vb)
 693 {
 694     struct nvc0_context *nvc0 = nvc0_context(pipe);
 695     unsigned i;
 696
 697     for (i = 0; i < count; ++i)
 698        pipe_resource_reference(&nvc0->vtxbuf[i].buffer, vb[i].buffer);
 699     for (; i < nvc0->num_vtxbufs; ++i)
 700        pipe_resource_reference(&nvc0->vtxbuf[i].buffer, NULL);
 701
 702     memcpy(nvc0->vtxbuf, vb, sizeof(*vb) * count);
 703     nvc0->num_vtxbufs = count;
 704
 705     nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_VERTEX);
 706
 707     nvc0->dirty |= NVC0_NEW_ARRAYS;
 708 }
 709
 710 static void
 711 nvc0_set_index_buffer(struct pipe_context *pipe,
 712                       const struct pipe_index_buffer *ib)
 713 {
 714     struct nvc0_context *nvc0 = nvc0_context(pipe);
 715
 716     if (ib) {
 717        pipe_resource_reference(&nvc0->idxbuf.buffer, ib->buffer);
 718
 719        memcpy(&nvc0->idxbuf, ib, sizeof(nvc0->idxbuf));
 720     } else {
 721        pipe_resource_reference(&nvc0->idxbuf.buffer, NULL);
 722     }
 723 }
 724
 725 static void
 726 nvc0_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
 727 {
 728     struct nvc0_context *nvc0 = nvc0_context(pipe);
 729
 730     nvc0->vertex = hwcso;
 731     nvc0->dirty |= NVC0_NEW_VERTEX;
 732 }
 733
 734 static void *
 735 nvc0_tfb_state_create(struct pipe_context *pipe,
 736                       const struct pipe_stream_output_state *pso)
 737 {
 738    struct nvc0_transform_feedback_state *so;
 739    int n = 0;
 740    int i, c, b;
 741
 742    so = MALLOC(sizeof(*so) + pso->num_outputs * 4 * sizeof(uint8_t));
 743    if (!so)
 744       return NULL;
 745
 746    for (b = 0; b < 4; ++b) {
 747       for (i = 0; i < pso->num_outputs; ++i) {
 748          if (pso->output_buffer[i] != b)
 749             continue;
 750          for (c = 0; c < 4; ++c) {
 751             if (!(pso->register_mask[i] & (1 << c)))
 752                continue;
 753             so->varying_count[b]++;
 754             so->varying_index[n++] = (pso->register_index[i] << 2) | c;
 755          }
 756       }
 757       so->stride[b] = so->varying_count[b] * 4;
 758    }
 759    if (pso->stride)
 760       so->stride[0] = pso->stride;
 761
 762    return so;
 763 }
 764
 765 static void
 766 nvc0_tfb_state_delete(struct pipe_context *pipe, void *hwcso)
 767 {
 768    FREE(hwcso);
 769 }
 770
 771 static void
 772 nvc0_tfb_state_bind(struct pipe_context *pipe, void *hwcso)
 773 {
 774    nvc0_context(pipe)->tfb = hwcso;
 775    nvc0_context(pipe)->dirty |= NVC0_NEW_TFB;
 776 }
 777
 778 static void
 779 nvc0_set_transform_feedback_buffers(struct pipe_context *pipe,
 780                                     struct pipe_resource **buffers,
 781                                     int *offsets,
 782                                     int num_buffers)
 783 {
 784    struct nvc0_context *nvc0 = nvc0_context(pipe);
 785    int i;
 786
 787    assert(num_buffers >= 0 && num_buffers <= 4); /* why signed ? */
 788
 789    for (i = 0; i < num_buffers; ++i) {
 790        assert(offsets[i] >= 0);
 791        nvc0->tfb_offset[i] = offsets[i];
 792        pipe_resource_reference(&nvc0->tfbbuf[i], buffers[i]);
 793    }
 794    for (; i < nvc0->num_tfbbufs; ++i)
 795       pipe_resource_reference(&nvc0->tfbbuf[i], NULL);
 796
 797    nvc0->num_tfbbufs = num_buffers;
 798
 799    nvc0->dirty |= NVC0_NEW_TFB_BUFFERS;
 800 }
 801
 802 void
 803 nvc0_init_state_functions(struct nvc0_context *nvc0)
 804 {
 805    struct pipe_context *pipe = &nvc0->base.pipe;
 806
 807    pipe->create_blend_state = nvc0_blend_state_create;
 808    pipe->bind_blend_state = nvc0_blend_state_bind;
 809    pipe->delete_blend_state = nvc0_blend_state_delete;
 810
 811    pipe->create_rasterizer_state = nvc0_rasterizer_state_create;
 812    pipe->bind_rasterizer_state = nvc0_rasterizer_state_bind;
 813    pipe->delete_rasterizer_state = nvc0_rasterizer_state_delete;
 814
 815    pipe->create_depth_stencil_alpha_state = nvc0_zsa_state_create;
 816    pipe->bind_depth_stencil_alpha_state = nvc0_zsa_state_bind;
 817    pipe->delete_depth_stencil_alpha_state = nvc0_zsa_state_delete;
 818
 819    pipe->create_sampler_state = nv50_sampler_state_create;
 820    pipe->delete_sampler_state = nvc0_sampler_state_delete;
 821    pipe->bind_vertex_sampler_states   = nvc0_vp_sampler_states_bind;
 822    pipe->bind_fragment_sampler_states = nvc0_fp_sampler_states_bind;
 823    pipe->bind_geometry_sampler_states = nvc0_gp_sampler_states_bind;
 824
 825    pipe->create_sampler_view = nvc0_create_sampler_view;
 826    pipe->sampler_view_destroy = nvc0_sampler_view_destroy;
 827    pipe->set_vertex_sampler_views   = nvc0_vp_set_sampler_views;
 828    pipe->set_fragment_sampler_views = nvc0_fp_set_sampler_views;
 829    pipe->set_geometry_sampler_views = nvc0_gp_set_sampler_views;
 830
 831    pipe->create_vs_state = nvc0_vp_state_create;
 832    pipe->create_fs_state = nvc0_fp_state_create;
 833    pipe->create_gs_state = nvc0_gp_state_create;
 834    pipe->bind_vs_state = nvc0_vp_state_bind;
 835    pipe->bind_fs_state = nvc0_fp_state_bind;
 836    pipe->bind_gs_state = nvc0_gp_state_bind;
 837    pipe->delete_vs_state = nvc0_sp_state_delete;
 838    pipe->delete_fs_state = nvc0_sp_state_delete;
 839    pipe->delete_gs_state = nvc0_sp_state_delete;
 840
 841    pipe->set_blend_color = nvc0_set_blend_color;
 842    pipe->set_stencil_ref = nvc0_set_stencil_ref;
 843    pipe->set_clip_state = nvc0_set_clip_state;
 844    pipe->set_sample_mask = nvc0_set_sample_mask;
 845    pipe->set_constant_buffer = nvc0_set_constant_buffer;
 846    pipe->set_framebuffer_state = nvc0_set_framebuffer_state;
 847    pipe->set_polygon_stipple = nvc0_set_polygon_stipple;
 848    pipe->set_scissor_state = nvc0_set_scissor_state;
 849    pipe->set_viewport_state = nvc0_set_viewport_state;
 850
 851    pipe->create_vertex_elements_state = nvc0_vertex_state_create;
 852    pipe->delete_vertex_elements_state = nvc0_vertex_state_delete;
 853    pipe->bind_vertex_elements_state = nvc0_vertex_state_bind;
 854
 855    pipe->set_vertex_buffers = nvc0_set_vertex_buffers;
 856    pipe->set_index_buffer = nvc0_set_index_buffer;
 857
 858    pipe->create_stream_output_state = nvc0_tfb_state_create;
 859    pipe->delete_stream_output_state = nvc0_tfb_state_delete;
 860    pipe->bind_stream_output_state = nvc0_tfb_state_bind;
 861    pipe->set_stream_output_buffers = nvc0_set_transform_feedback_buffers;
 862
 863    pipe->redefine_user_buffer = u_default_redefine_user_buffer;
 864 }
 865