src/gallium/drivers/nvc0/nvc0_state.c

   1 /*
   2  * Copyright 2010 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "pipe/p_defines.h"
  24 #include "util/u_inlines.h"
  25 #include "util/u_transfer.h"
  26
  27 #include "tgsi/tgsi_parse.h"
  28
  29 #include "nvc0_stateobj.h"
  30 #include "nvc0_context.h"
  31
  32 #include "nvc0_3d.xml.h"
  33 #include "nv50/nv50_texture.xml.h"
  34
  35 #include "nouveau/nouveau_gldefs.h"
  36
  37 static INLINE uint32_t
  38 nvc0_colormask(unsigned mask)
  39 {
  40     uint32_t ret = 0;
  41
  42     if (mask & PIPE_MASK_R)
  43         ret |= 0x0001;
  44     if (mask & PIPE_MASK_G)
  45         ret |= 0x0010;
  46     if (mask & PIPE_MASK_B)
  47         ret |= 0x0100;
  48     if (mask & PIPE_MASK_A)
  49         ret |= 0x1000;
  50
  51     return ret;
  52 }
  53
  54 #define NVC0_BLEND_FACTOR_CASE(a, b) \
  55    case PIPE_BLENDFACTOR_##a: return NV50_3D_BLEND_FACTOR_##b
  56
  57 static INLINE uint32_t
  58 nvc0_blend_fac(unsigned factor)
  59 {
  60    switch (factor) {
  61    NVC0_BLEND_FACTOR_CASE(ONE, ONE);
  62    NVC0_BLEND_FACTOR_CASE(SRC_COLOR, SRC_COLOR);
  63    NVC0_BLEND_FACTOR_CASE(SRC_ALPHA, SRC_ALPHA);
  64    NVC0_BLEND_FACTOR_CASE(DST_ALPHA, DST_ALPHA);
  65    NVC0_BLEND_FACTOR_CASE(DST_COLOR, DST_COLOR);
  66    NVC0_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE, SRC_ALPHA_SATURATE);
  67    NVC0_BLEND_FACTOR_CASE(CONST_COLOR, CONSTANT_COLOR);
  68    NVC0_BLEND_FACTOR_CASE(CONST_ALPHA, CONSTANT_ALPHA);
  69    NVC0_BLEND_FACTOR_CASE(SRC1_COLOR, SRC1_COLOR);
  70    NVC0_BLEND_FACTOR_CASE(SRC1_ALPHA, SRC1_ALPHA);
  71    NVC0_BLEND_FACTOR_CASE(ZERO, ZERO);
  72    NVC0_BLEND_FACTOR_CASE(INV_SRC_COLOR, ONE_MINUS_SRC_COLOR);
  73    NVC0_BLEND_FACTOR_CASE(INV_SRC_ALPHA, ONE_MINUS_SRC_ALPHA);
  74    NVC0_BLEND_FACTOR_CASE(INV_DST_ALPHA, ONE_MINUS_DST_ALPHA);
  75    NVC0_BLEND_FACTOR_CASE(INV_DST_COLOR, ONE_MINUS_DST_COLOR);
  76    NVC0_BLEND_FACTOR_CASE(INV_CONST_COLOR, ONE_MINUS_CONSTANT_COLOR);
  77    NVC0_BLEND_FACTOR_CASE(INV_CONST_ALPHA, ONE_MINUS_CONSTANT_ALPHA);
  78    NVC0_BLEND_FACTOR_CASE(INV_SRC1_COLOR, ONE_MINUS_SRC1_COLOR);
  79    NVC0_BLEND_FACTOR_CASE(INV_SRC1_ALPHA, ONE_MINUS_SRC1_ALPHA);
  80    default:
  81       return NV50_3D_BLEND_FACTOR_ZERO;
  82    }
  83 }
  84
  85 static void *
  86 nvc0_blend_state_create(struct pipe_context *pipe,
  87                         const struct pipe_blend_state *cso)
  88 {
  89     struct nvc0_blend_stateobj *so = CALLOC_STRUCT(nvc0_blend_stateobj);
  90     int i;
  91
  92     so->pipe = *cso;
  93
  94     SB_IMMED_3D(so, BLEND_INDEPENDENT, cso->independent_blend_enable);
  95
  96     if (!cso->logicop_enable)
  97        SB_IMMED_3D(so, LOGIC_OP_ENABLE, 0);
  98
  99     if (cso->logicop_enable) {
 100        SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2);
 101        SB_DATA    (so, 1);
 102        SB_DATA    (so, nvgl_logicop_func(cso->logicop_func));
 103
 104        SB_IMMED_3D(so, BLEND_ENABLES, 0);
 105     } else
 106     if (!cso->independent_blend_enable) {
 107         SB_IMMED_3D(so, BLEND_ENABLES, cso->rt[0].blend_enable ? 0xff : 0);
 108
 109         if (cso->rt[0].blend_enable) {
 110             SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5);
 111             SB_DATA    (so, nvgl_blend_eqn(cso->rt[0].rgb_func));
 112             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].rgb_src_factor));
 113             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].rgb_dst_factor));
 114             SB_DATA    (so, nvgl_blend_eqn(cso->rt[0].alpha_func));
 115             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].alpha_src_factor));
 116             SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1);
 117             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].alpha_dst_factor));
 118         }
 119
 120         SB_IMMED_3D(so, COLOR_MASK_COMMON, 1);
 121         SB_BEGIN_3D(so, COLOR_MASK(0), 1);
 122         SB_DATA    (so, nvc0_colormask(cso->rt[0].colormask));
 123     } else {
 124         uint8_t en = 0;
 125
 126         for (i = 0; i < 8; ++i) {
 127             if (!cso->rt[i].blend_enable)
 128                 continue;
 129             en |= 1 << i;
 130
 131             SB_BEGIN_3D(so, IBLEND_EQUATION_RGB(i), 6);
 132             SB_DATA    (so, nvgl_blend_eqn(cso->rt[i].rgb_func));
 133             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].rgb_src_factor));
 134             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].rgb_dst_factor));
 135             SB_DATA    (so, nvgl_blend_eqn(cso->rt[i].alpha_func));
 136             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].alpha_src_factor));
 137             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].alpha_dst_factor));
 138         }
 139         SB_IMMED_3D(so, BLEND_ENABLES, en);
 140
 141         SB_IMMED_3D(so, COLOR_MASK_COMMON, 0);
 142         SB_BEGIN_3D(so, COLOR_MASK(0), 8);
 143         for (i = 0; i < 8; ++i)
 144             SB_DATA(so, nvc0_colormask(cso->rt[i].colormask));
 145     }
 146
 147     assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 148     return so;
 149 }
 150
 151 static void
 152 nvc0_blend_state_bind(struct pipe_context *pipe, void *hwcso)
 153 {
 154     struct nvc0_context *nvc0 = nvc0_context(pipe);
 155
 156     nvc0->blend = hwcso;
 157     nvc0->dirty |= NVC0_NEW_BLEND;
 158 }
 159
 160 static void
 161 nvc0_blend_state_delete(struct pipe_context *pipe, void *hwcso)
 162 {
 163     FREE(hwcso);
 164 }
 165
 166 /* NOTE: ignoring line_last_pixel, using FALSE (set on screen init) */
 167 static void *
 168 nvc0_rasterizer_state_create(struct pipe_context *pipe,
 169                              const struct pipe_rasterizer_state *cso)
 170 {
 171     struct nvc0_rasterizer_stateobj *so;
 172     uint32_t reg;
 173
 174     so = CALLOC_STRUCT(nvc0_rasterizer_stateobj);
 175     if (!so)
 176         return NULL;
 177     so->pipe = *cso;
 178
 179     /* Scissor enables are handled in scissor state, we will not want to
 180      * always emit 16 commands, one for each scissor rectangle, here.
 181      */
 182
 183     SB_BEGIN_3D(so, SHADE_MODEL, 1);
 184     SB_DATA    (so, cso->flatshade ? NVC0_3D_SHADE_MODEL_FLAT :
 185                                      NVC0_3D_SHADE_MODEL_SMOOTH);
 186     SB_IMMED_3D(so, PROVOKING_VERTEX_LAST, !cso->flatshade_first);
 187     SB_IMMED_3D(so, VERTEX_TWO_SIDE_ENABLE, cso->light_twoside);
 188
 189     SB_IMMED_3D(so, VERT_COLOR_CLAMP_EN, cso->clamp_vertex_color);
 190     SB_BEGIN_3D(so, FRAG_COLOR_CLAMP_EN, 1);
 191     SB_DATA    (so, cso->clamp_fragment_color ? 0x11111111 : 0x00000000);
 192
 193     SB_IMMED_3D(so, LINE_SMOOTH_ENABLE, cso->line_smooth);
 194     if (cso->line_smooth)
 195        SB_BEGIN_3D(so, LINE_WIDTH_SMOOTH, 1);
 196     else
 197        SB_BEGIN_3D(so, LINE_WIDTH_ALIASED, 1);
 198     SB_DATA    (so, fui(cso->line_width));
 199
 200     SB_IMMED_3D(so, LINE_STIPPLE_ENABLE, cso->line_stipple_enable);
 201     if (cso->line_stipple_enable) {
 202         SB_BEGIN_3D(so, LINE_STIPPLE_PATTERN, 1);
 203         SB_DATA    (so, (cso->line_stipple_pattern << 8) |
 204                          cso->line_stipple_factor);
 205
 206     }
 207
 208     SB_IMMED_3D(so, VP_POINT_SIZE_EN, cso->point_size_per_vertex);
 209     if (!cso->point_size_per_vertex) {
 210        SB_BEGIN_3D(so, POINT_SIZE, 1);
 211        SB_DATA    (so, fui(cso->point_size));
 212     }
 213
 214     reg = (cso->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT) ?
 215        NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_UPPER_LEFT :
 216        NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_LOWER_LEFT;
 217
 218     SB_BEGIN_3D(so, POINT_COORD_REPLACE, 1);
 219     SB_DATA    (so, ((cso->sprite_coord_enable & 0xff) << 3) | reg);
 220     SB_IMMED_3D(so, POINT_SPRITE_ENABLE, cso->point_quad_rasterization);
 221     SB_IMMED_3D(so, POINT_SMOOTH_ENABLE, cso->point_smooth);
 222
 223     SB_BEGIN_3D(so, POLYGON_MODE_FRONT, 1);
 224     SB_DATA    (so, nvgl_polygon_mode(cso->fill_front));
 225     SB_BEGIN_3D(so, POLYGON_MODE_BACK, 1);
 226     SB_DATA    (so, nvgl_polygon_mode(cso->fill_back));
 227     SB_IMMED_3D(so, POLYGON_SMOOTH_ENABLE, cso->poly_smooth);
 228
 229     SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3);
 230     SB_DATA    (so, cso->cull_face != PIPE_FACE_NONE);
 231     SB_DATA    (so, cso->front_ccw ? NVC0_3D_FRONT_FACE_CCW :
 232                                      NVC0_3D_FRONT_FACE_CW);
 233     switch (cso->cull_face) {
 234     case PIPE_FACE_FRONT_AND_BACK:
 235        SB_DATA(so, NVC0_3D_CULL_FACE_FRONT_AND_BACK);
 236        break;
 237     case PIPE_FACE_FRONT:
 238        SB_DATA(so, NVC0_3D_CULL_FACE_FRONT);
 239        break;
 240     case PIPE_FACE_BACK:
 241     default:
 242        SB_DATA(so, NVC0_3D_CULL_FACE_BACK);
 243        break;
 244     }
 245
 246     SB_IMMED_3D(so, POLYGON_STIPPLE_ENABLE, cso->poly_stipple_enable);
 247     SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3);
 248     SB_DATA    (so, cso->offset_point);
 249     SB_DATA    (so, cso->offset_line);
 250     SB_DATA    (so, cso->offset_tri);
 251
 252     if (cso->offset_point || cso->offset_line || cso->offset_tri) {
 253         SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1);
 254         SB_DATA    (so, fui(cso->offset_scale));
 255         SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1);
 256         SB_DATA    (so, fui(cso->offset_units * 2.0f));
 257     }
 258
 259     assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 260     return (void *)so;
 261 }
 262
 263 static void
 264 nvc0_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
 265 {
 266    struct nvc0_context *nvc0 = nvc0_context(pipe);
 267
 268    nvc0->rast = hwcso;
 269    nvc0->dirty |= NVC0_NEW_RASTERIZER;
 270 }
 271
 272 static void
 273 nvc0_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
 274 {
 275    FREE(hwcso);
 276 }
 277
 278 static void *
 279 nvc0_zsa_state_create(struct pipe_context *pipe,
 280                       const struct pipe_depth_stencil_alpha_state *cso)
 281 {
 282    struct nvc0_zsa_stateobj *so = CALLOC_STRUCT(nvc0_zsa_stateobj);
 283
 284    so->pipe = *cso;
 285
 286    SB_IMMED_3D(so, DEPTH_TEST_ENABLE, cso->depth.enabled);
 287    if (cso->depth.enabled) {
 288       SB_IMMED_3D(so, DEPTH_WRITE_ENABLE, cso->depth.writemask);
 289       SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
 290       SB_DATA    (so, nvgl_comparison_op(cso->depth.func));
 291    }
 292
 293    if (cso->stencil[0].enabled) {
 294       SB_BEGIN_3D(so, STENCIL_ENABLE, 5);
 295       SB_DATA    (so, 1);
 296       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].fail_op));
 297       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
 298       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
 299       SB_DATA    (so, nvgl_comparison_op(cso->stencil[0].func));
 300       SB_BEGIN_3D(so, STENCIL_FRONT_FUNC_MASK, 2);
 301       SB_DATA    (so, cso->stencil[0].valuemask);
 302       SB_DATA    (so, cso->stencil[0].writemask);
 303    } else {
 304       SB_IMMED_3D(so, STENCIL_ENABLE, 0);
 305    }
 306
 307    if (cso->stencil[1].enabled) {
 308       assert(cso->stencil[0].enabled);
 309       SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5);
 310       SB_DATA    (so, 1);
 311       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].fail_op));
 312       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
 313       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
 314       SB_DATA    (so, nvgl_comparison_op(cso->stencil[1].func));
 315       SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2);
 316       SB_DATA    (so, cso->stencil[1].writemask);
 317       SB_DATA    (so, cso->stencil[1].valuemask);
 318    } else
 319    if (cso->stencil[0].enabled) {
 320       SB_IMMED_3D(so, STENCIL_TWO_SIDE_ENABLE, 0);
 321    }
 322
 323    SB_IMMED_3D(so, ALPHA_TEST_ENABLE, cso->alpha.enabled);
 324    if (cso->alpha.enabled) {
 325       SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
 326       SB_DATA    (so, fui(cso->alpha.ref_value));
 327       SB_DATA    (so, nvgl_comparison_op(cso->alpha.func));
 328    }
 329
 330    assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 331    return (void *)so;
 332 }
 333
 334 static void
 335 nvc0_zsa_state_bind(struct pipe_context *pipe, void *hwcso)
 336 {
 337    struct nvc0_context *nvc0 = nvc0_context(pipe);
 338
 339    nvc0->zsa = hwcso;
 340    nvc0->dirty |= NVC0_NEW_ZSA;
 341 }
 342
 343 static void
 344 nvc0_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
 345 {
 346    FREE(hwcso);
 347 }
 348
 349 /* ====================== SAMPLERS AND TEXTURES ================================
 350  */
 351
 352 #define NV50_TSC_WRAP_CASE(n) \
 353     case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
 354
 355 static INLINE unsigned
 356 nv50_tsc_wrap_mode(unsigned wrap)
 357 {
 358    switch (wrap) {
 359    NV50_TSC_WRAP_CASE(REPEAT);
 360    NV50_TSC_WRAP_CASE(MIRROR_REPEAT);
 361    NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE);
 362    NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER);
 363    NV50_TSC_WRAP_CASE(CLAMP);
 364    NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE);
 365    NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER);
 366    NV50_TSC_WRAP_CASE(MIRROR_CLAMP);
 367    default:
 368        NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
 369        return NV50_TSC_WRAP_REPEAT;
 370    }
 371 }
 372
 373 static void
 374 nvc0_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
 375 {
 376    unsigned s, i;
 377
 378    for (s = 0; s < 5; ++s)
 379       for (i = 0; i < nvc0_context(pipe)->num_samplers[s]; ++i)
 380          if (nvc0_context(pipe)->samplers[s][i] == hwcso)
 381             nvc0_context(pipe)->samplers[s][i] = NULL;
 382
 383    nvc0_screen_tsc_free(nvc0_context(pipe)->screen, nv50_tsc_entry(hwcso));
 384
 385    FREE(hwcso);
 386 }
 387
 388 static INLINE void
 389 nvc0_stage_sampler_states_bind(struct nvc0_context *nvc0, int s,
 390                                unsigned nr, void **hwcso)
 391 {
 392    unsigned i;
 393
 394    for (i = 0; i < nr; ++i) {
 395       struct nv50_tsc_entry *old = nvc0->samplers[s][i];
 396
 397       nvc0->samplers[s][i] = nv50_tsc_entry(hwcso[i]);
 398       if (old)
 399          nvc0_screen_tsc_unlock(nvc0->screen, old);
 400    }
 401    for (; i < nvc0->num_samplers[s]; ++i)
 402       if (nvc0->samplers[s][i])
 403          nvc0_screen_tsc_unlock(nvc0->screen, nvc0->samplers[s][i]);
 404
 405    nvc0->num_samplers[s] = nr;
 406
 407    nvc0->dirty |= NVC0_NEW_SAMPLERS;
 408 }
 409
 410 static void
 411 nvc0_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 412 {
 413    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 0, nr, s);
 414 }
 415
 416 static void
 417 nvc0_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 418 {
 419    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 4, nr, s);
 420 }
 421
 422 static void
 423 nvc0_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 424 {
 425    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 3, nr, s);
 426 }
 427
 428 /* NOTE: only called when not referenced anywhere, won't be bound */
 429 static void
 430 nvc0_sampler_view_destroy(struct pipe_context *pipe,
 431                           struct pipe_sampler_view *view)
 432 {
 433    pipe_resource_reference(&view->texture, NULL);
 434
 435    nvc0_screen_tic_free(nvc0_context(pipe)->screen, nv50_tic_entry(view));
 436
 437    FREE(nv50_tic_entry(view));
 438 }
 439
 440 static INLINE void
 441 nvc0_stage_set_sampler_views(struct nvc0_context *nvc0, int s,
 442                              unsigned nr,
 443                              struct pipe_sampler_view **views)
 444 {
 445    unsigned i;
 446
 447    for (i = 0; i < nr; ++i) {
 448       struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]);
 449       if (old)
 450          nvc0_screen_tic_unlock(nvc0->screen, old);
 451
 452       pipe_sampler_view_reference(&nvc0->textures[s][i], views[i]);
 453    }
 454
 455    for (i = nr; i < nvc0->num_textures[s]; ++i) {
 456       struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]);
 457       if (!old)
 458          continue;
 459       nvc0_screen_tic_unlock(nvc0->screen, old);
 460
 461       pipe_sampler_view_reference(&nvc0->textures[s][i], NULL);
 462    }
 463
 464    nvc0->num_textures[s] = nr;
 465
 466    nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_TEXTURES);
 467
 468    nvc0->dirty |= NVC0_NEW_TEXTURES;
 469 }
 470
 471 static void
 472 nvc0_vp_set_sampler_views(struct pipe_context *pipe,
 473                           unsigned nr,
 474                           struct pipe_sampler_view **views)
 475 {
 476    nvc0_stage_set_sampler_views(nvc0_context(pipe), 0, nr, views);
 477 }
 478
 479 static void
 480 nvc0_fp_set_sampler_views(struct pipe_context *pipe,
 481                           unsigned nr,
 482                           struct pipe_sampler_view **views)
 483 {
 484    nvc0_stage_set_sampler_views(nvc0_context(pipe), 4, nr, views);
 485 }
 486
 487 static void
 488 nvc0_gp_set_sampler_views(struct pipe_context *pipe,
 489                           unsigned nr,
 490                           struct pipe_sampler_view **views)
 491 {
 492    nvc0_stage_set_sampler_views(nvc0_context(pipe), 3, nr, views);
 493 }
 494
 495 /* ============================= SHADERS =======================================
 496  */
 497
 498 static void *
 499 nvc0_sp_state_create(struct pipe_context *pipe,
 500                      const struct pipe_shader_state *cso, unsigned type)
 501 {
 502    struct nvc0_program *prog;
 503
 504    prog = CALLOC_STRUCT(nvc0_program);
 505    if (!prog)
 506       return NULL;
 507
 508    prog->type = type;
 509    prog->pipe.tokens = tgsi_dup_tokens(cso->tokens);
 510
 511    return (void *)prog;
 512 }
 513
 514 static void
 515 nvc0_sp_state_delete(struct pipe_context *pipe, void *hwcso)
 516 {
 517    struct nvc0_program *prog = (struct nvc0_program *)hwcso;
 518
 519    nvc0_program_destroy(nvc0_context(pipe), prog);
 520
 521    FREE((void *)prog->pipe.tokens);
 522    FREE(prog);
 523 }
 524
 525 static void *
 526 nvc0_vp_state_create(struct pipe_context *pipe,
 527                      const struct pipe_shader_state *cso)
 528 {
 529    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
 530 }
 531
 532 static void
 533 nvc0_vp_state_bind(struct pipe_context *pipe, void *hwcso)
 534 {
 535     struct nvc0_context *nvc0 = nvc0_context(pipe);
 536
 537     nvc0->vertprog = hwcso;
 538     nvc0->dirty |= NVC0_NEW_VERTPROG;
 539 }
 540
 541 static void *
 542 nvc0_fp_state_create(struct pipe_context *pipe,
 543                      const struct pipe_shader_state *cso)
 544 {
 545    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
 546 }
 547
 548 static void
 549 nvc0_fp_state_bind(struct pipe_context *pipe, void *hwcso)
 550 {
 551     struct nvc0_context *nvc0 = nvc0_context(pipe);
 552
 553     nvc0->fragprog = hwcso;
 554     nvc0->dirty |= NVC0_NEW_FRAGPROG;
 555 }
 556
 557 static void *
 558 nvc0_gp_state_create(struct pipe_context *pipe,
 559                      const struct pipe_shader_state *cso)
 560 {
 561    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY);
 562 }
 563
 564 static void
 565 nvc0_gp_state_bind(struct pipe_context *pipe, void *hwcso)
 566 {
 567     struct nvc0_context *nvc0 = nvc0_context(pipe);
 568
 569     nvc0->gmtyprog = hwcso;
 570     nvc0->dirty |= NVC0_NEW_GMTYPROG;
 571 }
 572
 573 static void
 574 nvc0_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
 575                          struct pipe_resource *res)
 576 {
 577    struct nvc0_context *nvc0 = nvc0_context(pipe);
 578
 579    switch (shader) {
 580    case PIPE_SHADER_VERTEX: shader = 0; break;
 581       /*
 582    case PIPE_SHADER_TESSELLATION_CONTROL: shader = 1; break;
 583    case PIPE_SHADER_TESSELLATION_EVALUATION: shader = 2; break;
 584       */
 585    case PIPE_SHADER_GEOMETRY: shader = 3; break;
 586    case PIPE_SHADER_FRAGMENT: shader = 4; break;
 587    default:
 588       assert(0);
 589       break;
 590    }
 591
 592    if (nvc0->constbuf[shader][index])
 593       nvc0_bufctx_del_resident(nvc0, NVC0_BUFCTX_CONSTANT,
 594                                nv04_resource(nvc0->constbuf[shader][index]));
 595
 596    pipe_resource_reference(&nvc0->constbuf[shader][index], res);
 597
 598    nvc0->constbuf_dirty[shader] |= 1 << index;
 599
 600    nvc0->dirty |= NVC0_NEW_CONSTBUF;
 601 }
 602
 603 /* =============================================================================
 604  */
 605
 606 static void
 607 nvc0_set_blend_color(struct pipe_context *pipe,
 608                      const struct pipe_blend_color *bcol)
 609 {
 610     struct nvc0_context *nvc0 = nvc0_context(pipe);
 611
 612     nvc0->blend_colour = *bcol;
 613     nvc0->dirty |= NVC0_NEW_BLEND_COLOUR;
 614 }
 615
 616 static void
 617 nvc0_set_stencil_ref(struct pipe_context *pipe,
 618                      const struct pipe_stencil_ref *sr)
 619 {
 620     struct nvc0_context *nvc0 = nvc0_context(pipe);
 621
 622     nvc0->stencil_ref = *sr;
 623     nvc0->dirty |= NVC0_NEW_STENCIL_REF;
 624 }
 625
 626 static void
 627 nvc0_set_clip_state(struct pipe_context *pipe,
 628                     const struct pipe_clip_state *clip)
 629 {
 630     struct nvc0_context *nvc0 = nvc0_context(pipe);
 631     const unsigned size = clip->nr * sizeof(clip->ucp[0]);
 632
 633     memcpy(&nvc0->clip.ucp[0][0], &clip->ucp[0][0], size);
 634     nvc0->clip.nr = clip->nr;
 635
 636     nvc0->clip.depth_clamp = clip->depth_clamp;
 637
 638     nvc0->dirty |= NVC0_NEW_CLIP;
 639 }
 640
 641 static void
 642 nvc0_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
 643 {
 644     struct nvc0_context *nvc0 = nvc0_context(pipe);
 645
 646     nvc0->sample_mask = sample_mask;
 647     nvc0->dirty |= NVC0_NEW_SAMPLE_MASK;
 648 }
 649
 650
 651 static void
 652 nvc0_set_framebuffer_state(struct pipe_context *pipe,
 653                            const struct pipe_framebuffer_state *fb)
 654 {
 655     struct nvc0_context *nvc0 = nvc0_context(pipe);
 656
 657     nvc0->framebuffer = *fb;
 658     nvc0->dirty |= NVC0_NEW_FRAMEBUFFER;
 659 }
 660
 661 static void
 662 nvc0_set_polygon_stipple(struct pipe_context *pipe,
 663                          const struct pipe_poly_stipple *stipple)
 664 {
 665     struct nvc0_context *nvc0 = nvc0_context(pipe);
 666
 667     nvc0->stipple = *stipple;
 668     nvc0->dirty |= NVC0_NEW_STIPPLE;
 669 }
 670
 671 static void
 672 nvc0_set_scissor_state(struct pipe_context *pipe,
 673                        const struct pipe_scissor_state *scissor)
 674 {
 675     struct nvc0_context *nvc0 = nvc0_context(pipe);
 676
 677     nvc0->scissor = *scissor;
 678     nvc0->dirty |= NVC0_NEW_SCISSOR;
 679 }
 680
 681 static void
 682 nvc0_set_viewport_state(struct pipe_context *pipe,
 683                         const struct pipe_viewport_state *vpt)
 684 {
 685     struct nvc0_context *nvc0 = nvc0_context(pipe);
 686
 687     nvc0->viewport = *vpt;
 688     nvc0->dirty |= NVC0_NEW_VIEWPORT;
 689 }
 690
 691 static void
 692 nvc0_set_vertex_buffers(struct pipe_context *pipe,
 693                         unsigned count,
 694                         const struct pipe_vertex_buffer *vb)
 695 {
 696     struct nvc0_context *nvc0 = nvc0_context(pipe);
 697     unsigned i;
 698
 699     for (i = 0; i < count; ++i)
 700        pipe_resource_reference(&nvc0->vtxbuf[i].buffer, vb[i].buffer);
 701     for (; i < nvc0->num_vtxbufs; ++i)
 702        pipe_resource_reference(&nvc0->vtxbuf[i].buffer, NULL);
 703
 704     memcpy(nvc0->vtxbuf, vb, sizeof(*vb) * count);
 705     nvc0->num_vtxbufs = count;
 706
 707     nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_VERTEX);
 708
 709     nvc0->dirty |= NVC0_NEW_ARRAYS;
 710 }
 711
 712 static void
 713 nvc0_set_index_buffer(struct pipe_context *pipe,
 714                       const struct pipe_index_buffer *ib)
 715 {
 716     struct nvc0_context *nvc0 = nvc0_context(pipe);
 717
 718     if (ib) {
 719        pipe_resource_reference(&nvc0->idxbuf.buffer, ib->buffer);
 720
 721        memcpy(&nvc0->idxbuf, ib, sizeof(nvc0->idxbuf));
 722     } else {
 723        pipe_resource_reference(&nvc0->idxbuf.buffer, NULL);
 724     }
 725 }
 726
 727 static void
 728 nvc0_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
 729 {
 730     struct nvc0_context *nvc0 = nvc0_context(pipe);
 731
 732     nvc0->vertex = hwcso;
 733     nvc0->dirty |= NVC0_NEW_VERTEX;
 734 }
 735
 736 static void *
 737 nvc0_tfb_state_create(struct pipe_context *pipe,
 738                       const struct pipe_stream_output_state *pso)
 739 {
 740    struct nvc0_transform_feedback_state *so;
 741    int n = 0;
 742    int i, c, b;
 743
 744    so = MALLOC(sizeof(*so) + pso->num_outputs * 4 * sizeof(uint8_t));
 745    if (!so)
 746       return NULL;
 747
 748    for (b = 0; b < 4; ++b) {
 749       for (i = 0; i < pso->num_outputs; ++i) {
 750          if (pso->output_buffer[i] != b)
 751             continue;
 752          for (c = 0; c < 4; ++c) {
 753             if (!(pso->register_mask[i] & (1 << c)))
 754                continue;
 755             so->varying_count[b]++;
 756             so->varying_index[n++] = (pso->register_index[i] << 2) | c;
 757          }
 758       }
 759       so->stride[b] = so->varying_count[b] * 4;
 760    }
 761    if (pso->stride)
 762       so->stride[0] = pso->stride;
 763
 764    return so;
 765 }
 766
 767 static void
 768 nvc0_tfb_state_delete(struct pipe_context *pipe, void *hwcso)
 769 {
 770    FREE(hwcso);
 771 }
 772
 773 static void
 774 nvc0_tfb_state_bind(struct pipe_context *pipe, void *hwcso)
 775 {
 776    nvc0_context(pipe)->tfb = hwcso;
 777    nvc0_context(pipe)->dirty |= NVC0_NEW_TFB;
 778 }
 779
 780 static void
 781 nvc0_set_transform_feedback_buffers(struct pipe_context *pipe,
 782                                     struct pipe_resource **buffers,
 783                                     int *offsets,
 784                                     int num_buffers)
 785 {
 786    struct nvc0_context *nvc0 = nvc0_context(pipe);
 787    int i;
 788
 789    assert(num_buffers >= 0 && num_buffers <= 4); /* why signed ? */
 790
 791    for (i = 0; i < num_buffers; ++i) {
 792        assert(offsets[i] >= 0);
 793        nvc0->tfb_offset[i] = offsets[i];
 794        pipe_resource_reference(&nvc0->tfbbuf[i], buffers[i]);
 795    }
 796    for (; i < nvc0->num_tfbbufs; ++i)
 797       pipe_resource_reference(&nvc0->tfbbuf[i], NULL);
 798
 799    nvc0->num_tfbbufs = num_buffers;
 800
 801    nvc0->dirty |= NVC0_NEW_TFB_BUFFERS;
 802 }
 803
 804 void
 805 nvc0_init_state_functions(struct nvc0_context *nvc0)
 806 {
 807    struct pipe_context *pipe = &nvc0->base.pipe;
 808
 809    pipe->create_blend_state = nvc0_blend_state_create;
 810    pipe->bind_blend_state = nvc0_blend_state_bind;
 811    pipe->delete_blend_state = nvc0_blend_state_delete;
 812
 813    pipe->create_rasterizer_state = nvc0_rasterizer_state_create;
 814    pipe->bind_rasterizer_state = nvc0_rasterizer_state_bind;
 815    pipe->delete_rasterizer_state = nvc0_rasterizer_state_delete;
 816
 817    pipe->create_depth_stencil_alpha_state = nvc0_zsa_state_create;
 818    pipe->bind_depth_stencil_alpha_state = nvc0_zsa_state_bind;
 819    pipe->delete_depth_stencil_alpha_state = nvc0_zsa_state_delete;
 820
 821    pipe->create_sampler_state = nv50_sampler_state_create;
 822    pipe->delete_sampler_state = nvc0_sampler_state_delete;
 823    pipe->bind_vertex_sampler_states   = nvc0_vp_sampler_states_bind;
 824    pipe->bind_fragment_sampler_states = nvc0_fp_sampler_states_bind;
 825    pipe->bind_geometry_sampler_states = nvc0_gp_sampler_states_bind;
 826
 827    pipe->create_sampler_view = nvc0_create_sampler_view;
 828    pipe->sampler_view_destroy = nvc0_sampler_view_destroy;
 829    pipe->set_vertex_sampler_views   = nvc0_vp_set_sampler_views;
 830    pipe->set_fragment_sampler_views = nvc0_fp_set_sampler_views;
 831    pipe->set_geometry_sampler_views = nvc0_gp_set_sampler_views;
 832
 833    pipe->create_vs_state = nvc0_vp_state_create;
 834    pipe->create_fs_state = nvc0_fp_state_create;
 835    pipe->create_gs_state = nvc0_gp_state_create;
 836    pipe->bind_vs_state = nvc0_vp_state_bind;
 837    pipe->bind_fs_state = nvc0_fp_state_bind;
 838    pipe->bind_gs_state = nvc0_gp_state_bind;
 839    pipe->delete_vs_state = nvc0_sp_state_delete;
 840    pipe->delete_fs_state = nvc0_sp_state_delete;
 841    pipe->delete_gs_state = nvc0_sp_state_delete;
 842
 843    pipe->set_blend_color = nvc0_set_blend_color;
 844    pipe->set_stencil_ref = nvc0_set_stencil_ref;
 845    pipe->set_clip_state = nvc0_set_clip_state;
 846    pipe->set_sample_mask = nvc0_set_sample_mask;
 847    pipe->set_constant_buffer = nvc0_set_constant_buffer;
 848    pipe->set_framebuffer_state = nvc0_set_framebuffer_state;
 849    pipe->set_polygon_stipple = nvc0_set_polygon_stipple;
 850    pipe->set_scissor_state = nvc0_set_scissor_state;
 851    pipe->set_viewport_state = nvc0_set_viewport_state;
 852
 853    pipe->create_vertex_elements_state = nvc0_vertex_state_create;
 854    pipe->delete_vertex_elements_state = nvc0_vertex_state_delete;
 855    pipe->bind_vertex_elements_state = nvc0_vertex_state_bind;
 856
 857    pipe->set_vertex_buffers = nvc0_set_vertex_buffers;
 858    pipe->set_index_buffer = nvc0_set_index_buffer;
 859
 860    pipe->create_stream_output_state = nvc0_tfb_state_create;
 861    pipe->delete_stream_output_state = nvc0_tfb_state_delete;
 862    pipe->bind_stream_output_state = nvc0_tfb_state_bind;
 863    pipe->set_stream_output_buffers = nvc0_set_transform_feedback_buffers;
 864
 865    pipe->redefine_user_buffer = u_default_redefine_user_buffer;
 866 }
 867