src/gallium/drivers/nvc0/nvc0_surface.c

   1 /*
   2  * Copyright 2008 Ben Skeggs
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include <stdint.h>
  24
  25 #include "pipe/p_defines.h"
  26
  27 #include "util/u_inlines.h"
  28 #include "util/u_pack_color.h"
  29 #include "util/u_format.h"
  30
  31 #include "nvc0_context.h"
  32 #include "nvc0_resource.h"
  33
  34 #include "nv50_defs.xml.h"
  35
  36 /* return TRUE for formats that can be converted among each other by NVC0_2D */
  37 static INLINE boolean
  38 nvc0_2d_format_faithful(enum pipe_format format)
  39 {
  40    switch (format) {
  41    case PIPE_FORMAT_B8G8R8A8_UNORM:
  42    case PIPE_FORMAT_B8G8R8X8_UNORM:
  43    case PIPE_FORMAT_B8G8R8A8_SRGB:
  44    case PIPE_FORMAT_B8G8R8X8_SRGB:
  45    case PIPE_FORMAT_B5G6R5_UNORM:
  46    case PIPE_FORMAT_B5G5R5A1_UNORM:
  47    case PIPE_FORMAT_B10G10R10A2_UNORM:
  48    case PIPE_FORMAT_R8_UNORM:
  49    case PIPE_FORMAT_R32G32B32A32_FLOAT:
  50    case PIPE_FORMAT_R32G32B32_FLOAT:
  51       return TRUE;
  52    default:
  53       return FALSE;
  54    }
  55 }
  56
  57 static INLINE uint8_t
  58 nvc0_2d_format(enum pipe_format format)
  59 {
  60    uint8_t id = nvc0_format_table[format].rt;
  61
  62    /* Hardware values for color formats range from 0xc0 to 0xff,
  63     * but the 2D engine doesn't support all of them.
  64     */
  65    if ((id >= 0xc0) && (0xff0843e080608409ULL & (1ULL << (id - 0xc0))))
  66       return id;
  67
  68    switch (util_format_get_blocksize(format)) {
  69    case 1:
  70       return NV50_SURFACE_FORMAT_R8_UNORM;
  71    case 2:
  72       return NV50_SURFACE_FORMAT_R16_UNORM;
  73    case 4:
  74       return NV50_SURFACE_FORMAT_A8R8G8B8_UNORM;
  75    default:
  76       return 0;
  77    }
  78 }
  79
  80 static int
  81 nvc0_2d_texture_set(struct nouveau_channel *chan, int dst,
  82                     struct nvc0_miptree *mt, unsigned level, unsigned layer)
  83 {
  84    struct nouveau_bo *bo = mt->base.bo;
  85    uint32_t width, height, depth;
  86    uint32_t format;
  87    uint32_t mthd = dst ? NVC0_2D_DST_FORMAT : NVC0_2D_SRC_FORMAT;
  88    uint32_t flags = mt->base.domain | (dst ? NOUVEAU_BO_WR : NOUVEAU_BO_RD);
  89    uint32_t offset = mt->level[level].offset;
  90
  91    format = nvc0_2d_format(mt->base.base.format);
  92    if (!format) {
  93       NOUVEAU_ERR("invalid/unsupported surface format: %s\n",
  94                   util_format_name(mt->base.base.format));
  95       return 1;
  96    }
  97
  98    width = u_minify(mt->base.base.width0, level);
  99    height = u_minify(mt->base.base.height0, level);
 100
 101    offset = mt->level[level].offset;
 102    if (!mt->layout_3d) {
 103       offset += mt->layer_stride * layer;
 104       depth = 1;
 105       layer = 0;
 106    } else {
 107       depth = u_minify(mt->base.base.depth0, level);
 108    }
 109
 110    if (!(bo->tile_flags & NOUVEAU_BO_TILE_LAYOUT_MASK)) {
 111       BEGIN_RING(chan, RING_2D_(mthd), 2);
 112       OUT_RING  (chan, format);
 113       OUT_RING  (chan, 1);
 114       BEGIN_RING(chan, RING_2D_(mthd + 0x14), 5);
 115       OUT_RING  (chan, mt->level[level].pitch);
 116       OUT_RING  (chan, width);
 117       OUT_RING  (chan, height);
 118       OUT_RELOCh(chan, bo, offset, flags);
 119       OUT_RELOCl(chan, bo, offset, flags);
 120    } else {
 121       BEGIN_RING(chan, RING_2D_(mthd), 5);
 122       OUT_RING  (chan, format);
 123       OUT_RING  (chan, 0);
 124       OUT_RING  (chan, mt->level[level].tile_mode);
 125       OUT_RING  (chan, depth);
 126       OUT_RING  (chan, layer);
 127       BEGIN_RING(chan, RING_2D_(mthd + 0x18), 4);
 128       OUT_RING  (chan, width);
 129       OUT_RING  (chan, height);
 130       OUT_RELOCh(chan, bo, offset, flags);
 131       OUT_RELOCl(chan, bo, offset, flags);
 132    }
 133
 134 #if 0
 135    if (dst) {
 136       BEGIN_RING(chan, RING_2D_(NVC0_2D_CLIP_X), 4);
 137       OUT_RING  (chan, 0);
 138       OUT_RING  (chan, 0);
 139       OUT_RING  (chan, width);
 140       OUT_RING  (chan, height);
 141    }
 142 #endif
 143    return 0;
 144 }
 145
 146 static int
 147 nvc0_2d_texture_do_copy(struct nouveau_channel *chan,
 148                         struct nvc0_miptree *dst, unsigned dst_level,
 149                         unsigned dx, unsigned dy, unsigned dz,
 150                         struct nvc0_miptree *src, unsigned src_level,
 151                         unsigned sx, unsigned sy, unsigned sz,
 152                         unsigned w, unsigned h)
 153 {
 154    int ret;
 155
 156    ret = MARK_RING(chan, 2 * 16 + 32, 4);
 157    if (ret)
 158       return ret;
 159
 160    ret = nvc0_2d_texture_set(chan, 1, dst, dst_level, dz);
 161    if (ret)
 162       return ret;
 163
 164    ret = nvc0_2d_texture_set(chan, 0, src, src_level, sz);
 165    if (ret)
 166       return ret;
 167
 168    /* 0/1 = CENTER/CORNER, 10/00 = POINT/BILINEAR */
 169    BEGIN_RING(chan, RING_2D(BLIT_CONTROL), 1);
 170    OUT_RING  (chan, 0);
 171    BEGIN_RING(chan, RING_2D(BLIT_DST_X), 4);
 172    OUT_RING  (chan, dx);
 173    OUT_RING  (chan, dy);
 174    OUT_RING  (chan, w);
 175    OUT_RING  (chan, h);
 176    BEGIN_RING(chan, RING_2D(BLIT_DU_DX_FRACT), 4);
 177    OUT_RING  (chan, 0);
 178    OUT_RING  (chan, 1);
 179    OUT_RING  (chan, 0);
 180    OUT_RING  (chan, 1);
 181    BEGIN_RING(chan, RING_2D(BLIT_SRC_X_FRACT), 4);
 182    OUT_RING  (chan, 0);
 183    OUT_RING  (chan, sx);
 184    OUT_RING  (chan, 0);
 185    OUT_RING  (chan, sy);
 186
 187    return 0;
 188 }
 189
 190 static void
 191 nvc0_resource_copy_region(struct pipe_context *pipe,
 192                           struct pipe_resource *dst, unsigned dst_level,
 193                           unsigned dstx, unsigned dsty, unsigned dstz,
 194                           struct pipe_resource *src, unsigned src_level,
 195                           const struct pipe_box *src_box)
 196 {
 197    struct nvc0_screen *screen = nvc0_context(pipe)->screen;
 198    int ret;
 199    unsigned dst_layer = dstz, src_layer = src_box->z;
 200
 201    assert((src->format == dst->format) ||
 202           (nvc0_2d_format_faithful(src->format) &&
 203            nvc0_2d_format_faithful(dst->format)));
 204
 205    for (; dst_layer < dstz + src_box->depth; ++dst_layer, ++src_layer) {
 206       ret = nvc0_2d_texture_do_copy(screen->base.channel,
 207                                     nvc0_miptree(dst), dst_level,
 208                                     dstx, dsty, dst_layer,
 209                                     nvc0_miptree(src), src_level,
 210                                     src_box->x, src_box->y, src_layer,
 211                                     src_box->width, src_box->height);
 212       if (ret)
 213          return;
 214    }
 215 }
 216
 217 static void
 218 nvc0_clear_render_target(struct pipe_context *pipe,
 219                          struct pipe_surface *dst,
 220                          const float *rgba,
 221                          unsigned dstx, unsigned dsty,
 222                          unsigned width, unsigned height)
 223 {
 224         struct nvc0_context *nv50 = nvc0_context(pipe);
 225         struct nvc0_screen *screen = nv50->screen;
 226         struct nouveau_channel *chan = screen->base.channel;
 227         struct nvc0_miptree *mt = nvc0_miptree(dst->texture);
 228         struct nvc0_surface *sf = nvc0_surface(dst);
 229         struct nouveau_bo *bo = mt->base.bo;
 230
 231         BEGIN_RING(chan, RING_3D(CLEAR_COLOR(0)), 4);
 232         OUT_RINGf (chan, rgba[0]);
 233         OUT_RINGf (chan, rgba[1]);
 234         OUT_RINGf (chan, rgba[2]);
 235         OUT_RINGf (chan, rgba[3]);
 236
 237         if (MARK_RING(chan, 18, 2))
 238                 return;
 239
 240         BEGIN_RING(chan, RING_3D(RT_CONTROL), 1);
 241         OUT_RING  (chan, 1);
 242         BEGIN_RING(chan, RING_3D(RT_ADDRESS_HIGH(0)), 8);
 243         OUT_RELOCh(chan, bo, sf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 244         OUT_RELOCl(chan, bo, sf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 245         OUT_RING  (chan, sf->width);
 246         OUT_RING  (chan, sf->height);
 247         OUT_RING  (chan, nvc0_format_table[dst->format].rt);
 248         OUT_RING  (chan, mt->level[sf->base.u.tex.level].tile_mode);
 249         OUT_RING  (chan, 1);
 250         OUT_RING  (chan, 0);
 251
 252         /* NOTE: only works with D3D clear flag (5097/0x143c bit 4) */
 253
 254         BEGIN_RING(chan, RING_3D(VIEWPORT_HORIZ(0)), 2);
 255         OUT_RING  (chan, (width << 16) | dstx);
 256         OUT_RING  (chan, (height << 16) | dsty);
 257
 258         BEGIN_RING(chan, RING_3D(CLEAR_BUFFERS), 1);
 259         OUT_RING  (chan, 0x3c);
 260
 261         nv50->dirty |= NVC0_NEW_FRAMEBUFFER;
 262 }
 263
 264 static void
 265 nvc0_clear_depth_stencil(struct pipe_context *pipe,
 266                          struct pipe_surface *dst,
 267                          unsigned clear_flags,
 268                          double depth,
 269                          unsigned stencil,
 270                          unsigned dstx, unsigned dsty,
 271                          unsigned width, unsigned height)
 272 {
 273         struct nvc0_context *nv50 = nvc0_context(pipe);
 274         struct nvc0_screen *screen = nv50->screen;
 275         struct nouveau_channel *chan = screen->base.channel;
 276         struct nvc0_miptree *mt = nvc0_miptree(dst->texture);
 277         struct nvc0_surface *sf = nvc0_surface(dst);
 278         struct nouveau_bo *bo = mt->base.bo;
 279         uint32_t mode = 0;
 280
 281         if (clear_flags & PIPE_CLEAR_DEPTH) {
 282                 BEGIN_RING(chan, RING_3D(CLEAR_DEPTH), 1);
 283                 OUT_RINGf (chan, depth);
 284                 mode |= NVC0_3D_CLEAR_BUFFERS_Z;
 285         }
 286
 287         if (clear_flags & PIPE_CLEAR_STENCIL) {
 288                 BEGIN_RING(chan, RING_3D(CLEAR_STENCIL), 1);
 289                 OUT_RING  (chan, stencil & 0xff);
 290                 mode |= NVC0_3D_CLEAR_BUFFERS_S;
 291         }
 292
 293         if (MARK_RING(chan, 17, 2))
 294                 return;
 295
 296         BEGIN_RING(chan, RING_3D(ZETA_ADDRESS_HIGH), 5);
 297         OUT_RELOCh(chan, bo, sf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 298         OUT_RELOCl(chan, bo, sf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 299         OUT_RING  (chan, nvc0_format_table[dst->format].rt);
 300         OUT_RING  (chan, mt->level[sf->base.u.tex.level].tile_mode);
 301         OUT_RING  (chan, 0);
 302         BEGIN_RING(chan, RING_3D(ZETA_ENABLE), 1);
 303         OUT_RING  (chan, 1);
 304         BEGIN_RING(chan, RING_3D(ZETA_HORIZ), 3);
 305         OUT_RING  (chan, sf->width);
 306         OUT_RING  (chan, sf->height);
 307         OUT_RING  (chan, (1 << 16) | 1);
 308
 309         BEGIN_RING(chan, RING_3D(VIEWPORT_HORIZ(0)), 2);
 310         OUT_RING  (chan, (width << 16) | dstx);
 311         OUT_RING  (chan, (height << 16) | dsty);
 312
 313         BEGIN_RING(chan, RING_3D(CLEAR_BUFFERS), 1);
 314         OUT_RING  (chan, mode);
 315
 316         nv50->dirty |= NVC0_NEW_FRAMEBUFFER;
 317 }
 318
 319 void
 320 nvc0_clear(struct pipe_context *pipe, unsigned buffers,
 321            const float *rgba, double depth, unsigned stencil)
 322 {
 323    struct nvc0_context *nvc0 = nvc0_context(pipe);
 324    struct nouveau_channel *chan = nvc0->screen->base.channel;
 325    struct pipe_framebuffer_state *fb = &nvc0->framebuffer;
 326    unsigned i;
 327    const unsigned dirty = nvc0->dirty;
 328    uint32_t mode = 0;
 329
 330    /* don't need NEW_BLEND, COLOR_MASK doesn't affect CLEAR_BUFFERS */
 331    nvc0->dirty &= NVC0_NEW_FRAMEBUFFER;
 332    if (!nvc0_state_validate(nvc0))
 333       return;
 334
 335    if (buffers & PIPE_CLEAR_COLOR && fb->nr_cbufs) {
 336       BEGIN_RING(chan, RING_3D(CLEAR_COLOR(0)), 4);
 337       OUT_RINGf (chan, rgba[0]);
 338       OUT_RINGf (chan, rgba[1]);
 339       OUT_RINGf (chan, rgba[2]);
 340       OUT_RINGf (chan, rgba[3]);
 341       mode =
 342          NVC0_3D_CLEAR_BUFFERS_R | NVC0_3D_CLEAR_BUFFERS_G |
 343          NVC0_3D_CLEAR_BUFFERS_B | NVC0_3D_CLEAR_BUFFERS_A;
 344    }
 345
 346    if (buffers & PIPE_CLEAR_DEPTH) {
 347       BEGIN_RING(chan, RING_3D(CLEAR_DEPTH), 1);
 348       OUT_RING  (chan, fui(depth));
 349       mode |= NVC0_3D_CLEAR_BUFFERS_Z;
 350    }
 351
 352    if (buffers & PIPE_CLEAR_STENCIL) {
 353       BEGIN_RING(chan, RING_3D(CLEAR_STENCIL), 1);
 354       OUT_RING  (chan, stencil & 0xff);
 355       mode |= NVC0_3D_CLEAR_BUFFERS_S;
 356    }
 357
 358    BEGIN_RING(chan, RING_3D(CLEAR_BUFFERS), 1);
 359    OUT_RING  (chan, mode);
 360
 361    for (i = 1; i < fb->nr_cbufs; i++) {
 362       BEGIN_RING(chan, RING_3D(CLEAR_BUFFERS), 1);
 363       OUT_RING  (chan, (i << 6) | 0x3c);
 364    }
 365
 366    nvc0->dirty = dirty & ~NVC0_NEW_FRAMEBUFFER;
 367 }
 368
 369 void
 370 nvc0_init_surface_functions(struct nvc0_context *nvc0)
 371 {
 372         nvc0->pipe.resource_copy_region = nvc0_resource_copy_region;
 373         nvc0->pipe.clear_render_target = nvc0_clear_render_target;
 374         nvc0->pipe.clear_depth_stencil = nvc0_clear_depth_stencil;
 375 }
 376
 377