nv04-nv40: new 2D: add new Gallium-independent 2D engine
[mesa.git] / src / gallium / drivers / nvfx / nv04_2d.h
1 /**************************************************************************
2 *
3 * Copyright 2009 Ben Skeggs
4 * Copyright 2009 Younes Manton
5 * Copyright 2010 Luca Barbieri
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining
9 * a copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
18 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
20 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
23 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 * The above copyright notice and this permission notice (including the
26 * next paragraph) shall be included in all copies or substantial portions
27 * of the Software.
28 *
29 **************************************************************************/
30
31 /* this code has no Mesa or Gallium dependency and can be reused in the classic Mesa driver or DDX */
32
33 #ifndef __NV04_2D_H__
34 #define __NV04_2D_H__
35
36 struct nv04_2d_context;
37 struct nouveau_channel;
38 struct nouveau_bo;
39
40 // NOTE: all functions taking this as a parameter will CLOBBER it (except for ->bo)
41 struct nv04_region {
42 struct nouveau_bo* bo;
43 int offset;
44 unsigned pitch; // 0 -> swizzled
45 unsigned bpps; // bpp shift (0, 1, 2; 3, 4 for fp/compressed)
46 unsigned x, y, z;
47 unsigned w, h, d;
48 };
49
50 void
51 nv04_memcpy(struct nv04_2d_context *ctx,
52 struct nouveau_bo* dstbo, int dstoff,
53 struct nouveau_bo* srcbo, int srcoff,
54 unsigned size);
55
56 unsigned
57 nv04_region_begin(struct nv04_region* rgn, unsigned w, unsigned h);
58
59 unsigned
60 nv04_region_end(struct nv04_region* rgn, unsigned w, unsigned h);
61
62 void
63 nv04_2d_context_takedown(struct nv04_2d_context *pctx);
64
65 struct nv04_2d_context *
66 nv04_2d_context_init(struct nouveau_channel* chan);
67
68 void
69 nv04_region_copy_cpu(struct nv04_region* dst, struct nv04_region* src, int w, int h);
70
71 void
72 nv04_region_fill_cpu(struct nv04_region* dst, int w, int h, unsigned value);
73
74 int
75 nv04_region_copy_2d(struct nv04_2d_context *ctx,
76 struct nv04_region* dst, struct nv04_region* src,
77 int w, int h,
78 int cs2d_format, int sifm_format,
79 int dst_to_gpu, int src_on_gpu);
80
81 int
82 nv04_region_fill_2d(struct nv04_2d_context *ctx,
83 struct nv04_region *dst,
84 int w, int h,
85 unsigned value);
86
87 #endif