nvfx: rewrite draw code and buffer code
[mesa.git] / src / gallium / drivers / nvfx / nvfx_surface.c
1
2 /**************************************************************************
3 *
4 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
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12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
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24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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27 **************************************************************************/
28
29 #include "pipe/p_context.h"
30 #include "pipe/p_format.h"
31 #include "util/u_format.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34 #include "util/u_pack_color.h"
35 #include "util/u_rect.h"
36 #include "util/u_blitter.h"
37
38 #include "nouveau/nouveau_winsys.h"
39 #include "nouveau/nouveau_screen.h"
40 #include "nvfx_context.h"
41 #include "nvfx_screen.h"
42 #include "nvfx_resource.h"
43 #include "nv04_2d.h"
44
45 #include <nouveau/nouveau_bo.h>
46
47 static INLINE void
48 nvfx_region_set_format(struct nv04_region* rgn, enum pipe_format format)
49 {
50 unsigned bits = util_format_get_blocksizebits(format);
51 switch(bits)
52 {
53 case 8:
54 rgn->bpps = 0;
55 break;
56 case 16:
57 rgn->bpps = 1;
58 break;
59 case 32:
60 rgn->bpps = 2;
61 break;
62 default:
63 assert(util_is_pot(bits));
64 int shift = util_logbase2(bits) - 3;
65 assert(shift >= 2);
66 rgn->bpps = 2;
67 shift -= 2;
68
69 rgn->x = util_format_get_nblocksx(format, rgn->x) << shift;
70 rgn->y = util_format_get_nblocksy(format, rgn->y);
71 }
72 }
73
74 static INLINE void
75 nvfx_region_fixup_swizzled(struct nv04_region* rgn, unsigned zslice, unsigned width, unsigned height, unsigned depth)
76 {
77 // TODO: move this code to surface creation?
78 if((depth <= 1) && (height <= 1 || width <= 2))
79 rgn->pitch = width << rgn->bpps;
80 else if(depth > 1 && height <= 2 && width <= 2)
81 {
82 rgn->pitch = width << rgn->bpps;
83 rgn->offset += (zslice * width * height) << rgn->bpps;
84 }
85 else
86 {
87 rgn->pitch = 0;
88 rgn->z = zslice;
89 rgn->w = width;
90 rgn->h = height;
91 rgn->d = depth;
92 }
93 }
94
95 static INLINE void
96 nvfx_region_init_for_surface(struct nv04_region* rgn, struct nvfx_surface* surf, unsigned x, unsigned y, bool for_write)
97 {
98 rgn->x = x;
99 rgn->y = y;
100 rgn->z = 0;
101 nvfx_region_set_format(rgn, surf->base.base.format);
102
103 if(surf->temp)
104 {
105 rgn->bo = surf->temp->base.bo;
106 rgn->offset = 0;
107 rgn->pitch = surf->temp->linear_pitch;
108
109 if(for_write)
110 util_dirty_surface_set_dirty(nvfx_surface_get_dirty_surfaces(&surf->base.base), &surf->base);
111 } else {
112 rgn->bo = ((struct nvfx_resource*)surf->base.base.texture)->bo;
113 rgn->offset = surf->base.base.offset;
114 rgn->pitch = surf->pitch;
115
116 if(!(surf->base.base.texture->flags & NVFX_RESOURCE_FLAG_LINEAR))
117 nvfx_region_fixup_swizzled(rgn, surf->base.base.zslice, surf->base.base.width, surf->base.base.height, u_minify(surf->base.base.texture->depth0, surf->base.base.level));
118 }
119 }
120
121 static INLINE void
122 nvfx_region_init_for_subresource(struct nv04_region* rgn, struct pipe_resource* pt, struct pipe_subresource sub, unsigned x, unsigned y, unsigned z, bool for_write)
123 {
124 if(pt->target != PIPE_BUFFER)
125 {
126 struct nvfx_surface* ns = (struct nvfx_surface*)util_surfaces_peek(&((struct nvfx_miptree*)pt)->surfaces, pt, sub.face, sub.level, z);
127 if(ns && util_dirty_surface_is_dirty(&ns->base))
128 {
129 nvfx_region_init_for_surface(rgn, ns, x, y, for_write);
130 return;
131 }
132 }
133
134 rgn->bo = ((struct nvfx_resource*)pt)->bo;
135 rgn->offset = nvfx_subresource_offset(pt, sub.face, sub.level, z);
136 rgn->pitch = nvfx_subresource_pitch(pt, sub.level);
137 rgn->x = x;
138 rgn->y = y;
139 rgn->z = 0;
140
141 nvfx_region_set_format(rgn, pt->format);
142 if(!(pt->flags & NVFX_RESOURCE_FLAG_LINEAR))
143 nvfx_region_fixup_swizzled(rgn, z, u_minify(pt->width0, sub.level), u_minify(pt->height0, sub.level), u_minify(pt->depth0, sub.level));
144 }
145
146 // TODO: actually test this for all formats, it's probably wrong for some...
147
148 static INLINE int
149 nvfx_surface_format(enum pipe_format format)
150 {
151 switch(util_format_get_blocksize(format)) {
152 case 1:
153 return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8;
154 case 2:
155 //return NV04_CONTEXT_SURFACES_2D_FORMAT_Y16;
156 return NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5;
157 case 4:
158 //if(format == PIPE_FORMAT_B8G8R8X8_UNORM || format == PIPE_FORMAT_B8G8R8A8_UNORM)
159 return NV04_CONTEXT_SURFACES_2D_FORMAT_A8R8G8B8;
160 //else
161 // return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32;
162 default:
163 return -1;
164 }
165 }
166
167 static INLINE int
168 nv04_scaled_image_format(enum pipe_format format)
169 {
170 switch(util_format_get_blocksize(format)) {
171 case 1:
172 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8;
173 case 2:
174 //if(format == PIPE_FORMAT_B5G5R5A1_UNORM)
175 // return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5;
176 //else
177 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5;
178 case 4:
179 if(format == PIPE_FORMAT_B8G8R8X8_UNORM)
180 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8;
181 else
182 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8;
183 default:
184 return -1;
185 }
186 }
187
188 // XXX: must save index buffer too!
189 static struct blitter_context*
190 nvfx_get_blitter(struct pipe_context* pipe, int copy)
191 {
192 struct nvfx_context* nvfx = nvfx_context(pipe);
193
194 struct blitter_context* blitter = nvfx->blitter;
195 if(!blitter)
196 nvfx->blitter = blitter = util_blitter_create(pipe);
197
198 util_blitter_save_blend(blitter, nvfx->blend);
199 util_blitter_save_depth_stencil_alpha(blitter, nvfx->zsa);
200 util_blitter_save_stencil_ref(blitter, &nvfx->stencil_ref);
201 util_blitter_save_rasterizer(blitter, nvfx->rasterizer);
202 util_blitter_save_fragment_shader(blitter, nvfx->fragprog);
203 util_blitter_save_vertex_shader(blitter, nvfx->vertprog);
204 util_blitter_save_viewport(blitter, &nvfx->viewport);
205 util_blitter_save_framebuffer(blitter, &nvfx->framebuffer);
206 util_blitter_save_clip(blitter, &nvfx->clip);
207 util_blitter_save_vertex_elements(blitter, nvfx->vtxelt);
208 util_blitter_save_vertex_buffers(blitter, nvfx->vtxbuf_nr, nvfx->vtxbuf);
209
210 if(copy)
211 {
212 util_blitter_save_fragment_sampler_states(blitter, nvfx->nr_samplers, (void**)nvfx->tex_sampler);
213 util_blitter_save_fragment_sampler_views(blitter, nvfx->nr_textures, nvfx->fragment_sampler_views);
214 }
215
216 return blitter;
217 }
218
219 static unsigned
220 nvfx_region_clone(struct nv04_2d_context* ctx, struct nv04_region* rgn, unsigned w, unsigned h, boolean for_read)
221 {
222 unsigned begin = nv04_region_begin(rgn, w, h);
223 unsigned end = nv04_region_end(rgn, w, h);
224 unsigned size = end - begin;
225 struct nouveau_bo* bo = 0;
226 nouveau_bo_new(rgn->bo->device, NOUVEAU_BO_MAP | NOUVEAU_BO_GART, 256, size, &bo);
227
228 if(for_read || (size > ((w * h) << rgn->bpps)))
229 nv04_memcpy(ctx, bo, 0, rgn->bo, rgn->offset + begin, size);
230
231 rgn->bo = bo;
232 rgn->offset = -begin;
233 return begin;
234 }
235
236 static void
237 nvfx_resource_copy_region(struct pipe_context *pipe,
238 struct pipe_resource *dstr, struct pipe_subresource subdst,
239 unsigned dstx, unsigned dsty, unsigned dstz,
240 struct pipe_resource *srcr, struct pipe_subresource subsrc,
241 unsigned srcx, unsigned srcy, unsigned srcz,
242 unsigned w, unsigned h)
243 {
244 struct nv04_2d_context *ctx = nvfx_screen(pipe->screen)->eng2d;
245 struct nv04_region dst, src;
246
247 if(!w || !h)
248 return;
249
250 static int copy_threshold = -1;
251 if(copy_threshold < 0)
252 copy_threshold = debug_get_num_option("NOUVEAU_COPY_THRESHOLD", 4);
253
254 int dst_to_gpu = dstr->usage != PIPE_USAGE_DYNAMIC && dstr->usage != PIPE_USAGE_STAGING;
255 int src_on_gpu = nvfx_resource_on_gpu(srcr);
256
257 nvfx_region_init_for_subresource(&dst, dstr, subdst, dstx, dsty, dstz, TRUE);
258 nvfx_region_init_for_subresource(&src, srcr, subsrc, srcx, srcy, srcz, FALSE);
259 w = util_format_get_stride(dstr->format, w) >> dst.bpps;
260 h = util_format_get_nblocksy(dstr->format, h);
261
262 int ret;
263 boolean small = (w * h <= copy_threshold);
264 if((!dst_to_gpu || !src_on_gpu) && small)
265 ret = -1; /* use the CPU */
266 else
267 ret = nv04_region_copy_2d(ctx, &dst, &src, w, h,
268 dstr->target == PIPE_BUFFER ? -1 : nvfx_surface_format(dstr->format),
269 dstr->target == PIPE_BUFFER ? -1 : nv04_scaled_image_format(dstr->format),
270 dst_to_gpu, src_on_gpu);
271 if(!ret)
272 {}
273 else if(ret > 0 && dstr->bind & PIPE_BIND_RENDER_TARGET && srcr->bind & PIPE_BIND_SAMPLER_VIEW)
274 {
275 struct blitter_context* blitter = nvfx_get_blitter(pipe, 1);
276 util_blitter_copy_region(blitter, dstr, subdst, dstx, dsty, dstz, srcr, subsrc, srcx, srcy, srcz, w, h, TRUE);
277 }
278 else
279 {
280 struct nv04_region dstt = dst;
281 struct nv04_region srct = src;
282 unsigned dstbegin = 0;
283
284 if(!small)
285 {
286 if(src_on_gpu)
287 nvfx_region_clone(ctx, &srct, w, h, TRUE);
288
289 if(dst_to_gpu)
290 dstbegin = nvfx_region_clone(ctx, &dstt, w, h, FALSE);
291 }
292
293 nv04_region_copy_cpu(&dstt, &srct, w, h);
294
295 if(srct.bo != src.bo)
296 nouveau_screen_bo_release(pipe->screen, srct.bo);
297
298 if(dstt.bo != dst.bo)
299 {
300 nv04_memcpy(ctx, dst.bo, dst.offset + dstbegin, dstt.bo, 0, dstt.bo->size);
301 nouveau_screen_bo_release(pipe->screen, dstt.bo);
302 }
303 }
304 }
305
306 static int
307 nvfx_surface_fill(struct pipe_context* pipe, struct pipe_surface *dsts,
308 unsigned dx, unsigned dy, unsigned w, unsigned h, unsigned value)
309 {
310 struct nv04_2d_context *ctx = nvfx_screen(pipe->screen)->eng2d;
311 struct nv04_region dst;
312 /* Always try to use the GPU right now, if possible
313 * If the user wanted the surface data on the CPU, he would have cleared with memset (hopefully) */
314
315 // we don't care about interior pixel order since we set all them to the same value
316 nvfx_region_init_for_surface(&dst, (struct nvfx_surface*)dsts, dx, dy, TRUE);
317
318 w = util_format_get_stride(dsts->format, w) >> dst.bpps;
319 h = util_format_get_nblocksy(dsts->format, h);
320
321 int ret = nv04_region_fill_2d(ctx, &dst, w, h, value);
322 if(ret > 0 && dsts->texture->bind & PIPE_BIND_RENDER_TARGET)
323 return 1;
324 else if(ret)
325 {
326 struct nv04_region dstt = dst;
327 unsigned dstbegin = 0;
328
329 if(nvfx_resource_on_gpu(dsts->texture))
330 dstbegin = nvfx_region_clone(ctx, &dstt, w, h, FALSE);
331
332 nv04_region_fill_cpu(&dstt, w, h, value);
333
334 if(dstt.bo != dst.bo)
335 {
336 nv04_memcpy(ctx, dst.bo, dst.offset + dstbegin, dstt.bo, 0, dstt.bo->size);
337 nouveau_screen_bo_release(pipe->screen, dstt.bo);
338 }
339 }
340
341 return 0;
342 }
343
344
345 void
346 nvfx_screen_surface_takedown(struct pipe_screen *pscreen)
347 {
348 nv04_2d_context_takedown(nvfx_screen(pscreen)->eng2d);
349 nvfx_screen(pscreen)->eng2d = 0;
350 }
351
352 int
353 nvfx_screen_surface_init(struct pipe_screen *pscreen)
354 {
355 struct nv04_2d_context* ctx = nv04_2d_context_init(nouveau_screen(pscreen)->channel);
356 if(!ctx)
357 return -1;
358 nvfx_screen(pscreen)->eng2d = ctx;
359 return 0;
360 }
361
362 static void
363 nvfx_surface_copy_temp(struct pipe_context* pipe, struct pipe_surface* surf, int to_temp)
364 {
365 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
366 struct pipe_subresource tempsr, surfsr;
367 struct nvfx_context* nvfx = nvfx_context(pipe);
368
369 // TODO: we really should do this validation before setting these variable in draw calls
370 unsigned use_vertex_buffers = nvfx->use_vertex_buffers;
371 boolean use_index_buffer = nvfx->use_index_buffer;
372 unsigned base_vertex = nvfx->base_vertex;
373
374 tempsr.face = 0;
375 tempsr.level = 0;
376 surfsr.face = surf->face;
377 surfsr.level = surf->level;
378
379 if(to_temp)
380 nvfx_resource_copy_region(pipe, &ns->temp->base.base, tempsr, 0, 0, 0, surf->texture, surfsr, 0, 0, surf->zslice, surf->width, surf->height);
381 else
382 nvfx_resource_copy_region(pipe, surf->texture, surfsr, 0, 0, surf->zslice, &ns->temp->base.base, tempsr, 0, 0, 0, surf->width, surf->height);
383
384 nvfx->use_vertex_buffers = use_vertex_buffers;
385 nvfx->use_index_buffer = use_index_buffer;
386 nvfx->base_vertex = base_vertex;
387
388 nvfx->dirty |= NVFX_NEW_ARRAYS;
389 nvfx->draw_dirty |= NVFX_NEW_ARRAYS;
390 }
391
392 void
393 nvfx_surface_create_temp(struct pipe_context* pipe, struct pipe_surface* surf)
394 {
395 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
396 struct pipe_resource template;
397 memset(&template, 0, sizeof(struct pipe_resource));
398 template.target = PIPE_TEXTURE_2D;
399 template.format = surf->format;
400 template.width0 = surf->width;
401 template.height0 = surf->height;
402 template.depth0 = 1;
403 template.nr_samples = surf->texture->nr_samples;
404 template.flags = NVFX_RESOURCE_FLAG_LINEAR;
405
406 ns->temp = (struct nvfx_miptree*)nvfx_miptree_create(pipe->screen, &template);
407 nvfx_surface_copy_temp(pipe, surf, 1);
408 }
409
410 void
411 nvfx_surface_flush(struct pipe_context* pipe, struct pipe_surface* surf)
412 {
413 struct nvfx_context* nvfx = (struct nvfx_context*)pipe;
414 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
415 boolean bound = FALSE;
416
417 /* must be done before the copy, otherwise the copy will use the temp as destination */
418 util_dirty_surface_set_clean(nvfx_surface_get_dirty_surfaces(surf), &ns->base);
419
420 nvfx_surface_copy_temp(pipe, surf, 0);
421
422 if(nvfx->framebuffer.zsbuf == surf)
423 bound = TRUE;
424 else
425 {
426 for(unsigned i = 0; i < nvfx->framebuffer.nr_cbufs; ++i)
427 {
428 if(nvfx->framebuffer.cbufs[i] == surf)
429 {
430 bound = TRUE;
431 break;
432 }
433 }
434 }
435
436 if(!bound)
437 pipe_resource_reference((struct pipe_resource**)&ns->temp, 0);
438 }
439
440 static void
441 nvfx_clear_render_target(struct pipe_context *pipe,
442 struct pipe_surface *dst,
443 const float *rgba,
444 unsigned dstx, unsigned dsty,
445 unsigned width, unsigned height)
446 {
447 union util_color uc;
448 util_pack_color(rgba, dst->format, &uc);
449
450 if(util_format_get_blocksizebits(dst->format) > 32
451 || nvfx_surface_fill(pipe, dst, dstx, dsty, width, height, uc.ui))
452 {
453 // TODO: probably should use hardware clear here instead if possible
454 struct blitter_context* blitter = nvfx_get_blitter(pipe, 0);
455 util_blitter_clear_render_target(blitter, dst, rgba, dstx, dsty, width, height);
456 }
457 }
458
459 static void
460 nvfx_clear_depth_stencil(struct pipe_context *pipe,
461 struct pipe_surface *dst,
462 unsigned clear_flags,
463 double depth,
464 unsigned stencil,
465 unsigned dstx, unsigned dsty,
466 unsigned width, unsigned height)
467 {
468 if(util_format_get_blocksizebits(dst->format) > 32
469 || nvfx_surface_fill(pipe, dst, dstx, dsty, width, height, util_pack_z_stencil(dst->format, depth, stencil)))
470 {
471 // TODO: probably should use hardware clear here instead if possible
472 struct blitter_context* blitter = nvfx_get_blitter(pipe, 0);
473 util_blitter_clear_depth_stencil(blitter, dst, clear_flags, depth, stencil, dstx, dsty, width, height);
474 }
475 }
476
477
478 void
479 nvfx_init_surface_functions(struct nvfx_context *nvfx)
480 {
481 nvfx->pipe.resource_copy_region = nvfx_resource_copy_region;
482 nvfx->pipe.clear_render_target = nvfx_clear_render_target;
483 nvfx->pipe.clear_depth_stencil = nvfx_clear_depth_stencil;
484 }