nvfx: rework state_fb code to get rid of render temps
[mesa.git] / src / gallium / drivers / nvfx / nvfx_surface.c
1
2 /**************************************************************************
3 *
4 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * All Rights Reserved.
6 *
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12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
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24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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27 **************************************************************************/
28
29 #include "pipe/p_context.h"
30 #include "pipe/p_format.h"
31 #include "util/u_format.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34 #include "util/u_pack_color.h"
35 #include "util/u_blitter.h"
36 #include "util/u_surface.h"
37
38 #include "nouveau/nouveau_winsys.h"
39 #include "nouveau/nouveau_screen.h"
40 #include "nvfx_context.h"
41 #include "nvfx_screen.h"
42 #include "nvfx_resource.h"
43 #include "nv04_2d.h"
44
45 #include <nouveau/nouveau_bo.h>
46
47 static INLINE void
48 nvfx_region_set_format(struct nv04_region* rgn, enum pipe_format format)
49 {
50 unsigned bits = util_format_get_blocksizebits(format);
51 unsigned shift = 0;
52 rgn->one_bits = 0;
53
54 switch(bits)
55 {
56 case 8:
57 rgn->bpps = 0;
58 break;
59 case 16:
60 rgn->bpps = 1;
61 if(format == PIPE_FORMAT_B5G5R5X1_UNORM)
62 rgn->one_bits = 1;
63 break;
64 case 32:
65 rgn->bpps = 2;
66 if(format == PIPE_FORMAT_R8G8B8X8_UNORM || format == PIPE_FORMAT_B8G8R8X8_UNORM)
67 rgn->one_bits = 8;
68 break;
69 case 64:
70 rgn->bpps = 2;
71 shift = 1;
72 break;
73 case 128:
74 rgn->bpps = 2;
75 shift = 2;
76 break;
77 }
78
79 if(shift) {
80 rgn->x = util_format_get_nblocksx(format, rgn->x) << shift;
81 rgn->y = util_format_get_nblocksy(format, rgn->y);
82 rgn->w <<= shift;
83 }
84 }
85
86 static INLINE void
87 nvfx_region_init_for_surface(struct nv04_region* rgn, struct nvfx_surface* surf, unsigned x, unsigned y, boolean for_write)
88 {
89 rgn->x = x;
90 rgn->y = y;
91 rgn->z = 0;
92
93 if(surf->temp)
94 {
95 rgn->bo = surf->temp->base.bo;
96 rgn->offset = 0;
97 rgn->pitch = surf->temp->linear_pitch;
98
99 if(for_write)
100 util_dirty_surface_set_dirty(nvfx_surface_get_dirty_surfaces(&surf->base.base), &surf->base);
101 } else {
102 rgn->bo = ((struct nvfx_resource*)surf->base.base.texture)->bo;
103 rgn->offset = surf->offset;
104
105 if(surf->base.base.texture->flags & NOUVEAU_RESOURCE_FLAG_LINEAR)
106 rgn->pitch = surf->pitch;
107 else
108 {
109 rgn->pitch = 0;
110 rgn->z = surf->base.base.u.tex.first_layer;
111 rgn->w = surf->base.base.width;
112 rgn->h = surf->base.base.height;
113 rgn->d = u_minify(surf->base.base.texture->depth0, surf->base.base.u.tex.level);
114 }
115 }
116
117 nvfx_region_set_format(rgn, surf->base.base.format);
118 if(!rgn->pitch)
119 nv04_region_try_to_linearize(rgn);
120 }
121
122 static INLINE void
123 nvfx_region_init_for_subresource(struct nv04_region* rgn, struct pipe_resource* pt, unsigned level, unsigned x, unsigned y, unsigned z, boolean for_write)
124 {
125 if(pt->target != PIPE_BUFFER)
126 {
127 struct nvfx_surface* ns = (struct nvfx_surface*)util_surfaces_peek(&((struct nvfx_miptree*)pt)->surfaces, pt, level, z);
128 if(ns && util_dirty_surface_is_dirty(&ns->base))
129 {
130 nvfx_region_init_for_surface(rgn, ns, x, y, for_write);
131 return;
132 }
133 }
134
135 rgn->bo = ((struct nvfx_resource*)pt)->bo;
136 rgn->offset = nvfx_subresource_offset(pt, z, level, z);
137 rgn->x = x;
138 rgn->y = y;
139
140 if(pt->flags & NOUVEAU_RESOURCE_FLAG_LINEAR)
141 {
142 rgn->pitch = nvfx_subresource_pitch(pt, level);
143 rgn->z = 0;
144 }
145 else
146 {
147 rgn->pitch = 0;
148 rgn->z = z;
149 rgn->w = u_minify(pt->width0, level);
150 rgn->h = u_minify(pt->height0, level);
151 rgn->d = u_minify(pt->depth0, level);
152 }
153
154 nvfx_region_set_format(rgn, pt->format);
155 if(!rgn->pitch)
156 nv04_region_try_to_linearize(rgn);
157 }
158
159 // don't save index buffer because blitter doesn't setit
160 static struct blitter_context*
161 nvfx_get_blitter(struct pipe_context* pipe, int copy)
162 {
163 struct nvfx_context* nvfx = nvfx_context(pipe);
164 struct blitter_context** pblitter;
165 struct blitter_context* blitter;
166
167 assert(nvfx->blitters_in_use < Elements(nvfx->blitter));
168
169 if(nvfx->query && !nvfx->blitters_in_use)
170 {
171 struct nouveau_channel* chan = nvfx->screen->base.channel;
172 struct nouveau_grobj *eng3d = nvfx->screen->eng3d;
173 BEGIN_RING(chan, eng3d, NV30_3D_QUERY_ENABLE, 1);
174 OUT_RING(chan, 0);
175 }
176
177 pblitter = &nvfx->blitter[nvfx->blitters_in_use++];
178 if(!*pblitter)
179 *pblitter = util_blitter_create(pipe);
180 blitter = *pblitter;
181
182 util_blitter_save_blend(blitter, nvfx->blend);
183 util_blitter_save_depth_stencil_alpha(blitter, nvfx->zsa);
184 util_blitter_save_stencil_ref(blitter, &nvfx->stencil_ref);
185 util_blitter_save_rasterizer(blitter, nvfx->rasterizer);
186 util_blitter_save_fragment_shader(blitter, nvfx->fragprog);
187 util_blitter_save_vertex_shader(blitter, nvfx->vertprog);
188 util_blitter_save_viewport(blitter, &nvfx->viewport);
189 util_blitter_save_framebuffer(blitter, &nvfx->framebuffer);
190 util_blitter_save_vertex_elements(blitter, nvfx->vtxelt);
191 util_blitter_save_vertex_buffers(blitter, nvfx->vtxbuf_nr, nvfx->vtxbuf);
192
193 if(copy)
194 {
195 util_blitter_save_fragment_sampler_states(blitter, nvfx->nr_samplers, (void**)nvfx->tex_sampler);
196 util_blitter_save_fragment_sampler_views(blitter, nvfx->nr_textures, nvfx->fragment_sampler_views);
197 }
198
199 return blitter;
200 }
201
202 static inline void
203 nvfx_put_blitter(struct pipe_context* pipe, struct blitter_context* blitter)
204 {
205 struct nvfx_context* nvfx = nvfx_context(pipe);
206 --nvfx->blitters_in_use;
207 assert(nvfx->blitters_in_use >= 0);
208
209 if(nvfx->query && !nvfx->blitters_in_use)
210 {
211 struct nouveau_channel* chan = nvfx->screen->base.channel;
212 struct nouveau_grobj *eng3d = nvfx->screen->eng3d;
213 BEGIN_RING(chan, eng3d, NV30_3D_QUERY_ENABLE, 1);
214 OUT_RING(chan, 1);
215 }
216 }
217
218 static unsigned
219 nvfx_region_clone(struct nv04_2d_context* ctx, struct nv04_region* rgn, unsigned w, unsigned h, boolean for_read)
220 {
221 unsigned begin = nv04_region_begin(rgn, w, h);
222 unsigned end = nv04_region_end(rgn, w, h);
223 unsigned size = end - begin;
224 struct nouveau_bo* bo = 0;
225 nouveau_bo_new(rgn->bo->device, NOUVEAU_BO_MAP | NOUVEAU_BO_GART, 256, size, &bo);
226
227 if(for_read || (size > ((w * h) << rgn->bpps)))
228 nv04_memcpy(ctx, bo, 0, rgn->bo, rgn->offset + begin, size);
229
230 rgn->bo = bo;
231 rgn->offset = -begin;
232 return begin;
233 }
234
235 static void
236 nvfx_resource_copy_region(struct pipe_context *pipe,
237 struct pipe_resource *dstr, unsigned dst_level,
238 unsigned dstx, unsigned dsty, unsigned dstz,
239 struct pipe_resource *srcr, unsigned src_level,
240 const struct pipe_box *src_box)
241 {
242 static int copy_threshold = -1;
243 struct nv04_2d_context *ctx = nvfx_screen(pipe->screen)->eng2d;
244 struct nv04_region dst, src;
245 int dst_to_gpu;
246 int src_on_gpu;
247 boolean small;
248 int ret;
249 unsigned w = src_box->width;
250 unsigned h = src_box->height;
251
252 if(!w || !h)
253 return;
254
255 /* Fallback for buffers. */
256 if (dstr->target == PIPE_BUFFER && srcr->target == PIPE_BUFFER) {
257 util_resource_copy_region(pipe, dstr, dst_level, dstx, dsty, dstz,
258 srcr, src_level, src_box);
259 return;
260 }
261
262 if(copy_threshold < 0)
263 copy_threshold = debug_get_num_option("NOUVEAU_COPY_THRESHOLD", 4);
264
265 dst_to_gpu = dstr->usage != PIPE_USAGE_DYNAMIC && dstr->usage != PIPE_USAGE_STAGING;
266 src_on_gpu = nvfx_resource_on_gpu(srcr);
267
268 nvfx_region_init_for_subresource(&dst, dstr, dst_level, dstx, dsty, dstz, TRUE);
269 nvfx_region_init_for_subresource(&src, srcr, src_level, src_box->x, src_box->y, src_box->z, FALSE);
270 w = util_format_get_stride(dstr->format, w) >> dst.bpps;
271 h = util_format_get_nblocksy(dstr->format, h);
272
273 small = (w * h <= copy_threshold);
274 if((!dst_to_gpu || !src_on_gpu) && small)
275 ret = -1; /* use the CPU */
276 else
277 ret = nv04_region_copy_2d(ctx, &dst, &src, w, h, dst_to_gpu, src_on_gpu);
278 if(!ret)
279 {}
280 else if(ret > 0
281 && dstr->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)
282 && srcr->bind & PIPE_BIND_SAMPLER_VIEW)
283 {
284 /* this currently works because we hack the bind flags on resource creation to be
285 * the maximum set that the resource type actually supports
286 *
287 * TODO: perhaps support reinterpreting the formats
288 */
289 struct blitter_context* blitter = nvfx_get_blitter(pipe, 1);
290 util_blitter_copy_texture(blitter, dstr, dst_level, dstx, dsty, dstz, srcr, src_level, src_box, TRUE);
291 nvfx_put_blitter(pipe, blitter);
292 }
293 else
294 {
295 struct nv04_region dstt = dst;
296 struct nv04_region srct = src;
297 unsigned dstbegin = 0;
298
299 if(!small)
300 {
301 if(src_on_gpu)
302 nvfx_region_clone(ctx, &srct, w, h, TRUE);
303
304 if(dst_to_gpu)
305 dstbegin = nvfx_region_clone(ctx, &dstt, w, h, FALSE);
306 }
307
308 nv04_region_copy_cpu(&dstt, &srct, w, h);
309
310 if(srct.bo != src.bo)
311 nouveau_screen_bo_release(pipe->screen, srct.bo);
312
313 if(dstt.bo != dst.bo)
314 {
315 nv04_memcpy(ctx, dst.bo, dst.offset + dstbegin, dstt.bo, 0, dstt.bo->size);
316 nouveau_screen_bo_release(pipe->screen, dstt.bo);
317 }
318 }
319 }
320
321 static int
322 nvfx_surface_fill(struct pipe_context* pipe, struct pipe_surface *dsts,
323 unsigned dx, unsigned dy, unsigned w, unsigned h, unsigned value)
324 {
325 struct nv04_2d_context *ctx = nvfx_screen(pipe->screen)->eng2d;
326 struct nv04_region dst;
327 int ret;
328 /* Always try to use the GPU right now, if possible
329 * If the user wanted the surface data on the CPU, he would have cleared with memset (hopefully) */
330
331 // we don't care about interior pixel order since we set all them to the same value
332 nvfx_region_init_for_surface(&dst, (struct nvfx_surface*)dsts, dx, dy, TRUE);
333
334 w = util_format_get_stride(dsts->format, w) >> dst.bpps;
335 h = util_format_get_nblocksy(dsts->format, h);
336
337 ret = nv04_region_fill_2d(ctx, &dst, w, h, value);
338 if(ret > 0 && dsts->texture->bind & PIPE_BIND_RENDER_TARGET)
339 return 1;
340 else if(ret)
341 {
342 struct nv04_region dstt = dst;
343 unsigned dstbegin = 0;
344
345 if(nvfx_resource_on_gpu(dsts->texture))
346 dstbegin = nvfx_region_clone(ctx, &dstt, w, h, FALSE);
347
348 nv04_region_fill_cpu(&dstt, w, h, value);
349
350 if(dstt.bo != dst.bo)
351 {
352 nv04_memcpy(ctx, dst.bo, dst.offset + dstbegin, dstt.bo, 0, dstt.bo->size);
353 nouveau_screen_bo_release(pipe->screen, dstt.bo);
354 }
355 }
356
357 return 0;
358 }
359
360
361 void
362 nvfx_screen_surface_takedown(struct pipe_screen *pscreen)
363 {
364 nv04_2d_context_takedown(nvfx_screen(pscreen)->eng2d);
365 nvfx_screen(pscreen)->eng2d = 0;
366 }
367
368 int
369 nvfx_screen_surface_init(struct pipe_screen *pscreen)
370 {
371 struct nv04_2d_context* ctx = nv04_2d_context_init(nouveau_screen(pscreen)->channel);
372 if(!ctx)
373 return -1;
374 nvfx_screen(pscreen)->eng2d = ctx;
375 return 0;
376 }
377
378 static void
379 nvfx_surface_copy_temp(struct pipe_context* pipe, struct pipe_surface* surf, int to_temp)
380 {
381 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
382 struct pipe_box box;
383 struct nvfx_context* nvfx = nvfx_context(pipe);
384 struct nvfx_miptree* temp;
385 unsigned use_vertex_buffers;
386 boolean use_index_buffer;
387 unsigned base_vertex;
388
389 /* temporarily detach the temp, so it isn't used in place of the actual resource */
390 temp = ns->temp;
391 ns->temp = 0;
392
393 // TODO: we really should do this validation before setting these variable in draw calls
394 use_vertex_buffers = nvfx->use_vertex_buffers;
395 use_index_buffer = nvfx->use_index_buffer;
396 base_vertex = nvfx->base_vertex;
397
398 box.x = box.y = 0;
399 assert(surf->u.tex.first_layer == surf->u.tex.last_layer);
400 box.width = surf->width;
401 box.height = surf->height;
402 box.depth = 1;
403
404 if(to_temp) {
405 box.z = surf->u.tex.first_layer;
406 nvfx_resource_copy_region(pipe, &temp->base.base, 0, 0, 0, 0, surf->texture, surf->u.tex.level, &box);
407 }
408 else {
409 box.z = 0;
410 nvfx_resource_copy_region(pipe, surf->texture, surf->u.tex.level, 0, 0, surf->u.tex.first_layer, &temp->base.base, 0, &box);
411 }
412
413 /* If this triggers, it probably means we attempted to use the blitter
414 * but failed due to non-renderability of the target.
415 * Obviously, this would lead to infinite recursion if supported. */
416 assert(!ns->temp);
417
418 ns->temp = temp;
419
420 nvfx->use_vertex_buffers = use_vertex_buffers;
421 nvfx->use_index_buffer = use_index_buffer;
422 nvfx->base_vertex = base_vertex;
423
424 nvfx->dirty |= NVFX_NEW_ARRAYS;
425 nvfx->draw_dirty |= NVFX_NEW_ARRAYS;
426 }
427
428 void
429 nvfx_surface_create_temp(struct pipe_context* pipe, struct pipe_surface* surf)
430 {
431 assert (0);
432
433 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
434 struct pipe_resource template;
435 memset(&template, 0, sizeof(struct pipe_resource));
436 template.target = PIPE_TEXTURE_2D;
437 template.format = surf->format;
438 template.width0 = surf->width;
439 template.height0 = surf->height;
440 template.depth0 = 1;
441 template.nr_samples = surf->texture->nr_samples;
442 template.flags = NOUVEAU_RESOURCE_FLAG_LINEAR;
443
444 assert(!ns->temp && !util_dirty_surface_is_dirty(&ns->base));
445
446 ns->temp = (struct nvfx_miptree*)nvfx_miptree_create(pipe->screen, &template);
447 nvfx_surface_copy_temp(pipe, surf, 1);
448 }
449
450 void
451 nvfx_surface_flush(struct pipe_context* pipe, struct pipe_surface* surf)
452 {
453 struct nvfx_context* nvfx = (struct nvfx_context*)pipe;
454 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
455 boolean bound = FALSE;
456
457 nvfx_surface_copy_temp(pipe, surf, 0);
458
459 util_dirty_surface_set_clean(nvfx_surface_get_dirty_surfaces(surf), &ns->base);
460
461 if(nvfx->framebuffer.zsbuf == surf)
462 bound = TRUE;
463 else
464 {
465 for(unsigned i = 0; i < nvfx->framebuffer.nr_cbufs; ++i)
466 {
467 if(nvfx->framebuffer.cbufs[i] == surf)
468 {
469 bound = TRUE;
470 break;
471 }
472 }
473 }
474
475 if(!bound)
476 pipe_resource_reference((struct pipe_resource**)&ns->temp, 0);
477 }
478
479 static void
480 nvfx_clear_render_target(struct pipe_context *pipe,
481 struct pipe_surface *dst,
482 const union pipe_color_union *color,
483 unsigned dstx, unsigned dsty,
484 unsigned width, unsigned height)
485 {
486 union util_color uc;
487 util_pack_color(color->f, dst->format, &uc);
488
489 if(util_format_get_blocksizebits(dst->format) > 32
490 || nvfx_surface_fill(pipe, dst, dstx, dsty, width, height, uc.ui))
491 {
492 // TODO: probably should use hardware clear here instead if possible
493 struct blitter_context* blitter = nvfx_get_blitter(pipe, 0);
494 util_blitter_clear_render_target(blitter, dst, color, dstx, dsty, width, height);
495 nvfx_put_blitter(pipe, blitter);
496 }
497 }
498
499 static void
500 nvfx_clear_depth_stencil(struct pipe_context *pipe,
501 struct pipe_surface *dst,
502 unsigned clear_flags,
503 double depth,
504 unsigned stencil,
505 unsigned dstx, unsigned dsty,
506 unsigned width, unsigned height)
507 {
508 if(util_format_get_blocksizebits(dst->format) > 32
509 || nvfx_surface_fill(pipe, dst, dstx, dsty, width, height, util_pack_z_stencil(dst->format, depth, stencil)))
510 {
511 // TODO: probably should use hardware clear here instead if possible
512 struct blitter_context* blitter = nvfx_get_blitter(pipe, 0);
513 util_blitter_clear_depth_stencil(blitter, dst, clear_flags, depth, stencil, dstx, dsty, width, height);
514 nvfx_put_blitter(pipe, blitter);
515 }
516 }
517
518
519 void
520 nvfx_init_surface_functions(struct nvfx_context *nvfx)
521 {
522 nvfx->pipe.resource_copy_region = nvfx_resource_copy_region;
523 nvfx->pipe.clear_render_target = nvfx_clear_render_target;
524 nvfx->pipe.clear_depth_stencil = nvfx_clear_depth_stencil;
525 }