nvfx: new 2D: new render temporaries with resources
[mesa.git] / src / gallium / drivers / nvfx / nvfx_surface.c
1
2 /**************************************************************************
3 *
4 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
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12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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27 **************************************************************************/
28
29 #include "pipe/p_context.h"
30 #include "pipe/p_format.h"
31 #include "util/u_format.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34 #include "util/u_pack_color.h"
35 #include "util/u_rect.h"
36 #include "util/u_blitter.h"
37
38 #include "nouveau/nouveau_winsys.h"
39 #include "nouveau/nouveau_util.h"
40 #include "nouveau/nouveau_screen.h"
41 #include "nvfx_context.h"
42 #include "nvfx_screen.h"
43 #include "nvfx_resource.h"
44 #include "nv04_2d.h"
45
46 #include <nouveau/nouveau_bo.h>
47
48 static INLINE void
49 nvfx_region_set_format(struct nv04_region* rgn, enum pipe_format format)
50 {
51 unsigned bits = util_format_get_blocksizebits(format);
52 switch(bits)
53 {
54 case 8:
55 rgn->bpps = 0;
56 break;
57 case 16:
58 rgn->bpps = 1;
59 break;
60 case 32:
61 rgn->bpps = 2;
62 break;
63 default:
64 assert(util_is_pot(bits));
65 int shift = log2i(bits) - 3;
66 assert(shift >= 2);
67 rgn->bpps = 2;
68 shift -= 2;
69
70 rgn->x = util_format_get_nblocksx(format, rgn->x) << shift;
71 rgn->y = util_format_get_nblocksy(format, rgn->y);
72 }
73 }
74
75 static INLINE void
76 nvfx_region_fixup_swizzled(struct nv04_region* rgn, unsigned zslice, unsigned width, unsigned height, unsigned depth)
77 {
78 // TODO: move this code to surface creation?
79 if((depth <= 1) && (height <= 1 || width <= 2))
80 rgn->pitch = width << rgn->bpps;
81 else if(depth > 1 && height <= 2 && width <= 2)
82 {
83 rgn->pitch = width << rgn->bpps;
84 rgn->offset += (zslice * width * height) << rgn->bpps;
85 }
86 else
87 {
88 rgn->pitch = 0;
89 rgn->z = zslice;
90 rgn->w = width;
91 rgn->h = height;
92 rgn->d = depth;
93 }
94 }
95
96 static INLINE void
97 nvfx_region_init_for_surface(struct nv04_region* rgn, struct nvfx_surface* surf, unsigned x, unsigned y, bool for_write)
98 {
99 rgn->x = x;
100 rgn->y = y;
101 rgn->z = 0;
102 nvfx_region_set_format(rgn, surf->base.base.format);
103
104 if(surf->temp)
105 {
106 rgn->bo = surf->temp->base.bo;
107 rgn->offset = 0;
108 rgn->pitch = surf->temp->linear_pitch;
109
110 if(for_write)
111 util_dirty_surface_set_dirty(nvfx_surface_get_dirty_surfaces(&surf->base.base), &surf->base);
112 } else {
113 rgn->bo = ((struct nvfx_resource*)surf->base.base.texture)->bo;
114 rgn->offset = surf->base.base.offset;
115 rgn->pitch = surf->pitch;
116
117 if(!(surf->base.base.texture->flags & NVFX_RESOURCE_FLAG_LINEAR))
118 nvfx_region_fixup_swizzled(rgn, surf->base.base.zslice, surf->base.base.width, surf->base.base.height, u_minify(surf->base.base.texture->depth0, surf->base.base.level));
119 }
120 }
121
122 static INLINE void
123 nvfx_region_init_for_subresource(struct nv04_region* rgn, struct pipe_resource* pt, struct pipe_subresource sub, unsigned x, unsigned y, unsigned z, bool for_write)
124 {
125 if(pt->target != PIPE_BUFFER)
126 {
127 struct nvfx_surface* ns = (struct nvfx_surface*)util_surfaces_peek(&((struct nvfx_miptree*)pt)->surfaces, pt, sub.face, sub.level, z);
128 if(ns && util_dirty_surface_is_dirty(&ns->base))
129 {
130 nvfx_region_init_for_surface(rgn, ns, x, y, for_write);
131 return;
132 }
133 }
134
135 rgn->bo = ((struct nvfx_resource*)pt)->bo;
136 rgn->offset = nvfx_subresource_offset(pt, sub.face, sub.level, z);
137 rgn->pitch = nvfx_subresource_pitch(pt, sub.level);
138 rgn->x = x;
139 rgn->y = y;
140 rgn->z = 0;
141
142 nvfx_region_set_format(rgn, pt->format);
143 if(!(pt->flags & NVFX_RESOURCE_FLAG_LINEAR))
144 nvfx_region_fixup_swizzled(rgn, z, u_minify(pt->width0, sub.level), u_minify(pt->height0, sub.level), u_minify(pt->depth0, sub.level));
145 }
146
147 // TODO: actually test this for all formats, it's probably wrong for some...
148
149 static INLINE int
150 nvfx_surface_format(enum pipe_format format)
151 {
152 switch(util_format_get_blocksize(format)) {
153 case 1:
154 return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8;
155 case 2:
156 //return NV04_CONTEXT_SURFACES_2D_FORMAT_Y16;
157 return NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5;
158 case 4:
159 //if(format == PIPE_FORMAT_B8G8R8X8_UNORM || format == PIPE_FORMAT_B8G8R8A8_UNORM)
160 return NV04_CONTEXT_SURFACES_2D_FORMAT_A8R8G8B8;
161 //else
162 // return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32;
163 default:
164 return -1;
165 }
166 }
167
168 static INLINE int
169 nv04_scaled_image_format(enum pipe_format format)
170 {
171 switch(util_format_get_blocksize(format)) {
172 case 1:
173 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8;
174 case 2:
175 //if(format == PIPE_FORMAT_B5G5R5A1_UNORM)
176 // return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5;
177 //else
178 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5;
179 case 4:
180 if(format == PIPE_FORMAT_B8G8R8X8_UNORM)
181 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8;
182 else
183 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8;
184 default:
185 return -1;
186 }
187 }
188
189 // XXX: must save index buffer too!
190 static struct blitter_context*
191 nvfx_get_blitter(struct pipe_context* pipe, int copy)
192 {
193 struct nvfx_context* nvfx = nvfx_context(pipe);
194
195 struct blitter_context* blitter = nvfx->blitter;
196 if(!blitter)
197 nvfx->blitter = blitter = util_blitter_create(pipe);
198
199 util_blitter_save_blend(blitter, nvfx->blend);
200 util_blitter_save_depth_stencil_alpha(blitter, nvfx->zsa);
201 util_blitter_save_stencil_ref(blitter, &nvfx->stencil_ref);
202 util_blitter_save_rasterizer(blitter, nvfx->rasterizer);
203 util_blitter_save_fragment_shader(blitter, nvfx->fragprog);
204 util_blitter_save_vertex_shader(blitter, nvfx->vertprog);
205 util_blitter_save_viewport(blitter, &nvfx->viewport);
206 util_blitter_save_framebuffer(blitter, &nvfx->framebuffer);
207 util_blitter_save_clip(blitter, &nvfx->clip);
208 util_blitter_save_vertex_elements(blitter, nvfx->vtxelt);
209 util_blitter_save_vertex_buffers(blitter, nvfx->vtxbuf_nr, nvfx->vtxbuf);
210
211 if(copy)
212 {
213 util_blitter_save_fragment_sampler_states(blitter, nvfx->nr_samplers, (void**)nvfx->tex_sampler);
214 util_blitter_save_fragment_sampler_views(blitter, nvfx->nr_textures, nvfx->fragment_sampler_views);
215 }
216
217 return blitter;
218 }
219
220 static unsigned
221 nvfx_region_clone(struct nv04_2d_context* ctx, struct nv04_region* rgn, unsigned w, unsigned h, boolean for_read)
222 {
223 unsigned begin = nv04_region_begin(rgn, w, h);
224 unsigned end = nv04_region_end(rgn, w, h);
225 unsigned size = end - begin;
226 struct nouveau_bo* bo = 0;
227 nouveau_bo_new(rgn->bo->device, NOUVEAU_BO_MAP | NOUVEAU_BO_GART, 256, size, &bo);
228
229 if(for_read || (size > ((w * h) << rgn->bpps)))
230 nv04_memcpy(ctx, bo, 0, rgn->bo, rgn->offset + begin, size);
231
232 rgn->bo = bo;
233 rgn->offset = -begin;
234 return begin;
235 }
236
237 static void
238 nvfx_resource_copy_region(struct pipe_context *pipe,
239 struct pipe_resource *dstr, struct pipe_subresource subdst,
240 unsigned dstx, unsigned dsty, unsigned dstz,
241 struct pipe_resource *srcr, struct pipe_subresource subsrc,
242 unsigned srcx, unsigned srcy, unsigned srcz,
243 unsigned w, unsigned h)
244 {
245 struct nv04_2d_context *ctx = nvfx_screen(pipe->screen)->eng2d;
246 struct nv04_region dst, src;
247
248 if(!w || !h)
249 return;
250
251 static int copy_threshold = -1;
252 if(copy_threshold < 0)
253 {
254 copy_threshold = debug_get_num_option("NOUVEAU_COPY_THRESHOLD", 0);
255 if(copy_threshold < 0)
256 copy_threshold = 0;
257 }
258
259 int dst_to_gpu = dstr->usage != PIPE_USAGE_DYNAMIC && dstr->usage != PIPE_USAGE_STAGING;
260 int src_on_gpu = nvfx_resource_on_gpu(srcr);
261
262 nvfx_region_init_for_subresource(&dst, dstr, subdst, dstx, dsty, dstz, TRUE);
263 nvfx_region_init_for_subresource(&src, srcr, subsrc, srcx, srcy, srcz, FALSE);
264 w = util_format_get_stride(dstr->format, w) >> dst.bpps;
265 h = util_format_get_nblocksy(dstr->format, h);
266
267 int ret;
268 boolean small = (w * h <= copy_threshold);
269 if((!dst_to_gpu || !src_on_gpu) && small)
270 ret = -1; /* use the CPU */
271 else
272 ret = nv04_region_copy_2d(ctx, &dst, &src, w, h,
273 dstr->target == PIPE_BUFFER ? -1 : nvfx_surface_format(dstr->format),
274 dstr->target == PIPE_BUFFER ? -1 : nv04_scaled_image_format(dstr->format),
275 dst_to_gpu, src_on_gpu);
276 if(!ret)
277 {}
278 else if(ret > 0 && dstr->bind & PIPE_BIND_RENDER_TARGET && srcr->bind & PIPE_BIND_SAMPLER_VIEW)
279 {
280 struct blitter_context* blitter = nvfx_get_blitter(pipe, 1);
281 util_blitter_copy_region(blitter, dstr, subdst, dstx, dsty, dstz, srcr, subsrc, srcx, srcy, srcz, w, h, TRUE);
282 }
283 else
284 {
285 struct nv04_region dstt = dst;
286 struct nv04_region srct = src;
287 unsigned dstbegin = 0;
288
289 if(!small)
290 {
291 if(src_on_gpu)
292 nvfx_region_clone(ctx, &srct, w, h, TRUE);
293
294 if(dst_to_gpu)
295 dstbegin = nvfx_region_clone(ctx, &dstt, w, h, FALSE);
296 }
297
298 nv04_region_copy_cpu(&dstt, &srct, w, h);
299
300 if(srct.bo != src.bo)
301 nouveau_screen_bo_release(pipe->screen, srct.bo);
302
303 if(dstt.bo != dst.bo)
304 {
305 nv04_memcpy(ctx, dst.bo, dst.offset + dstbegin, dstt.bo, 0, dstt.bo->size);
306 nouveau_screen_bo_release(pipe->screen, dstt.bo);
307 }
308 }
309 }
310
311 static int
312 nvfx_surface_fill(struct pipe_context* pipe, struct pipe_surface *dsts,
313 unsigned dx, unsigned dy, unsigned w, unsigned h, unsigned value)
314 {
315 struct nv04_2d_context *ctx = nvfx_screen(pipe->screen)->eng2d;
316 struct nv04_region dst;
317 /* Always try to use the GPU right now, if possible
318 * If the user wanted the surface data on the CPU, he would have cleared with memset (hopefully) */
319
320 // we don't care about interior pixel order since we set all them to the same value
321 nvfx_region_init_for_surface(&dst, (struct nvfx_surface*)dsts, dx, dy, TRUE);
322
323 w = util_format_get_stride(dsts->format, w) >> dst.bpps;
324 h = util_format_get_nblocksy(dsts->format, h);
325
326 int ret = nv04_region_fill_2d(ctx, &dst, w, h, value);
327 if(ret > 0 && dsts->texture->bind & PIPE_BIND_RENDER_TARGET)
328 return 1;
329 else if(ret)
330 {
331 struct nv04_region dstt = dst;
332 unsigned dstbegin = 0;
333
334 if(nvfx_resource_on_gpu(dsts->texture))
335 dstbegin = nvfx_region_clone(ctx, &dstt, w, h, FALSE);
336
337 nv04_region_fill_cpu(&dstt, w, h, value);
338
339 if(dstt.bo != dst.bo)
340 {
341 nv04_memcpy(ctx, dst.bo, dst.offset + dstbegin, dstt.bo, 0, dstt.bo->size);
342 nouveau_screen_bo_release(pipe->screen, dstt.bo);
343 }
344 }
345
346 return 0;
347 }
348
349
350 void
351 nvfx_screen_surface_takedown(struct pipe_screen *pscreen)
352 {
353 nv04_2d_context_takedown(nvfx_screen(pscreen)->eng2d);
354 nvfx_screen(pscreen)->eng2d = 0;
355 }
356
357 int
358 nvfx_screen_surface_init(struct pipe_screen *pscreen)
359 {
360 struct nv04_2d_context* ctx = nv04_2d_context_init(nouveau_screen(pscreen)->channel);
361 if(!ctx)
362 return -1;
363 nvfx_screen(pscreen)->eng2d = ctx;
364 return 0;
365 }
366
367 static void
368 nvfx_surface_copy_temp(struct pipe_context* pipe, struct pipe_surface* surf, int to_temp)
369 {
370 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
371 struct pipe_subresource tempsr, surfsr;
372 struct pipe_resource *idxbuf_buffer;
373 unsigned idxbuf_format;
374
375 tempsr.face = 0;
376 tempsr.level = 0;
377 surfsr.face = surf->face;
378 surfsr.level = surf->level;
379
380 // TODO: do this properly, in blitter save
381 idxbuf_buffer = ((struct nvfx_context*)pipe)->idxbuf_buffer;
382 idxbuf_format = ((struct nvfx_context*)pipe)->idxbuf_format;
383
384 if(to_temp)
385 nvfx_resource_copy_region(pipe, &ns->temp->base.base, tempsr, 0, 0, 0, surf->texture, surfsr, 0, 0, surf->zslice, surf->width, surf->height);
386 else
387 nvfx_resource_copy_region(pipe, surf->texture, surfsr, 0, 0, surf->zslice, &ns->temp->base.base, tempsr, 0, 0, 0, surf->width, surf->height);
388
389 ((struct nvfx_context*)pipe)->idxbuf_buffer = idxbuf_buffer;
390 ((struct nvfx_context*)pipe)->idxbuf_format = idxbuf_format;
391 }
392
393 void
394 nvfx_surface_create_temp(struct pipe_context* pipe, struct pipe_surface* surf)
395 {
396 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
397 struct pipe_resource template;
398 memset(&template, 0, sizeof(struct pipe_resource));
399 template.target = PIPE_TEXTURE_2D;
400 template.format = surf->format;
401 template.width0 = surf->width;
402 template.height0 = surf->height;
403 template.depth0 = 1;
404 template.nr_samples = surf->texture->nr_samples;
405 template.flags = NVFX_RESOURCE_FLAG_LINEAR;
406
407 ns->temp = (struct nvfx_miptree*)nvfx_miptree_create(pipe->screen, &template);
408 nvfx_surface_copy_temp(pipe, surf, 1);
409 }
410
411 void
412 nvfx_surface_flush(struct pipe_context* pipe, struct pipe_surface* surf)
413 {
414 struct nvfx_context* nvfx = (struct nvfx_context*)pipe;
415 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
416 boolean bound = FALSE;
417
418 /* must be done before the copy, otherwise the copy will use the temp as destination */
419 util_dirty_surface_set_clean(nvfx_surface_get_dirty_surfaces(surf), &ns->base);
420
421 nvfx_surface_copy_temp(pipe, surf, 0);
422
423 if(nvfx->framebuffer.zsbuf == surf)
424 bound = TRUE;
425 else
426 {
427 for(unsigned i = 0; i < nvfx->framebuffer.nr_cbufs; ++i)
428 {
429 if(nvfx->framebuffer.cbufs[i] == surf)
430 {
431 bound = TRUE;
432 break;
433 }
434 }
435 }
436
437 if(!bound)
438 pipe_resource_reference((struct pipe_resource**)&ns->temp, 0);
439 }
440
441 static void
442 nvfx_clear_render_target(struct pipe_context *pipe,
443 struct pipe_surface *dst,
444 const float *rgba,
445 unsigned dstx, unsigned dsty,
446 unsigned width, unsigned height)
447 {
448 union util_color uc;
449 util_pack_color(rgba, dst->format, &uc);
450
451 if(util_format_get_blocksizebits(dst->format) > 32
452 || nvfx_surface_fill(pipe, dst, dstx, dsty, width, height, uc.ui))
453 {
454 // TODO: probably should use hardware clear here instead if possible
455 struct blitter_context* blitter = nvfx_get_blitter(pipe, 0);
456 util_blitter_clear_render_target(blitter, dst, rgba, dstx, dsty, width, height);
457 }
458 }
459
460 static void
461 nvfx_clear_depth_stencil(struct pipe_context *pipe,
462 struct pipe_surface *dst,
463 unsigned clear_flags,
464 double depth,
465 unsigned stencil,
466 unsigned dstx, unsigned dsty,
467 unsigned width, unsigned height)
468 {
469 if(util_format_get_blocksizebits(dst->format) > 32
470 || nvfx_surface_fill(pipe, dst, dstx, dsty, width, height, util_pack_z_stencil(dst->format, depth, stencil)))
471 {
472 // TODO: probably should use hardware clear here instead if possible
473 struct blitter_context* blitter = nvfx_get_blitter(pipe, 0);
474 util_blitter_clear_depth_stencil(blitter, dst, clear_flags, depth, stencil, dstx, dsty, width, height);
475 }
476 }
477
478
479 void
480 nvfx_init_surface_functions(struct nvfx_context *nvfx)
481 {
482 nvfx->pipe.resource_copy_region = nvfx_resource_copy_region;
483 nvfx->pipe.clear_render_target = nvfx_clear_render_target;
484 nvfx->pipe.clear_depth_stencil = nvfx_clear_depth_stencil;
485 }