nvfx: fix swizzling of high bpp surfaces
[mesa.git] / src / gallium / drivers / nvfx / nvfx_surface.c
1
2 /**************************************************************************
3 *
4 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * All Rights Reserved.
6 *
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12 * permit persons to whom the Software is furnished to do so, subject to
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14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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27 **************************************************************************/
28
29 #include "pipe/p_context.h"
30 #include "pipe/p_format.h"
31 #include "util/u_format.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34 #include "util/u_pack_color.h"
35 #include "util/u_blitter.h"
36
37 #include "nouveau/nouveau_winsys.h"
38 #include "nouveau/nouveau_screen.h"
39 #include "nvfx_context.h"
40 #include "nvfx_screen.h"
41 #include "nvfx_resource.h"
42 #include "nv04_2d.h"
43
44 #include <nouveau/nouveau_bo.h>
45
46 static INLINE void
47 nvfx_region_set_format(struct nv04_region* rgn, enum pipe_format format)
48 {
49 unsigned bits = util_format_get_blocksizebits(format);
50 unsigned shift = 0;
51 switch(bits)
52 {
53 case 8:
54 rgn->bpps = 0;
55 break;
56 case 16:
57 rgn->bpps = 1;
58 break;
59 case 32:
60 rgn->bpps = 2;
61 break;
62 case 64:
63 rgn->bpps = 2;
64 shift = 1;
65 break;
66 case 128:
67 rgn->bpps = 2;
68 shift = 2;
69 break;
70 }
71
72 if(shift) {
73 rgn->x = util_format_get_nblocksx(format, rgn->x) << shift;
74 rgn->y = util_format_get_nblocksy(format, rgn->y);
75 rgn->w <<= shift;
76 }
77 }
78
79 static INLINE void
80 nvfx_region_init_for_surface(struct nv04_region* rgn, struct nvfx_surface* surf, unsigned x, unsigned y, bool for_write)
81 {
82 rgn->x = x;
83 rgn->y = y;
84 rgn->z = 0;
85
86 if(surf->temp)
87 {
88 rgn->bo = surf->temp->base.bo;
89 rgn->offset = 0;
90 rgn->pitch = surf->temp->linear_pitch;
91
92 if(for_write)
93 util_dirty_surface_set_dirty(nvfx_surface_get_dirty_surfaces(&surf->base.base), &surf->base);
94 } else {
95 rgn->bo = ((struct nvfx_resource*)surf->base.base.texture)->bo;
96 rgn->offset = surf->base.base.offset;
97
98 if(surf->base.base.texture->flags & NVFX_RESOURCE_FLAG_LINEAR)
99 rgn->pitch = surf->pitch;
100 else
101 {
102 rgn->pitch = 0;
103 rgn->z = surf->base.base.zslice;
104 rgn->w = surf->base.base.width;
105 rgn->h = surf->base.base.height;
106 rgn->d = u_minify(surf->base.base.texture->depth0, surf->base.base.level);
107 }
108 }
109
110 nvfx_region_set_format(rgn, surf->base.base.format);
111 if(!rgn->pitch)
112 nv04_region_try_to_linearize(rgn);
113 }
114
115 static INLINE void
116 nvfx_region_init_for_subresource(struct nv04_region* rgn, struct pipe_resource* pt, struct pipe_subresource sub, unsigned x, unsigned y, unsigned z, bool for_write)
117 {
118 if(pt->target != PIPE_BUFFER)
119 {
120 struct nvfx_surface* ns = (struct nvfx_surface*)util_surfaces_peek(&((struct nvfx_miptree*)pt)->surfaces, pt, sub.face, sub.level, z);
121 if(ns && util_dirty_surface_is_dirty(&ns->base))
122 {
123 nvfx_region_init_for_surface(rgn, ns, x, y, for_write);
124 return;
125 }
126 }
127
128 rgn->bo = ((struct nvfx_resource*)pt)->bo;
129 rgn->offset = nvfx_subresource_offset(pt, sub.face, sub.level, z);
130 rgn->x = x;
131 rgn->y = y;
132
133 if(pt->flags & NVFX_RESOURCE_FLAG_LINEAR)
134 {
135 rgn->pitch = nvfx_subresource_pitch(pt, sub.level);
136 rgn->z = 0;
137 }
138 else
139 {
140 rgn->pitch = 0;
141 rgn->z = z;
142 rgn->w = u_minify(pt->width0, sub.level);
143 rgn->h = u_minify(pt->height0, sub.level);
144 rgn->d = u_minify(pt->depth0, sub.level);
145 }
146
147 nvfx_region_set_format(rgn, pt->format);
148 if(!rgn->pitch)
149 nv04_region_try_to_linearize(rgn);
150 }
151
152 // TODO: actually test this for all formats, it's probably wrong for some...
153
154 static INLINE int
155 nvfx_surface_format(enum pipe_format format)
156 {
157 switch(util_format_get_blocksize(format)) {
158 case 1:
159 return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8;
160 case 2:
161 //return NV04_CONTEXT_SURFACES_2D_FORMAT_Y16;
162 return NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5;
163 case 4:
164 //if(format == PIPE_FORMAT_B8G8R8X8_UNORM || format == PIPE_FORMAT_B8G8R8A8_UNORM)
165 return NV04_CONTEXT_SURFACES_2D_FORMAT_A8R8G8B8;
166 //else
167 // return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32;
168 default:
169 return -1;
170 }
171 }
172
173 static INLINE int
174 nv04_scaled_image_format(enum pipe_format format)
175 {
176 switch(util_format_get_blocksize(format)) {
177 case 1:
178 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8;
179 case 2:
180 //if(format == PIPE_FORMAT_B5G5R5A1_UNORM)
181 // return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5;
182 //else
183 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5;
184 case 4:
185 if(format == PIPE_FORMAT_B8G8R8X8_UNORM)
186 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8;
187 else
188 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8;
189 default:
190 return -1;
191 }
192 }
193
194 // don't save index buffer because blitter doesn't setit
195 static struct blitter_context*
196 nvfx_get_blitter(struct pipe_context* pipe, int copy)
197 {
198 struct nvfx_context* nvfx = nvfx_context(pipe);
199
200 assert(nvfx->blitters_in_use < Elements(nvfx->blitter));
201
202 struct blitter_context** pblitter = &nvfx->blitter[nvfx->blitters_in_use++];
203 if(!*pblitter)
204 *pblitter = util_blitter_create(pipe);
205 struct blitter_context* blitter = *pblitter;
206
207 util_blitter_save_blend(blitter, nvfx->blend);
208 util_blitter_save_depth_stencil_alpha(blitter, nvfx->zsa);
209 util_blitter_save_stencil_ref(blitter, &nvfx->stencil_ref);
210 util_blitter_save_rasterizer(blitter, nvfx->rasterizer);
211 util_blitter_save_fragment_shader(blitter, nvfx->fragprog);
212 util_blitter_save_vertex_shader(blitter, nvfx->vertprog);
213 util_blitter_save_viewport(blitter, &nvfx->viewport);
214 util_blitter_save_framebuffer(blitter, &nvfx->framebuffer);
215 util_blitter_save_clip(blitter, &nvfx->clip);
216 util_blitter_save_vertex_elements(blitter, nvfx->vtxelt);
217 util_blitter_save_vertex_buffers(blitter, nvfx->vtxbuf_nr, nvfx->vtxbuf);
218
219 if(copy)
220 {
221 util_blitter_save_fragment_sampler_states(blitter, nvfx->nr_samplers, (void**)nvfx->tex_sampler);
222 util_blitter_save_fragment_sampler_views(blitter, nvfx->nr_textures, nvfx->fragment_sampler_views);
223 }
224
225 return blitter;
226 }
227
228 static inline void
229 nvfx_put_blitter(struct pipe_context* pipe, struct blitter_context* blitter)
230 {
231 struct nvfx_context* nvfx = nvfx_context(pipe);
232 --nvfx->blitters_in_use;
233 assert(nvfx->blitters_in_use >= 0);
234 }
235
236 static unsigned
237 nvfx_region_clone(struct nv04_2d_context* ctx, struct nv04_region* rgn, unsigned w, unsigned h, boolean for_read)
238 {
239 unsigned begin = nv04_region_begin(rgn, w, h);
240 unsigned end = nv04_region_end(rgn, w, h);
241 unsigned size = end - begin;
242 struct nouveau_bo* bo = 0;
243 nouveau_bo_new(rgn->bo->device, NOUVEAU_BO_MAP | NOUVEAU_BO_GART, 256, size, &bo);
244
245 if(for_read || (size > ((w * h) << rgn->bpps)))
246 nv04_memcpy(ctx, bo, 0, rgn->bo, rgn->offset + begin, size);
247
248 rgn->bo = bo;
249 rgn->offset = -begin;
250 return begin;
251 }
252
253 static void
254 nvfx_resource_copy_region(struct pipe_context *pipe,
255 struct pipe_resource *dstr, struct pipe_subresource subdst,
256 unsigned dstx, unsigned dsty, unsigned dstz,
257 struct pipe_resource *srcr, struct pipe_subresource subsrc,
258 unsigned srcx, unsigned srcy, unsigned srcz,
259 unsigned w, unsigned h)
260 {
261 static int copy_threshold = -1;
262 struct nv04_2d_context *ctx = nvfx_screen(pipe->screen)->eng2d;
263 struct nv04_region dst, src;
264 int dst_to_gpu;
265 int src_on_gpu;
266 boolean small;
267 int ret;
268
269 if(!w || !h)
270 return;
271
272 if(copy_threshold < 0)
273 copy_threshold = debug_get_num_option("NOUVEAU_COPY_THRESHOLD", 4);
274
275 dst_to_gpu = dstr->usage != PIPE_USAGE_DYNAMIC && dstr->usage != PIPE_USAGE_STAGING;
276 src_on_gpu = nvfx_resource_on_gpu(srcr);
277
278 nvfx_region_init_for_subresource(&dst, dstr, subdst, dstx, dsty, dstz, TRUE);
279 nvfx_region_init_for_subresource(&src, srcr, subsrc, srcx, srcy, srcz, FALSE);
280 w = util_format_get_stride(dstr->format, w) >> dst.bpps;
281 h = util_format_get_nblocksy(dstr->format, h);
282
283 small = (w * h <= copy_threshold);
284 if((!dst_to_gpu || !src_on_gpu) && small)
285 ret = -1; /* use the CPU */
286 else
287 ret = nv04_region_copy_2d(ctx, &dst, &src, w, h,
288 dstr->target == PIPE_BUFFER ? -1 : nvfx_surface_format(dstr->format),
289 dstr->target == PIPE_BUFFER ? -1 : nv04_scaled_image_format(dstr->format),
290 dst_to_gpu, src_on_gpu);
291 if(!ret)
292 {}
293 else if(ret > 0 && dstr->bind & PIPE_BIND_RENDER_TARGET && srcr->bind & PIPE_BIND_SAMPLER_VIEW)
294 {
295 struct blitter_context* blitter = nvfx_get_blitter(pipe, 1);
296 util_blitter_copy_region(blitter, dstr, subdst, dstx, dsty, dstz, srcr, subsrc, srcx, srcy, srcz, w, h, TRUE);
297 nvfx_put_blitter(pipe, blitter);
298 }
299 else
300 {
301 struct nv04_region dstt = dst;
302 struct nv04_region srct = src;
303 unsigned dstbegin = 0;
304
305 if(!small)
306 {
307 if(src_on_gpu)
308 nvfx_region_clone(ctx, &srct, w, h, TRUE);
309
310 if(dst_to_gpu)
311 dstbegin = nvfx_region_clone(ctx, &dstt, w, h, FALSE);
312 }
313
314 nv04_region_copy_cpu(&dstt, &srct, w, h);
315
316 if(srct.bo != src.bo)
317 nouveau_screen_bo_release(pipe->screen, srct.bo);
318
319 if(dstt.bo != dst.bo)
320 {
321 nv04_memcpy(ctx, dst.bo, dst.offset + dstbegin, dstt.bo, 0, dstt.bo->size);
322 nouveau_screen_bo_release(pipe->screen, dstt.bo);
323 }
324 }
325 }
326
327 static int
328 nvfx_surface_fill(struct pipe_context* pipe, struct pipe_surface *dsts,
329 unsigned dx, unsigned dy, unsigned w, unsigned h, unsigned value)
330 {
331 struct nv04_2d_context *ctx = nvfx_screen(pipe->screen)->eng2d;
332 struct nv04_region dst;
333 int ret;
334 /* Always try to use the GPU right now, if possible
335 * If the user wanted the surface data on the CPU, he would have cleared with memset (hopefully) */
336
337 // we don't care about interior pixel order since we set all them to the same value
338 nvfx_region_init_for_surface(&dst, (struct nvfx_surface*)dsts, dx, dy, TRUE);
339
340 w = util_format_get_stride(dsts->format, w) >> dst.bpps;
341 h = util_format_get_nblocksy(dsts->format, h);
342
343 ret = nv04_region_fill_2d(ctx, &dst, w, h, value);
344 if(ret > 0 && dsts->texture->bind & PIPE_BIND_RENDER_TARGET)
345 return 1;
346 else if(ret)
347 {
348 struct nv04_region dstt = dst;
349 unsigned dstbegin = 0;
350
351 if(nvfx_resource_on_gpu(dsts->texture))
352 dstbegin = nvfx_region_clone(ctx, &dstt, w, h, FALSE);
353
354 nv04_region_fill_cpu(&dstt, w, h, value);
355
356 if(dstt.bo != dst.bo)
357 {
358 nv04_memcpy(ctx, dst.bo, dst.offset + dstbegin, dstt.bo, 0, dstt.bo->size);
359 nouveau_screen_bo_release(pipe->screen, dstt.bo);
360 }
361 }
362
363 return 0;
364 }
365
366
367 void
368 nvfx_screen_surface_takedown(struct pipe_screen *pscreen)
369 {
370 nv04_2d_context_takedown(nvfx_screen(pscreen)->eng2d);
371 nvfx_screen(pscreen)->eng2d = 0;
372 }
373
374 int
375 nvfx_screen_surface_init(struct pipe_screen *pscreen)
376 {
377 struct nv04_2d_context* ctx = nv04_2d_context_init(nouveau_screen(pscreen)->channel);
378 if(!ctx)
379 return -1;
380 nvfx_screen(pscreen)->eng2d = ctx;
381 return 0;
382 }
383
384 static void
385 nvfx_surface_copy_temp(struct pipe_context* pipe, struct pipe_surface* surf, int to_temp)
386 {
387 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
388 struct pipe_subresource tempsr, surfsr;
389 struct nvfx_context* nvfx = nvfx_context(pipe);
390
391 /* temporarily detach the temp, so it isn't used in place of the actual resource */
392 struct nvfx_miptree* temp = ns->temp;
393 ns->temp = 0;
394
395 // TODO: we really should do this validation before setting these variable in draw calls
396 unsigned use_vertex_buffers = nvfx->use_vertex_buffers;
397 boolean use_index_buffer = nvfx->use_index_buffer;
398 unsigned base_vertex = nvfx->base_vertex;
399
400 tempsr.face = 0;
401 tempsr.level = 0;
402 surfsr.face = surf->face;
403 surfsr.level = surf->level;
404
405 if(to_temp)
406 nvfx_resource_copy_region(pipe, &temp->base.base, tempsr, 0, 0, 0, surf->texture, surfsr, 0, 0, surf->zslice, surf->width, surf->height);
407 else
408 nvfx_resource_copy_region(pipe, surf->texture, surfsr, 0, 0, surf->zslice, &temp->base.base, tempsr, 0, 0, 0, surf->width, surf->height);
409
410 /* If this triggers, it probably means we attempted to use the blitter
411 * but failed due to non-renderability of the target.
412 * Obviously, this would lead to infinite recursion if supported. */
413 assert(!ns->temp);
414
415 ns->temp = temp;
416
417 nvfx->use_vertex_buffers = use_vertex_buffers;
418 nvfx->use_index_buffer = use_index_buffer;
419 nvfx->base_vertex = base_vertex;
420
421 nvfx->dirty |= NVFX_NEW_ARRAYS;
422 nvfx->draw_dirty |= NVFX_NEW_ARRAYS;
423 }
424
425 void
426 nvfx_surface_create_temp(struct pipe_context* pipe, struct pipe_surface* surf)
427 {
428 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
429 struct pipe_resource template;
430 memset(&template, 0, sizeof(struct pipe_resource));
431 template.target = PIPE_TEXTURE_2D;
432 template.format = surf->format;
433 template.width0 = surf->width;
434 template.height0 = surf->height;
435 template.depth0 = 1;
436 template.nr_samples = surf->texture->nr_samples;
437 template.flags = NVFX_RESOURCE_FLAG_LINEAR;
438
439 assert(!ns->temp && !util_dirty_surface_is_dirty(&ns->base));
440
441 ns->temp = (struct nvfx_miptree*)nvfx_miptree_create(pipe->screen, &template);
442 nvfx_surface_copy_temp(pipe, surf, 1);
443 }
444
445 void
446 nvfx_surface_flush(struct pipe_context* pipe, struct pipe_surface* surf)
447 {
448 struct nvfx_context* nvfx = (struct nvfx_context*)pipe;
449 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
450 boolean bound = FALSE;
451
452 nvfx_surface_copy_temp(pipe, surf, 0);
453
454 util_dirty_surface_set_clean(nvfx_surface_get_dirty_surfaces(surf), &ns->base);
455
456 if(nvfx->framebuffer.zsbuf == surf)
457 bound = TRUE;
458 else
459 {
460 for(unsigned i = 0; i < nvfx->framebuffer.nr_cbufs; ++i)
461 {
462 if(nvfx->framebuffer.cbufs[i] == surf)
463 {
464 bound = TRUE;
465 break;
466 }
467 }
468 }
469
470 if(!bound)
471 pipe_resource_reference((struct pipe_resource**)&ns->temp, 0);
472 }
473
474 static void
475 nvfx_clear_render_target(struct pipe_context *pipe,
476 struct pipe_surface *dst,
477 const float *rgba,
478 unsigned dstx, unsigned dsty,
479 unsigned width, unsigned height)
480 {
481 union util_color uc;
482 util_pack_color(rgba, dst->format, &uc);
483
484 if(util_format_get_blocksizebits(dst->format) > 32
485 || nvfx_surface_fill(pipe, dst, dstx, dsty, width, height, uc.ui))
486 {
487 // TODO: probably should use hardware clear here instead if possible
488 struct blitter_context* blitter = nvfx_get_blitter(pipe, 0);
489 util_blitter_clear_render_target(blitter, dst, rgba, dstx, dsty, width, height);
490 nvfx_put_blitter(pipe, blitter);
491 }
492 }
493
494 static void
495 nvfx_clear_depth_stencil(struct pipe_context *pipe,
496 struct pipe_surface *dst,
497 unsigned clear_flags,
498 double depth,
499 unsigned stencil,
500 unsigned dstx, unsigned dsty,
501 unsigned width, unsigned height)
502 {
503 if(util_format_get_blocksizebits(dst->format) > 32
504 || nvfx_surface_fill(pipe, dst, dstx, dsty, width, height, util_pack_z_stencil(dst->format, depth, stencil)))
505 {
506 // TODO: probably should use hardware clear here instead if possible
507 struct blitter_context* blitter = nvfx_get_blitter(pipe, 0);
508 util_blitter_clear_depth_stencil(blitter, dst, clear_flags, depth, stencil, dstx, dsty, width, height);
509 nvfx_put_blitter(pipe, blitter);
510 }
511 }
512
513
514 void
515 nvfx_init_surface_functions(struct nvfx_context *nvfx)
516 {
517 nvfx->pipe.resource_copy_region = nvfx_resource_copy_region;
518 nvfx->pipe.clear_render_target = nvfx_clear_render_target;
519 nvfx->pipe.clear_depth_stencil = nvfx_clear_depth_stencil;
520 }