Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/mesa into pipe-video
[mesa.git] / src / gallium / drivers / nvfx / nvfx_surface.c
1
2 /**************************************************************************
3 *
4 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29 #include "pipe/p_context.h"
30 #include "pipe/p_format.h"
31 #include "util/u_format.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34 #include "util/u_pack_color.h"
35 #include "util/u_blitter.h"
36
37 #include "nouveau/nouveau_winsys.h"
38 #include "nouveau/nouveau_screen.h"
39 #include "nvfx_context.h"
40 #include "nvfx_screen.h"
41 #include "nvfx_resource.h"
42 #include "nv04_2d.h"
43
44 #include <nouveau/nouveau_bo.h>
45
46 static INLINE void
47 nvfx_region_set_format(struct nv04_region* rgn, enum pipe_format format)
48 {
49 unsigned bits = util_format_get_blocksizebits(format);
50 unsigned shift = 0;
51 rgn->one_bits = 0;
52
53 switch(bits)
54 {
55 case 8:
56 rgn->bpps = 0;
57 break;
58 case 16:
59 rgn->bpps = 1;
60 if(format == PIPE_FORMAT_B5G5R5X1_UNORM)
61 rgn->one_bits = 1;
62 break;
63 case 32:
64 rgn->bpps = 2;
65 if(format == PIPE_FORMAT_R8G8B8X8_UNORM || format == PIPE_FORMAT_B8G8R8X8_UNORM)
66 rgn->one_bits = 8;
67 break;
68 case 64:
69 rgn->bpps = 2;
70 shift = 1;
71 break;
72 case 128:
73 rgn->bpps = 2;
74 shift = 2;
75 break;
76 }
77
78 if(shift) {
79 rgn->x = util_format_get_nblocksx(format, rgn->x) << shift;
80 rgn->y = util_format_get_nblocksy(format, rgn->y);
81 rgn->w <<= shift;
82 }
83 }
84
85 static INLINE void
86 nvfx_region_init_for_surface(struct nv04_region* rgn, struct nvfx_surface* surf, unsigned x, unsigned y, bool for_write)
87 {
88 rgn->x = x;
89 rgn->y = y;
90 rgn->z = 0;
91
92 if(surf->temp)
93 {
94 rgn->bo = surf->temp->base.bo;
95 rgn->offset = 0;
96 rgn->pitch = surf->temp->linear_pitch;
97
98 if(for_write)
99 util_dirty_surface_set_dirty(nvfx_surface_get_dirty_surfaces(&surf->base.base), &surf->base);
100 } else {
101 rgn->bo = ((struct nvfx_resource*)surf->base.base.texture)->bo;
102 rgn->offset = surf->base.base.offset;
103
104 if(surf->base.base.texture->flags & NVFX_RESOURCE_FLAG_LINEAR)
105 rgn->pitch = surf->pitch;
106 else
107 {
108 rgn->pitch = 0;
109 rgn->z = surf->base.base.zslice;
110 rgn->w = surf->base.base.width;
111 rgn->h = surf->base.base.height;
112 rgn->d = u_minify(surf->base.base.texture->depth0, surf->base.base.level);
113 }
114 }
115
116 nvfx_region_set_format(rgn, surf->base.base.format);
117 if(!rgn->pitch)
118 nv04_region_try_to_linearize(rgn);
119 }
120
121 static INLINE void
122 nvfx_region_init_for_subresource(struct nv04_region* rgn, struct pipe_resource* pt, struct pipe_subresource sub, unsigned x, unsigned y, unsigned z, bool for_write)
123 {
124 if(pt->target != PIPE_BUFFER)
125 {
126 struct nvfx_surface* ns = (struct nvfx_surface*)util_surfaces_peek(&((struct nvfx_miptree*)pt)->surfaces, pt, sub.face, sub.level, z);
127 if(ns && util_dirty_surface_is_dirty(&ns->base))
128 {
129 nvfx_region_init_for_surface(rgn, ns, x, y, for_write);
130 return;
131 }
132 }
133
134 rgn->bo = ((struct nvfx_resource*)pt)->bo;
135 rgn->offset = nvfx_subresource_offset(pt, sub.face, sub.level, z);
136 rgn->x = x;
137 rgn->y = y;
138
139 if(pt->flags & NVFX_RESOURCE_FLAG_LINEAR)
140 {
141 rgn->pitch = nvfx_subresource_pitch(pt, sub.level);
142 rgn->z = 0;
143 }
144 else
145 {
146 rgn->pitch = 0;
147 rgn->z = z;
148 rgn->w = u_minify(pt->width0, sub.level);
149 rgn->h = u_minify(pt->height0, sub.level);
150 rgn->d = u_minify(pt->depth0, sub.level);
151 }
152
153 nvfx_region_set_format(rgn, pt->format);
154 if(!rgn->pitch)
155 nv04_region_try_to_linearize(rgn);
156 }
157
158 // don't save index buffer because blitter doesn't setit
159 static struct blitter_context*
160 nvfx_get_blitter(struct pipe_context* pipe, int copy)
161 {
162 struct nvfx_context* nvfx = nvfx_context(pipe);
163 struct blitter_context** pblitter;
164 struct blitter_context* blitter;
165
166 assert(nvfx->blitters_in_use < Elements(nvfx->blitter));
167
168 if(nvfx->query && !nvfx->blitters_in_use)
169 {
170 struct nouveau_channel* chan = nvfx->screen->base.channel;
171 WAIT_RING(chan, 2);
172 OUT_RING(chan, RING_3D(NV30_3D_QUERY_ENABLE, 1));
173 OUT_RING(chan, 0);
174 }
175
176 pblitter = &nvfx->blitter[nvfx->blitters_in_use++];
177 if(!*pblitter)
178 *pblitter = util_blitter_create(pipe);
179 blitter = *pblitter;
180
181 util_blitter_save_blend(blitter, nvfx->blend);
182 util_blitter_save_depth_stencil_alpha(blitter, nvfx->zsa);
183 util_blitter_save_stencil_ref(blitter, &nvfx->stencil_ref);
184 util_blitter_save_rasterizer(blitter, nvfx->rasterizer);
185 util_blitter_save_fragment_shader(blitter, nvfx->fragprog);
186 util_blitter_save_vertex_shader(blitter, nvfx->vertprog);
187 util_blitter_save_viewport(blitter, &nvfx->viewport);
188 util_blitter_save_framebuffer(blitter, &nvfx->framebuffer);
189 util_blitter_save_clip(blitter, &nvfx->clip);
190 util_blitter_save_vertex_elements(blitter, nvfx->vtxelt);
191 util_blitter_save_vertex_buffers(blitter, nvfx->vtxbuf_nr, nvfx->vtxbuf);
192
193 if(copy)
194 {
195 util_blitter_save_fragment_sampler_states(blitter, nvfx->nr_samplers, (void**)nvfx->tex_sampler);
196 util_blitter_save_fragment_sampler_views(blitter, nvfx->nr_textures, nvfx->fragment_sampler_views);
197 }
198
199 return blitter;
200 }
201
202 static inline void
203 nvfx_put_blitter(struct pipe_context* pipe, struct blitter_context* blitter)
204 {
205 struct nvfx_context* nvfx = nvfx_context(pipe);
206 --nvfx->blitters_in_use;
207 assert(nvfx->blitters_in_use >= 0);
208
209 if(nvfx->query && !nvfx->blitters_in_use)
210 {
211 struct nouveau_channel* chan = nvfx->screen->base.channel;
212 WAIT_RING(chan, 2);
213 OUT_RING(chan, RING_3D(NV30_3D_QUERY_ENABLE, 1));
214 OUT_RING(chan, 1);
215 }
216 }
217
218 static unsigned
219 nvfx_region_clone(struct nv04_2d_context* ctx, struct nv04_region* rgn, unsigned w, unsigned h, boolean for_read)
220 {
221 unsigned begin = nv04_region_begin(rgn, w, h);
222 unsigned end = nv04_region_end(rgn, w, h);
223 unsigned size = end - begin;
224 struct nouveau_bo* bo = 0;
225 nouveau_bo_new(rgn->bo->device, NOUVEAU_BO_MAP | NOUVEAU_BO_GART, 256, size, &bo);
226
227 if(for_read || (size > ((w * h) << rgn->bpps)))
228 nv04_memcpy(ctx, bo, 0, rgn->bo, rgn->offset + begin, size);
229
230 rgn->bo = bo;
231 rgn->offset = -begin;
232 return begin;
233 }
234
235 static void
236 nvfx_resource_copy_region(struct pipe_context *pipe,
237 struct pipe_resource *dstr, struct pipe_subresource subdst,
238 unsigned dstx, unsigned dsty, unsigned dstz,
239 struct pipe_resource *srcr, struct pipe_subresource subsrc,
240 unsigned srcx, unsigned srcy, unsigned srcz,
241 unsigned w, unsigned h)
242 {
243 static int copy_threshold = -1;
244 struct nv04_2d_context *ctx = nvfx_screen(pipe->screen)->eng2d;
245 struct nv04_region dst, src;
246 int dst_to_gpu;
247 int src_on_gpu;
248 boolean small;
249 int ret;
250
251 if(!w || !h)
252 return;
253
254 if(copy_threshold < 0)
255 copy_threshold = debug_get_num_option("NOUVEAU_COPY_THRESHOLD", 4);
256
257 dst_to_gpu = dstr->usage != PIPE_USAGE_DYNAMIC && dstr->usage != PIPE_USAGE_STAGING;
258 src_on_gpu = nvfx_resource_on_gpu(srcr);
259
260 nvfx_region_init_for_subresource(&dst, dstr, subdst, dstx, dsty, dstz, TRUE);
261 nvfx_region_init_for_subresource(&src, srcr, subsrc, srcx, srcy, srcz, FALSE);
262 w = util_format_get_stride(dstr->format, w) >> dst.bpps;
263 h = util_format_get_nblocksy(dstr->format, h);
264
265 small = (w * h <= copy_threshold);
266 if((!dst_to_gpu || !src_on_gpu) && small)
267 ret = -1; /* use the CPU */
268 else
269 ret = nv04_region_copy_2d(ctx, &dst, &src, w, h, dst_to_gpu, src_on_gpu);
270 if(!ret)
271 {}
272 else if(ret > 0
273 && dstr->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)
274 && srcr->bind & PIPE_BIND_SAMPLER_VIEW)
275 {
276 /* this currently works because we hack the bind flags on resource creation to be
277 * the maximum set that the resource type actually supports
278 *
279 * TODO: perhaps support reinterpreting the formats
280 */
281 struct blitter_context* blitter = nvfx_get_blitter(pipe, 1);
282 util_blitter_copy_region(blitter, dstr, subdst, dstx, dsty, dstz, srcr, subsrc, srcx, srcy, srcz, w, h, TRUE);
283 nvfx_put_blitter(pipe, blitter);
284 }
285 else
286 {
287 struct nv04_region dstt = dst;
288 struct nv04_region srct = src;
289 unsigned dstbegin = 0;
290
291 if(!small)
292 {
293 if(src_on_gpu)
294 nvfx_region_clone(ctx, &srct, w, h, TRUE);
295
296 if(dst_to_gpu)
297 dstbegin = nvfx_region_clone(ctx, &dstt, w, h, FALSE);
298 }
299
300 nv04_region_copy_cpu(&dstt, &srct, w, h);
301
302 if(srct.bo != src.bo)
303 nouveau_screen_bo_release(pipe->screen, srct.bo);
304
305 if(dstt.bo != dst.bo)
306 {
307 nv04_memcpy(ctx, dst.bo, dst.offset + dstbegin, dstt.bo, 0, dstt.bo->size);
308 nouveau_screen_bo_release(pipe->screen, dstt.bo);
309 }
310 }
311 }
312
313 static int
314 nvfx_surface_fill(struct pipe_context* pipe, struct pipe_surface *dsts,
315 unsigned dx, unsigned dy, unsigned w, unsigned h, unsigned value)
316 {
317 struct nv04_2d_context *ctx = nvfx_screen(pipe->screen)->eng2d;
318 struct nv04_region dst;
319 int ret;
320 /* Always try to use the GPU right now, if possible
321 * If the user wanted the surface data on the CPU, he would have cleared with memset (hopefully) */
322
323 // we don't care about interior pixel order since we set all them to the same value
324 nvfx_region_init_for_surface(&dst, (struct nvfx_surface*)dsts, dx, dy, TRUE);
325
326 w = util_format_get_stride(dsts->format, w) >> dst.bpps;
327 h = util_format_get_nblocksy(dsts->format, h);
328
329 ret = nv04_region_fill_2d(ctx, &dst, w, h, value);
330 if(ret > 0 && dsts->texture->bind & PIPE_BIND_RENDER_TARGET)
331 return 1;
332 else if(ret)
333 {
334 struct nv04_region dstt = dst;
335 unsigned dstbegin = 0;
336
337 if(nvfx_resource_on_gpu(dsts->texture))
338 dstbegin = nvfx_region_clone(ctx, &dstt, w, h, FALSE);
339
340 nv04_region_fill_cpu(&dstt, w, h, value);
341
342 if(dstt.bo != dst.bo)
343 {
344 nv04_memcpy(ctx, dst.bo, dst.offset + dstbegin, dstt.bo, 0, dstt.bo->size);
345 nouveau_screen_bo_release(pipe->screen, dstt.bo);
346 }
347 }
348
349 return 0;
350 }
351
352
353 void
354 nvfx_screen_surface_takedown(struct pipe_screen *pscreen)
355 {
356 nv04_2d_context_takedown(nvfx_screen(pscreen)->eng2d);
357 nvfx_screen(pscreen)->eng2d = 0;
358 }
359
360 int
361 nvfx_screen_surface_init(struct pipe_screen *pscreen)
362 {
363 struct nv04_2d_context* ctx = nv04_2d_context_init(nouveau_screen(pscreen)->channel);
364 if(!ctx)
365 return -1;
366 nvfx_screen(pscreen)->eng2d = ctx;
367 return 0;
368 }
369
370 static void
371 nvfx_surface_copy_temp(struct pipe_context* pipe, struct pipe_surface* surf, int to_temp)
372 {
373 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
374 struct pipe_subresource tempsr, surfsr;
375 struct nvfx_context* nvfx = nvfx_context(pipe);
376 struct nvfx_miptree* temp;
377 unsigned use_vertex_buffers;
378 boolean use_index_buffer;
379 unsigned base_vertex;
380
381 /* temporarily detach the temp, so it isn't used in place of the actual resource */
382 temp = ns->temp;
383 ns->temp = 0;
384
385 // TODO: we really should do this validation before setting these variable in draw calls
386 use_vertex_buffers = nvfx->use_vertex_buffers;
387 use_index_buffer = nvfx->use_index_buffer;
388 base_vertex = nvfx->base_vertex;
389
390 tempsr.face = 0;
391 tempsr.level = 0;
392 surfsr.face = surf->face;
393 surfsr.level = surf->level;
394
395 if(to_temp)
396 nvfx_resource_copy_region(pipe, &temp->base.base, tempsr, 0, 0, 0, surf->texture, surfsr, 0, 0, surf->zslice, surf->width, surf->height);
397 else
398 nvfx_resource_copy_region(pipe, surf->texture, surfsr, 0, 0, surf->zslice, &temp->base.base, tempsr, 0, 0, 0, surf->width, surf->height);
399
400 /* If this triggers, it probably means we attempted to use the blitter
401 * but failed due to non-renderability of the target.
402 * Obviously, this would lead to infinite recursion if supported. */
403 assert(!ns->temp);
404
405 ns->temp = temp;
406
407 nvfx->use_vertex_buffers = use_vertex_buffers;
408 nvfx->use_index_buffer = use_index_buffer;
409 nvfx->base_vertex = base_vertex;
410
411 nvfx->dirty |= NVFX_NEW_ARRAYS;
412 nvfx->draw_dirty |= NVFX_NEW_ARRAYS;
413 }
414
415 void
416 nvfx_surface_create_temp(struct pipe_context* pipe, struct pipe_surface* surf)
417 {
418 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
419 struct pipe_resource template;
420 memset(&template, 0, sizeof(struct pipe_resource));
421 template.target = PIPE_TEXTURE_2D;
422 template.format = surf->format;
423 template.width0 = surf->width;
424 template.height0 = surf->height;
425 template.depth0 = 1;
426 template.nr_samples = surf->texture->nr_samples;
427 template.flags = NVFX_RESOURCE_FLAG_LINEAR;
428
429 assert(!ns->temp && !util_dirty_surface_is_dirty(&ns->base));
430
431 ns->temp = (struct nvfx_miptree*)nvfx_miptree_create(pipe->screen, &template);
432 nvfx_surface_copy_temp(pipe, surf, 1);
433 }
434
435 void
436 nvfx_surface_flush(struct pipe_context* pipe, struct pipe_surface* surf)
437 {
438 struct nvfx_context* nvfx = (struct nvfx_context*)pipe;
439 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
440 boolean bound = FALSE;
441
442 nvfx_surface_copy_temp(pipe, surf, 0);
443
444 util_dirty_surface_set_clean(nvfx_surface_get_dirty_surfaces(surf), &ns->base);
445
446 if(nvfx->framebuffer.zsbuf == surf)
447 bound = TRUE;
448 else
449 {
450 for(unsigned i = 0; i < nvfx->framebuffer.nr_cbufs; ++i)
451 {
452 if(nvfx->framebuffer.cbufs[i] == surf)
453 {
454 bound = TRUE;
455 break;
456 }
457 }
458 }
459
460 if(!bound)
461 pipe_resource_reference((struct pipe_resource**)&ns->temp, 0);
462 }
463
464 static void
465 nvfx_clear_render_target(struct pipe_context *pipe,
466 struct pipe_surface *dst,
467 const float *rgba,
468 unsigned dstx, unsigned dsty,
469 unsigned width, unsigned height)
470 {
471 union util_color uc;
472 util_pack_color(rgba, dst->format, &uc);
473
474 if(util_format_get_blocksizebits(dst->format) > 32
475 || nvfx_surface_fill(pipe, dst, dstx, dsty, width, height, uc.ui))
476 {
477 // TODO: probably should use hardware clear here instead if possible
478 struct blitter_context* blitter = nvfx_get_blitter(pipe, 0);
479 util_blitter_clear_render_target(blitter, dst, rgba, dstx, dsty, width, height);
480 nvfx_put_blitter(pipe, blitter);
481 }
482 }
483
484 static void
485 nvfx_clear_depth_stencil(struct pipe_context *pipe,
486 struct pipe_surface *dst,
487 unsigned clear_flags,
488 double depth,
489 unsigned stencil,
490 unsigned dstx, unsigned dsty,
491 unsigned width, unsigned height)
492 {
493 if(util_format_get_blocksizebits(dst->format) > 32
494 || nvfx_surface_fill(pipe, dst, dstx, dsty, width, height, util_pack_z_stencil(dst->format, depth, stencil)))
495 {
496 // TODO: probably should use hardware clear here instead if possible
497 struct blitter_context* blitter = nvfx_get_blitter(pipe, 0);
498 util_blitter_clear_depth_stencil(blitter, dst, clear_flags, depth, stencil, dstx, dsty, width, height);
499 nvfx_put_blitter(pipe, blitter);
500 }
501 }
502
503
504 void
505 nvfx_init_surface_functions(struct nvfx_context *nvfx)
506 {
507 nvfx->pipe.resource_copy_region = nvfx_resource_copy_region;
508 nvfx->pipe.clear_render_target = nvfx_clear_render_target;
509 nvfx->pipe.clear_depth_stencil = nvfx_clear_depth_stencil;
510 }