2 * © Copyright 2017-2018 Alyssa Rosenzweig
3 * © Copyright 2017-2018 Connor Abbott
4 * © Copyright 2017-2018 Lyude Paul
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
27 #ifndef __PANFROST_JOB_H__
28 #define __PANFROST_JOB_H__
31 #include <panfrost-misc.h>
33 #define MALI_SHORT_PTR_BITS (sizeof(uintptr_t)*8)
35 #define MALI_FBD_HIERARCHY_WEIGHTS 8
37 #define MALI_PAYLOAD_SIZE 256
39 typedef u32 mali_jd_core_req
;
44 JOB_TYPE_SET_VALUE
= 2,
45 JOB_TYPE_CACHE_FLUSH
= 3,
48 JOB_TYPE_GEOMETRY
= 6,
51 JOB_TYPE_FRAGMENT
= 9,
58 MALI_LINE_STRIP
= 0x4,
61 MALI_TRIANGLE_STRIP
= 0xA,
62 MALI_TRIANGLE_FAN
= 0xC,
65 MALI_QUAD_STRIP
= 0xF,
67 /* All other modes invalid */
70 /* Applies to tiler_gl_enables */
73 #define MALI_OCCLUSION_QUERY (1 << 3)
74 #define MALI_OCCLUSION_PRECISE (1 << 4)
76 #define MALI_FRONT_FACE(v) (v << 5)
80 #define MALI_CULL_FACE_FRONT (1 << 6)
81 #define MALI_CULL_FACE_BACK (1 << 7)
83 /* TODO: Might this actually be a finer bitfield? */
84 #define MALI_DEPTH_STENCIL_ENABLE 0x6400
86 #define DS_ENABLE(field) \
87 (field == MALI_DEPTH_STENCIL_ENABLE) \
88 ? "MALI_DEPTH_STENCIL_ENABLE" \
89 : (field == 0) ? "0" \
90 : "0 /* XXX: Unknown, check hexdump */"
92 /* Used in stencil and depth tests */
99 MALI_FUNC_GREATER
= 4,
100 MALI_FUNC_NOTEQUAL
= 5,
101 MALI_FUNC_GEQUAL
= 6,
105 /* Same OpenGL, but mixed up. Why? Because forget me, that's why! */
108 MALI_ALT_FUNC_NEVER
= 0,
109 MALI_ALT_FUNC_GREATER
= 1,
110 MALI_ALT_FUNC_EQUAL
= 2,
111 MALI_ALT_FUNC_GEQUAL
= 3,
112 MALI_ALT_FUNC_LESS
= 4,
113 MALI_ALT_FUNC_NOTEQUAL
= 5,
114 MALI_ALT_FUNC_LEQUAL
= 6,
115 MALI_ALT_FUNC_ALWAYS
= 7
118 /* Flags apply to unknown2_3? */
120 #define MALI_HAS_MSAA (1 << 0)
121 #define MALI_CAN_DISCARD (1 << 5)
123 /* Applies on SFBD systems, specifying that programmable blending is in use */
124 #define MALI_HAS_BLEND_SHADER (1 << 6)
126 /* func is mali_func */
127 #define MALI_DEPTH_FUNC(func) (func << 8)
128 #define MALI_GET_DEPTH_FUNC(flags) ((flags >> 8) & 0x7)
129 #define MALI_DEPTH_FUNC_MASK MALI_DEPTH_FUNC(0x7)
131 #define MALI_DEPTH_TEST (1 << 11)
133 /* Next flags to unknown2_4 */
134 #define MALI_STENCIL_TEST (1 << 0)
137 #define MALI_SAMPLE_ALPHA_TO_COVERAGE_NO_BLEND_SHADER (1 << 1)
139 #define MALI_NO_DITHER (1 << 9)
140 #define MALI_DEPTH_RANGE_A (1 << 12)
141 #define MALI_DEPTH_RANGE_B (1 << 13)
142 #define MALI_NO_MSAA (1 << 14)
144 /* Stencil test state is all encoded in a single u32, just with a lot of
147 enum mali_stencil_op
{
148 MALI_STENCIL_KEEP
= 0,
149 MALI_STENCIL_REPLACE
= 1,
150 MALI_STENCIL_ZERO
= 2,
151 MALI_STENCIL_INVERT
= 3,
152 MALI_STENCIL_INCR_WRAP
= 4,
153 MALI_STENCIL_DECR_WRAP
= 5,
154 MALI_STENCIL_INCR
= 6,
155 MALI_STENCIL_DECR
= 7
158 struct mali_stencil_test
{
161 enum mali_func func
: 3;
162 enum mali_stencil_op sfail
: 3;
163 enum mali_stencil_op dpfail
: 3;
164 enum mali_stencil_op dppass
: 3;
166 } __attribute__((packed
));
168 /* Blending is a mess, since anything fancy triggers a blend shader, and
169 * -those- are not understood whatsover yet */
171 #define MALI_MASK_R (1 << 0)
172 #define MALI_MASK_G (1 << 1)
173 #define MALI_MASK_B (1 << 2)
174 #define MALI_MASK_A (1 << 3)
176 enum mali_nondominant_mode
{
177 MALI_BLEND_NON_MIRROR
= 0,
178 MALI_BLEND_NON_ZERO
= 1
181 enum mali_dominant_blend
{
182 MALI_BLEND_DOM_SOURCE
= 0,
183 MALI_BLEND_DOM_DESTINATION
= 1
186 enum mali_dominant_factor
{
187 MALI_DOMINANT_UNK0
= 0,
188 MALI_DOMINANT_ZERO
= 1,
189 MALI_DOMINANT_SRC_COLOR
= 2,
190 MALI_DOMINANT_DST_COLOR
= 3,
191 MALI_DOMINANT_UNK4
= 4,
192 MALI_DOMINANT_SRC_ALPHA
= 5,
193 MALI_DOMINANT_DST_ALPHA
= 6,
194 MALI_DOMINANT_CONSTANT
= 7,
197 enum mali_blend_modifier
{
198 MALI_BLEND_MOD_UNK0
= 0,
199 MALI_BLEND_MOD_NORMAL
= 1,
200 MALI_BLEND_MOD_SOURCE_ONE
= 2,
201 MALI_BLEND_MOD_DEST_ONE
= 3,
204 struct mali_blend_mode
{
205 enum mali_blend_modifier clip_modifier
: 2;
206 unsigned unused_0
: 1;
207 unsigned negate_source
: 1;
209 enum mali_dominant_blend dominant
: 1;
211 enum mali_nondominant_mode nondominant_mode
: 1;
213 unsigned unused_1
: 1;
215 unsigned negate_dest
: 1;
217 enum mali_dominant_factor dominant_factor
: 3;
218 unsigned complement_dominant
: 1;
219 } __attribute__((packed
));
221 struct mali_blend_equation
{
222 /* Of type mali_blend_mode */
223 unsigned rgb_mode
: 12;
224 unsigned alpha_mode
: 12;
228 /* Corresponds to MALI_MASK_* above and glColorMask arguments */
230 unsigned color_mask
: 4;
231 } __attribute__((packed
));
233 /* Used with channel swizzling */
235 MALI_CHANNEL_RED
= 0,
236 MALI_CHANNEL_GREEN
= 1,
237 MALI_CHANNEL_BLUE
= 2,
238 MALI_CHANNEL_ALPHA
= 3,
239 MALI_CHANNEL_ZERO
= 4,
240 MALI_CHANNEL_ONE
= 5,
241 MALI_CHANNEL_RESERVED_0
= 6,
242 MALI_CHANNEL_RESERVED_1
= 7,
245 struct mali_channel_swizzle
{
246 enum mali_channel r
: 3;
247 enum mali_channel g
: 3;
248 enum mali_channel b
: 3;
249 enum mali_channel a
: 3;
250 } __attribute__((packed
));
252 /* Compressed per-pixel formats. Each of these formats expands to one to four
253 * floating-point or integer numbers, as defined by the OpenGL specification.
254 * There are various places in OpenGL where the user can specify a compressed
255 * format in memory, which all use the same 8-bit enum in the various
256 * descriptors, although different hardware units support different formats.
259 /* The top 3 bits specify how the bits of each component are interpreted. */
261 /* e.g. R11F_G11F_B10F */
262 #define MALI_FORMAT_SPECIAL (2 << 5)
264 /* signed normalized, e.g. RGBA8_SNORM */
265 #define MALI_FORMAT_SNORM (3 << 5)
268 #define MALI_FORMAT_UINT (4 << 5)
270 /* e.g. RGBA8 and RGBA32F */
271 #define MALI_FORMAT_UNORM (5 << 5)
273 /* e.g. RGBA8I and RGBA16F */
274 #define MALI_FORMAT_SINT (6 << 5)
276 /* These formats seem to largely duplicate the others. They're used at least
277 * for Bifrost framebuffer output.
279 #define MALI_FORMAT_SPECIAL2 (7 << 5)
281 /* If the high 3 bits are 3 to 6 these two bits say how many components
284 #define MALI_NR_CHANNELS(n) ((n - 1) << 3)
286 /* If the high 3 bits are 3 to 6, then the low 3 bits say how big each
287 * component is, except the special MALI_CHANNEL_FLOAT which overrides what the
291 #define MALI_CHANNEL_4 2
293 #define MALI_CHANNEL_8 3
295 #define MALI_CHANNEL_16 4
297 #define MALI_CHANNEL_32 5
299 /* For MALI_FORMAT_SINT it means a half-float (e.g. RG16F). For
300 * MALI_FORMAT_UNORM, it means a 32-bit float.
302 #define MALI_CHANNEL_FLOAT 7
305 MALI_RGB565
= MALI_FORMAT_SPECIAL
| 0x0,
306 MALI_RGB5_A1_UNORM
= MALI_FORMAT_SPECIAL
| 0x2,
307 MALI_RGB10_A2_UNORM
= MALI_FORMAT_SPECIAL
| 0x3,
308 MALI_RGB10_A2_SNORM
= MALI_FORMAT_SPECIAL
| 0x5,
309 MALI_RGB10_A2UI
= MALI_FORMAT_SPECIAL
| 0x7,
310 MALI_RGB10_A2I
= MALI_FORMAT_SPECIAL
| 0x9,
313 MALI_NV12
= MALI_FORMAT_SPECIAL
| 0xc,
315 MALI_Z32_UNORM
= MALI_FORMAT_SPECIAL
| 0xD,
316 MALI_R32_FIXED
= MALI_FORMAT_SPECIAL
| 0x11,
317 MALI_RG32_FIXED
= MALI_FORMAT_SPECIAL
| 0x12,
318 MALI_RGB32_FIXED
= MALI_FORMAT_SPECIAL
| 0x13,
319 MALI_RGBA32_FIXED
= MALI_FORMAT_SPECIAL
| 0x14,
320 MALI_R11F_G11F_B10F
= MALI_FORMAT_SPECIAL
| 0x19,
321 /* Only used for varyings, to indicate the transformed gl_Position */
322 MALI_VARYING_POS
= MALI_FORMAT_SPECIAL
| 0x1e,
323 /* Only used for varyings, to indicate that the write should be
326 MALI_VARYING_DISCARD
= MALI_FORMAT_SPECIAL
| 0x1f,
328 MALI_R8_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_8
,
329 MALI_R16_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_16
,
330 MALI_R32_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_32
,
331 MALI_RG8_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_8
,
332 MALI_RG16_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_16
,
333 MALI_RG32_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_32
,
334 MALI_RGB8_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_8
,
335 MALI_RGB16_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_16
,
336 MALI_RGB32_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_32
,
337 MALI_RGBA8_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_8
,
338 MALI_RGBA16_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_16
,
339 MALI_RGBA32_SNORM
= MALI_FORMAT_SNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_32
,
341 MALI_R8UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_8
,
342 MALI_R16UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_16
,
343 MALI_R32UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_32
,
344 MALI_RG8UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_8
,
345 MALI_RG16UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_16
,
346 MALI_RG32UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_32
,
347 MALI_RGB8UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_8
,
348 MALI_RGB16UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_16
,
349 MALI_RGB32UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_32
,
350 MALI_RGBA8UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_8
,
351 MALI_RGBA16UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_16
,
352 MALI_RGBA32UI
= MALI_FORMAT_UINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_32
,
354 MALI_R8_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_8
,
355 MALI_R16_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_16
,
356 MALI_R32_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_32
,
357 MALI_R32F
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_FLOAT
,
358 MALI_RG8_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_8
,
359 MALI_RG16_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_16
,
360 MALI_RG32_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_32
,
361 MALI_RG32F
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_FLOAT
,
362 MALI_RGB8_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_8
,
363 MALI_RGB16_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_16
,
364 MALI_RGB32_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_32
,
365 MALI_RGB32F
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_FLOAT
,
366 MALI_RGBA4_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_4
,
367 MALI_RGBA8_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_8
,
368 MALI_RGBA16_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_16
,
369 MALI_RGBA32_UNORM
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_32
,
370 MALI_RGBA32F
= MALI_FORMAT_UNORM
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_FLOAT
,
372 MALI_R8I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_8
,
373 MALI_R16I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_16
,
374 MALI_R32I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_32
,
375 MALI_R16F
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(1) | MALI_CHANNEL_FLOAT
,
376 MALI_RG8I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_8
,
377 MALI_RG16I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_16
,
378 MALI_RG32I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_32
,
379 MALI_RG16F
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(2) | MALI_CHANNEL_FLOAT
,
380 MALI_RGB8I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_8
,
381 MALI_RGB16I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_16
,
382 MALI_RGB32I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_32
,
383 MALI_RGB16F
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(3) | MALI_CHANNEL_FLOAT
,
384 MALI_RGBA8I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_8
,
385 MALI_RGBA16I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_16
,
386 MALI_RGBA32I
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_32
,
387 MALI_RGBA16F
= MALI_FORMAT_SINT
| MALI_NR_CHANNELS(4) | MALI_CHANNEL_FLOAT
,
389 MALI_RGBA4
= MALI_FORMAT_SPECIAL2
| 0x8,
390 MALI_RGBA8_2
= MALI_FORMAT_SPECIAL2
| 0xd,
391 MALI_RGB10_A2_2
= MALI_FORMAT_SPECIAL2
| 0xe,
395 /* Alpha coverage is encoded as 4-bits (from a clampf), with inversion
396 * literally performing a bitwise invert. This function produces slightly wrong
397 * results and I'm not sure why; some rounding issue I suppose... */
399 #define MALI_ALPHA_COVERAGE(clampf) ((uint16_t) (int) (clampf * 15.0f))
400 #define MALI_GET_ALPHA_COVERAGE(nibble) ((float) nibble / 15.0f)
402 /* Applies to unknown1 */
403 #define MALI_NO_ALPHA_TO_COVERAGE (1 << 10)
405 /* Flags denoting the fragment shader's use of tilebuffer readback. If the
406 * shader might read any part of the tilebuffer, set MALI_READS_TILEBUFFER. If
407 * it might read depth/stencil in particular, also set MALI_READS_ZS */
409 #define MALI_READS_ZS (1 << 12)
410 #define MALI_READS_TILEBUFFER (1 << 16)
412 /* The raw Midgard blend payload can either be an equation or a shader
413 * address, depending on the context */
415 union midgard_blend
{
419 struct mali_blend_equation equation
;
424 /* On MRT Midgard systems (using an MFBD), each render target gets its own
425 * blend descriptor */
427 struct midgard_blend_rt
{
428 /* Flags base value of 0x200 to enable the render target.
429 * OR with 0x1 for blending (anything other than REPLACE).
430 * OR with 0x2 for programmable blending with 0-2 registers
431 * OR with 0x3 for programmable blending with 2+ registers
435 union midgard_blend blend
;
436 } __attribute__((packed
));
438 /* On Bifrost systems (all MRT), each render target gets one of these
441 struct bifrost_blend_rt
{
442 /* This is likely an analogue of the flags on
443 * midgard_blend_rt */
445 u16 flags
; // = 0x200
447 /* Single-channel blend constants are encoded in a sort of
448 * fixed-point. Basically, the float is mapped to a byte, becoming
449 * a high byte, and then the lower-byte is added for precision.
450 * For the original float f:
452 * f = (constant_hi / 255) + (constant_lo / 65535)
454 * constant_hi = int(f / 255)
455 * constant_lo = 65535*f - (65535/255) * constant_hi
460 struct mali_blend_equation equation
;
463 * - 0x3 when this slot is unused (everything else is 0 except the index)
464 * - 0x11 when this is the fourth slot (and it's used)
465 + * - 0 when there is a blend shader
468 /* increments from 0 to 3 */
473 /* So far, I've only seen:
474 * - R001 for 1-component formats
475 * - RG01 for 2-component formats
476 * - RGB1 for 3-component formats
477 * - RGBA for 4-component formats
480 enum mali_format format
: 8;
482 /* Type of the shader output variable. Note, this can
483 * be different from the format.
485 * 0: f16 (mediump float)
486 * 1: f32 (highp float)
488 * 3: u32 (highp uint)
489 * 4: i16 (mediump int)
490 * 5: u16 (mediump uint)
496 /* Only the low 32 bits of the blend shader are stored, the
497 * high 32 bits are implicitly the same as the original shader.
498 * According to the kernel driver, the program counter for
499 * shaders is actually only 24 bits, so shaders cannot cross
500 * the 2^24-byte boundary, and neither can the blend shader.
501 * The blob handles this by allocating a 2^24 byte pool for
502 * shaders, and making sure that any blend shaders are stored
503 * in the same pool as the original shader. The kernel will
504 * make sure this allocation is aligned to 2^24 bytes.
508 } __attribute__((packed
));
510 /* Descriptor for the shader. Following this is at least one, up to four blend
511 * descriptors for each active render target */
513 struct mali_shader_meta
{
522 u32 uniform_buffer_count
: 4;
523 u32 unk1
: 28; // = 0x800000 for vertex, 0x958020 for tiler
526 /* 0x200 except MALI_NO_ALPHA_TO_COVERAGE. Mysterious 1
527 * other times. Who knows really? */
530 /* Whole number of uniform registers used, times two;
531 * whole number of work registers used (no scale).
533 unsigned work_count
: 5;
534 unsigned uniform_count
: 5;
535 unsigned unknown2
: 6;
539 /* On bifrost: Exactly the same as glPolygonOffset() for both.
540 * On midgard: Depth factor is exactly as passed to glPolygonOffset.
541 * Depth units is equal to the value passed to glDeptOhffset + 1.0f
542 * (use MALI_NEGATIVE)
552 u8 stencil_mask_front
;
553 u8 stencil_mask_back
;
556 struct mali_stencil_test stencil_front
;
557 struct mali_stencil_test stencil_back
;
562 /* On Bifrost, some system values are preloaded in
563 * registers R55-R62 by the thread dispatcher prior to
564 * the start of shader execution. This is a bitfield
565 * with one entry for each register saying which
566 * registers need to be preloaded. Right now, the known
570 * - R55 : gl_LocalInvocationID.xy
571 * - R56 : gl_LocalInvocationID.z + unknown in high 16 bits
572 * - R57 : gl_WorkGroupID.x
573 * - R58 : gl_WorkGroupID.y
574 * - R59 : gl_WorkGroupID.z
575 * - R60 : gl_GlobalInvocationID.x
576 * - R61 : gl_GlobalInvocationID.y/gl_VertexID (without base)
577 * - R62 : gl_GlobalInvocationID.z/gl_InstanceID (without base)
580 * - R55 : unknown, never seen (but the bit for this is
582 * - R56 : unknown (bit always unset)
583 * - R57 : gl_PrimitiveID
584 * - R58 : gl_FrontFacing in low bit, potentially other stuff
585 * - R59 : u16 fragment coordinates (used to compute
586 * gl_FragCoord.xy, together with sample positions)
587 * - R60 : gl_SampleMask (used in epilog, so pretty
588 * much always used, but the bit is always 0 -- is
589 * this just always pushed?)
590 * - R61 : gl_SampleMaskIn and gl_SampleID, used by
591 * varying interpolation.
592 * - R62 : unknown (bit always unset).
594 u32 preload_regs
: 8;
595 /* In units of 8 bytes or 64 bits, since the
596 * uniform/const port loads 64 bits at a time.
598 u32 uniform_count
: 7;
599 u32 unk4
: 10; // = 2
606 /* zero on bifrost */
609 /* Blending information for the older non-MRT Midgard HW. Check for
610 * MALI_HAS_BLEND_SHADER to decide how to interpret.
613 union midgard_blend blend
;
614 } __attribute__((packed
));
616 /* This only concerns hardware jobs */
618 /* Possible values for job_descriptor_size */
620 #define MALI_JOB_32 0
621 #define MALI_JOB_64 1
623 struct mali_job_descriptor_header
{
624 u32 exception_status
;
625 u32 first_incomplete_task
;
627 u8 job_descriptor_size
: 1;
628 enum mali_job_type job_type
: 7;
630 u8 unknown_flags
: 7;
632 u16 job_dependency_index_1
;
633 u16 job_dependency_index_2
;
639 } __attribute__((packed
));
641 struct mali_payload_set_value
{
644 } __attribute__((packed
));
646 /* Special attributes have a fixed index */
647 #define MALI_SPECIAL_ATTRIBUTE_BASE 16
648 #define MALI_VERTEX_ID (MALI_SPECIAL_ATTRIBUTE_BASE + 0)
649 #define MALI_INSTANCE_ID (MALI_SPECIAL_ATTRIBUTE_BASE + 1)
654 * This structure lets the attribute unit compute the address of an attribute
655 * given the vertex and instance ID. Unfortunately, the way this works is
656 * rather complicated when instancing is enabled.
658 * To explain this, first we need to explain how compute and vertex threads are
659 * dispatched. This is a guess (although a pretty firm guess!) since the
660 * details are mostly hidden from the driver, except for attribute instancing.
661 * When a quad is dispatched, it receives a single, linear index. However, we
662 * need to translate that index into a (vertex id, instance id) pair, or a
663 * (local id x, local id y, local id z) triple for compute shaders (although
664 * vertex shaders and compute shaders are handled almost identically).
665 * Focusing on vertex shaders, one option would be to do:
667 * vertex_id = linear_id % num_vertices
668 * instance_id = linear_id / num_vertices
670 * but this involves a costly division and modulus by an arbitrary number.
671 * Instead, we could pad num_vertices. We dispatch padded_num_vertices *
672 * num_instances threads instead of num_vertices * num_instances, which results
673 * in some "extra" threads with vertex_id >= num_vertices, which we have to
674 * discard. The more we pad num_vertices, the more "wasted" threads we
675 * dispatch, but the division is potentially easier.
677 * One straightforward choice is to pad num_vertices to the next power of two,
678 * which means that the division and modulus are just simple bit shifts and
679 * masking. But the actual algorithm is a bit more complicated. The thread
680 * dispatcher has special support for dividing by 3, 5, 7, and 9, in addition
681 * to dividing by a power of two. This is possibly using the technique
682 * described in patent US20170010862A1. As a result, padded_num_vertices can be
683 * 1, 3, 5, 7, or 9 times a power of two. This results in less wasted threads,
684 * since we need less padding.
686 * padded_num_vertices is picked by the hardware. The driver just specifies the
687 * actual number of vertices. At least for Mali G71, the first few cases are
690 * num_vertices | padded_num_vertices
697 * Note that padded_num_vertices is a multiple of four (presumably because
698 * threads are dispatched in groups of 4). Also, padded_num_vertices is always
699 * at least one more than num_vertices, which seems like a quirk of the
700 * hardware. For larger num_vertices, the hardware uses the following
701 * algorithm: using the binary representation of num_vertices, we look at the
702 * most significant set bit as well as the following 3 bits. Let n be the
703 * number of bits after those 4 bits. Then we set padded_num_vertices according
704 * to the following table:
706 * high bits | padded_num_vertices
713 * For example, if num_vertices = 70 is passed to glDraw(), its binary
714 * representation is 1000110, so n = 3 and the high bits are 1000, and
715 * therefore padded_num_vertices = 9 * 2^3 = 72.
717 * The attribute unit works in terms of the original linear_id. if
718 * num_instances = 1, then they are the same, and everything is simple.
719 * However, with instancing things get more complicated. There are four
720 * possible modes, two of them we can group together:
722 * 1. Use the linear_id directly. Only used when there is no instancing.
724 * 2. Use the linear_id modulo a constant. This is used for per-vertex
725 * attributes with instancing enabled by making the constant equal
726 * padded_num_vertices. Because the modulus is always padded_num_vertices, this
727 * mode only supports a modulus that is a power of 2 times 1, 3, 5, 7, or 9.
728 * The shift field specifies the power of two, while the extra_flags field
729 * specifies the odd number. If shift = n and extra_flags = m, then the modulus
730 * is (2m + 1) * 2^n. As an example, if num_vertices = 70, then as computed
731 * above, padded_num_vertices = 9 * 2^3, so we should set extra_flags = 4 and
732 * shift = 3. Note that we must exactly follow the hardware algorithm used to
733 * get padded_num_vertices in order to correctly implement per-vertex
736 * 3. Divide the linear_id by a constant. In order to correctly implement
737 * instance divisors, we have to divide linear_id by padded_num_vertices times
738 * to user-specified divisor. So first we compute padded_num_vertices, again
739 * following the exact same algorithm that the hardware uses, then multiply it
740 * by the GL-level divisor to get the hardware-level divisor. This case is
741 * further divided into two more cases. If the hardware-level divisor is a
742 * power of two, then we just need to shift. The shift amount is specified by
743 * the shift field, so that the hardware-level divisor is just 2^shift.
745 * If it isn't a power of two, then we have to divide by an arbitrary integer.
746 * For that, we use the well-known technique of multiplying by an approximation
747 * of the inverse. The driver must compute the magic multiplier and shift
748 * amount, and then the hardware does the multiplication and shift. The
749 * hardware and driver also use the "round-down" optimization as described in
750 * http://ridiculousfish.com/files/faster_unsigned_division_by_constants.pdf.
751 * The hardware further assumes the multiplier is between 2^31 and 2^32, so the
752 * high bit is implicitly set to 1 even though it is set to 0 by the driver --
753 * presumably this simplifies the hardware multiplier a little. The hardware
754 * first multiplies linear_id by the multiplier and takes the high 32 bits,
755 * then applies the round-down correction if extra_flags = 1, then finally
756 * shifts right by the shift field.
758 * There are some differences between ridiculousfish's algorithm and the Mali
759 * hardware algorithm, which means that the reference code from ridiculousfish
760 * doesn't always produce the right constants. Mali does not use the pre-shift
761 * optimization, since that would make a hardware implementation slower (it
762 * would have to always do the pre-shift, multiply, and post-shift operations).
763 * It also forces the multplier to be at least 2^31, which means that the
764 * exponent is entirely fixed, so there is no trial-and-error. Altogether,
765 * given the divisor d, the algorithm the driver must follow is:
767 * 1. Set shift = floor(log2(d)).
768 * 2. Compute m = ceil(2^(shift + 32) / d) and e = 2^(shift + 32) % d.
769 * 3. If e <= 2^shift, then we need to use the round-down algorithm. Set
770 * magic_divisor = m - 1 and extra_flags = 1.
771 * 4. Otherwise, set magic_divisor = m and extra_flags = 0.
774 enum mali_attr_mode
{
775 MALI_ATTR_UNUSED
= 0,
776 MALI_ATTR_LINEAR
= 1,
777 MALI_ATTR_POT_DIVIDE
= 2,
778 MALI_ATTR_MODULO
= 3,
779 MALI_ATTR_NPOT_DIVIDE
= 4,
782 /* This magic "pseudo-address" is used as `elements` to implement
783 * gl_PointCoord. When read from a fragment shader, it generates a point
784 * coordinate per the OpenGL ES 2.0 specification. Flipped coordinate spaces
785 * require an affine transformation in the shader. */
787 #define MALI_VARYING_POINT_COORD (0x60)
790 /* This is used for actual attributes. */
792 /* The bottom 3 bits are the mode */
793 mali_ptr elements
: 64 - 8;
799 /* The entry after an NPOT_DIVIDE entry has this format. It stores
800 * extra information that wouldn't fit in a normal entry.
803 u32 unk
; /* = 0x20 */
806 /* This is the original, GL-level divisor. */
809 } __attribute__((packed
));
811 struct mali_attr_meta
{
812 /* Vertex buffer index */
815 unsigned unknown1
: 2;
816 unsigned swizzle
: 12;
817 enum mali_format format
: 8;
819 /* Always observed to be zero at the moment */
820 unsigned unknown3
: 2;
822 /* When packing multiple attributes in a buffer, offset addresses by this value */
824 } __attribute__((packed
));
832 #define FBD_MASK (~0x3f)
834 struct mali_uniform_buffer_meta
{
835 /* This is actually the size minus 1 (MALI_POSITIVE), in units of 16
836 * bytes. This gives a maximum of 2^14 bytes, which just so happens to
837 * be the GL minimum-maximum for GL_MAX_UNIFORM_BLOCK_SIZE.
841 /* This is missing the bottom 2 bits and top 8 bits. The top 8 bits
842 * should be 0 for userspace pointers, according to
843 * https://lwn.net/Articles/718895/. By reusing these bits, we can make
844 * each entry in the table only 64 bits.
846 mali_ptr ptr
: 64 - 10;
849 /* On Bifrost, these fields are the same between the vertex and tiler payloads.
850 * They also seem to be the same between Bifrost and Midgard. They're shared in
854 /* Applies to unknown_draw */
856 #define MALI_DRAW_INDEXED_UINT8 (0x10)
857 #define MALI_DRAW_INDEXED_UINT16 (0x20)
858 #define MALI_DRAW_INDEXED_UINT32 (0x30)
859 #define MALI_DRAW_VARYING_SIZE (0x100)
860 #define MALI_DRAW_PRIMITIVE_RESTART_FIXED_INDEX (0x10000)
862 struct mali_vertex_tiler_prefix
{
863 /* This is a dynamic bitfield containing the following things in this order:
865 * - gl_WorkGroupSize.x
866 * - gl_WorkGroupSize.y
867 * - gl_WorkGroupSize.z
868 * - gl_NumWorkGroups.x
869 * - gl_NumWorkGroups.y
870 * - gl_NumWorkGroups.z
872 * The number of bits allocated for each number is based on the *_shift
873 * fields below. For example, workgroups_y_shift gives the bit that
874 * gl_NumWorkGroups.y starts at, and workgroups_z_shift gives the bit
875 * that gl_NumWorkGroups.z starts at (and therefore one after the bit
876 * that gl_NumWorkGroups.y ends at). The actual value for each gl_*
877 * value is one more than the stored value, since if any of the values
878 * are zero, then there would be no invocations (and hence no job). If
879 * there were 0 bits allocated to a given field, then it must be zero,
880 * and hence the real value is one.
882 * Vertex jobs reuse the same job dispatch mechanism as compute jobs,
883 * effectively doing glDispatchCompute(1, vertex_count, instance_count)
884 * where vertex count is the number of vertices.
886 u32 invocation_count
;
888 u32 size_y_shift
: 5;
889 u32 size_z_shift
: 5;
890 u32 workgroups_x_shift
: 6;
891 u32 workgroups_y_shift
: 6;
892 u32 workgroups_z_shift
: 6;
893 /* This is max(workgroups_x_shift, 2) in all the cases I've seen. */
894 u32 workgroups_x_shift_2
: 4;
897 u32 unknown_draw
: 22;
899 /* This is the the same as workgroups_x_shift_2 in compute shaders, but
900 * always 5 for vertex jobs and 6 for tiler jobs. I suspect this has
901 * something to do with how many quads get put in the same execution
902 * engine, which is a balance (you don't want to starve the engine, but
903 * you also want to distribute work evenly).
905 u32 workgroups_x_shift_3
: 6;
908 /* Negative of draw_start for TILER jobs from what I've seen */
909 int32_t negative_start
;
912 /* Like many other strictly nonzero quantities, index_count is
913 * subtracted by one. For an indexed cube, this is equal to 35 = 6
914 * faces * 2 triangles/per face * 3 vertices/per triangle - 1. That is,
915 * for an indexed draw, index_count is the number of actual vertices
916 * rendered whereas invocation_count is the number of unique vertices
917 * rendered (the number of times the vertex shader must be invoked).
918 * For non-indexed draws, this is just equal to invocation_count. */
922 /* No hidden structure; literally just a pointer to an array of uint
923 * indices (width depends on flags). Thanks, guys, for not making my
924 * life insane for once! NULL for non-indexed draws. */
927 } __attribute__((packed
));
929 /* Point size / line width can either be specified as a 32-bit float (for
930 * constant size) or as a [machine word size]-bit GPU pointer (for varying size). If a pointer
931 * is selected, by setting the appropriate MALI_DRAW_VARYING_SIZE bit in the tiler
932 * payload, the contents of varying_pointer will be intepreted as an array of
933 * fp16 sizes, one for each vertex. gl_PointSize is therefore implemented by
934 * creating a special MALI_R16F varying writing to varying_pointer. */
936 union midgard_primitive_size
{
941 struct bifrost_vertex_only
{
947 } __attribute__((packed
));
949 struct bifrost_tiler_heap_meta
{
952 /* note: these are just guesses! */
953 mali_ptr tiler_heap_start
;
954 mali_ptr tiler_heap_free
;
955 mali_ptr tiler_heap_end
;
957 /* hierarchy weights? but they're still 0 after the job has run... */
959 } __attribute__((packed
));
961 struct bifrost_tiler_meta
{
967 mali_ptr tiler_heap_meta
;
968 /* TODO what is this used for? */
970 } __attribute__((packed
));
972 struct bifrost_tiler_only
{
974 union midgard_primitive_size primitive_size
;
978 u64 zero1
, zero2
, zero3
, zero4
, zero5
, zero6
;
983 } __attribute__((packed
));
985 struct bifrost_scratchpad
{
988 /* This is a pointer to a CPU-inaccessible buffer, 16 pages, allocated
989 * during startup. It seems to serve the same purpose as the
990 * gpu_scratchpad in the SFBD for Midgard, although it's slightly
993 mali_ptr gpu_scratchpad
;
994 } __attribute__((packed
));
996 struct mali_vertex_tiler_postfix
{
997 /* Zero for vertex jobs. Pointer to the position (gl_Position) varying
998 * output from the vertex shader for tiler jobs.
1001 uintptr_t position_varying
;
1003 /* An array of mali_uniform_buffer_meta's. The size is given by the
1006 uintptr_t uniform_buffers
;
1008 /* This is a pointer to an array of pointers to the texture
1009 * descriptors, number of pointers bounded by number of textures. The
1010 * indirection is needed to accomodate varying numbers and sizes of
1011 * texture descriptors */
1012 uintptr_t texture_trampoline
;
1014 /* For OpenGL, from what I've seen, this is intimately connected to
1015 * texture_meta. cwabbott says this is not the case under Vulkan, hence
1016 * why this field is seperate (Midgard is Vulkan capable). Pointer to
1017 * array of sampler descriptors (which are uniform in size) */
1018 uintptr_t sampler_descriptor
;
1022 uintptr_t _shader_upper
: MALI_SHORT_PTR_BITS
- 4; /* struct shader_meta */
1023 uintptr_t attributes
; /* struct attribute_buffer[] */
1024 uintptr_t attribute_meta
; /* attribute_meta[] */
1025 uintptr_t varyings
; /* struct attr */
1026 uintptr_t varying_meta
; /* pointer */
1028 uintptr_t occlusion_counter
; /* A single bit as far as I can tell */
1030 /* Note: on Bifrost, this isn't actually the FBD. It points to
1031 * bifrost_scratchpad instead. However, it does point to the same thing
1032 * in vertex and tiler jobs.
1034 mali_ptr framebuffer
;
1038 /* most likely padding to make this a multiple of 64 bytes */
1042 } __attribute__((packed
));
1044 struct midgard_payload_vertex_tiler
{
1046 union midgard_primitive_size primitive_size
;
1049 struct mali_vertex_tiler_prefix prefix
;
1055 u32 gl_enables
; // 0x5
1057 /* Offset for first vertex in buffer */
1062 struct mali_vertex_tiler_postfix postfix
;
1065 union midgard_primitive_size primitive_size
;
1067 } __attribute__((packed
));
1069 struct bifrost_payload_vertex
{
1070 struct mali_vertex_tiler_prefix prefix
;
1071 struct bifrost_vertex_only vertex
;
1072 struct mali_vertex_tiler_postfix postfix
;
1073 } __attribute__((packed
));
1075 struct bifrost_payload_tiler
{
1076 struct mali_vertex_tiler_prefix prefix
;
1077 struct bifrost_tiler_only tiler
;
1078 struct mali_vertex_tiler_postfix postfix
;
1079 } __attribute__((packed
));
1081 struct bifrost_payload_fused
{
1082 struct mali_vertex_tiler_prefix prefix
;
1083 struct bifrost_tiler_only tiler
;
1084 struct mali_vertex_tiler_postfix tiler_postfix
;
1085 struct bifrost_vertex_only vertex
;
1086 struct mali_vertex_tiler_postfix vertex_postfix
;
1087 } __attribute__((packed
));
1089 /* Pointed to from texture_trampoline, mostly unknown still, haven't
1090 * managed to replay successfully */
1092 /* Purposeful off-by-one in width, height fields. For example, a (64, 64)
1093 * texture is stored as (63, 63) in these fields. This adjusts for that.
1094 * There's an identical pattern in the framebuffer descriptor. Even vertex
1095 * count fields work this way, hence the generic name -- integral fields that
1096 * are strictly positive generally need this adjustment. */
1098 #define MALI_POSITIVE(dim) (dim - 1)
1100 /* Opposite of MALI_POSITIVE, found in the depth_units field */
1102 #define MALI_NEGATIVE(dim) (dim + 1)
1104 /* Used with wrapping. Incomplete (this is a 4-bit field...) */
1106 enum mali_wrap_mode
{
1107 MALI_WRAP_REPEAT
= 0x8,
1108 MALI_WRAP_CLAMP_TO_EDGE
= 0x9,
1109 MALI_WRAP_CLAMP_TO_BORDER
= 0xB,
1110 MALI_WRAP_MIRRORED_REPEAT
= 0xC
1114 #define MAX_MIP_LEVELS (13)
1116 /* Cubemap bloats everything up */
1117 #define MAX_FACES (6)
1119 /* Corresponds to the type passed to glTexImage2D and so forth */
1121 /* Flags for usage2 */
1122 #define MALI_TEX_MANUAL_STRIDE (0x20)
1124 struct mali_texture_format
{
1125 unsigned swizzle
: 12;
1126 enum mali_format format
: 8;
1128 unsigned usage1
: 3;
1129 unsigned is_not_cubemap
: 1;
1130 unsigned usage2
: 8;
1131 } __attribute__((packed
));
1133 struct mali_texture_descriptor
{
1140 struct mali_texture_format format
;
1144 /* One for non-mipmapped, zero for mipmapped */
1147 /* Zero for non-mipmapped, (number of levels - 1) for mipmapped */
1148 uint8_t nr_mipmap_levels
;
1150 /* Swizzling is a single 32-bit word, broken up here for convenience.
1151 * Here, swizzling refers to the ES 3.0 texture parameters for channel
1152 * level swizzling, not the internal pixel-level swizzling which is
1153 * below OpenGL's reach */
1155 unsigned swizzle
: 12;
1156 unsigned swizzle_zero
: 20;
1162 mali_ptr swizzled_bitmaps
[MAX_MIP_LEVELS
* MAX_FACES
];
1163 } __attribute__((packed
));
1165 /* Used as part of filter_mode */
1167 #define MALI_LINEAR 0
1168 #define MALI_NEAREST 1
1169 #define MALI_MIP_LINEAR (0x18)
1171 /* Used to construct low bits of filter_mode */
1173 #define MALI_TEX_MAG(mode) (((mode) & 1) << 0)
1174 #define MALI_TEX_MIN(mode) (((mode) & 1) << 1)
1176 #define MALI_TEX_MAG_MASK (1)
1177 #define MALI_TEX_MIN_MASK (2)
1179 #define MALI_FILTER_NAME(filter) (filter ? "MALI_NEAREST" : "MALI_LINEAR")
1181 /* Used for lod encoding. Thanks @urjaman for pointing out these routines can
1182 * be cleaned up a lot. */
1184 #define DECODE_FIXED_16(x) ((float) (x / 256.0))
1186 static inline uint16_t
1189 /* Clamp inputs, accounting for float error */
1190 float max_lod
= (32.0 - (1.0 / 512.0));
1192 x
= ((x
> max_lod
) ? max_lod
: ((x
< 0.0) ? 0.0 : x
));
1194 return (int) (x
* 256.0);
1197 struct mali_sampler_descriptor
{
1198 uint32_t filter_mode
;
1200 /* Fixed point. Upper 8-bits is before the decimal point, although it
1201 * caps [0-31]. Lower 8-bits is after the decimal point: int(round(x *
1207 /* All one word in reality, but packed a bit */
1209 enum mali_wrap_mode wrap_s
: 4;
1210 enum mali_wrap_mode wrap_t
: 4;
1211 enum mali_wrap_mode wrap_r
: 4;
1212 enum mali_alt_func compare_func
: 3;
1214 /* A single set bit of unknown, ha! */
1215 unsigned unknown2
: 1;
1220 float border_color
[4];
1221 } __attribute__((packed
));
1223 /* viewport0/viewport1 form the arguments to glViewport. viewport1 is
1224 * modified by MALI_POSITIVE; viewport0 is as-is.
1227 struct mali_viewport
{
1228 /* XY clipping planes */
1234 /* Depth clipping planes */
1240 } __attribute__((packed
));
1242 /* From presentations, 16x16 tiles externally. Use shift for fast computation
1243 * of tile numbers. */
1245 #define MALI_TILE_SHIFT 4
1246 #define MALI_TILE_LENGTH (1 << MALI_TILE_SHIFT)
1248 /* Tile coordinates are stored as a compact u32, as only 12 bits are needed to
1249 * each component. Notice that this provides a theoretical upper bound of (1 <<
1250 * 12) = 4096 tiles in each direction, addressing a maximum framebuffer of size
1251 * 65536x65536. Multiplying that together, times another four given that Mali
1252 * framebuffers are 32-bit ARGB8888, means that this upper bound would take 16
1253 * gigabytes of RAM just to store the uncompressed framebuffer itself, let
1254 * alone rendering in real-time to such a buffer.
1258 /* From mali_kbase_10969_workaround.c */
1259 #define MALI_X_COORD_MASK 0x00000FFF
1260 #define MALI_Y_COORD_MASK 0x0FFF0000
1262 /* Extract parts of a tile coordinate */
1264 #define MALI_TILE_COORD_X(coord) ((coord) & MALI_X_COORD_MASK)
1265 #define MALI_TILE_COORD_Y(coord) (((coord) & MALI_Y_COORD_MASK) >> 16)
1266 #define MALI_TILE_COORD_FLAGS(coord) ((coord) & ~(MALI_X_COORD_MASK | MALI_Y_COORD_MASK))
1268 /* No known flags yet, but just in case...? */
1270 #define MALI_TILE_NO_FLAG (0)
1272 /* Helpers to generate tile coordinates based on the boundary coordinates in
1273 * screen space. So, with the bounds (0, 0) to (128, 128) for the screen, these
1274 * functions would convert it to the bounding tiles (0, 0) to (7, 7).
1275 * Intentional "off-by-one"; finding the tile number is a form of fencepost
1278 #define MALI_MAKE_TILE_COORDS(X, Y) ((X) | ((Y) << 16))
1279 #define MALI_BOUND_TO_TILE(B, bias) ((B - bias) >> MALI_TILE_SHIFT)
1280 #define MALI_COORDINATE_TO_TILE(W, H, bias) MALI_MAKE_TILE_COORDS(MALI_BOUND_TO_TILE(W, bias), MALI_BOUND_TO_TILE(H, bias))
1281 #define MALI_COORDINATE_TO_TILE_MIN(W, H) MALI_COORDINATE_TO_TILE(W, H, 0)
1282 #define MALI_COORDINATE_TO_TILE_MAX(W, H) MALI_COORDINATE_TO_TILE(W, H, 1)
1284 struct mali_payload_fragment
{
1287 mali_ptr framebuffer
;
1288 } __attribute__((packed
));
1290 /* Single Framebuffer Descriptor */
1292 /* Flags apply to format. With just MSAA_A and MSAA_B, the framebuffer is
1293 * configured for 4x. With MSAA_8, it is configured for 8x. */
1295 #define MALI_FRAMEBUFFER_MSAA_8 (1 << 3)
1296 #define MALI_FRAMEBUFFER_MSAA_A (1 << 4)
1297 #define MALI_FRAMEBUFFER_MSAA_B (1 << 23)
1299 /* Fast/slow based on whether all three buffers are cleared at once */
1301 #define MALI_CLEAR_FAST (1 << 18)
1302 #define MALI_CLEAR_SLOW (1 << 28)
1303 #define MALI_CLEAR_SLOW_STENCIL (1 << 31)
1305 struct mali_single_framebuffer
{
1308 u64 unknown_address_0
;
1312 /* Exact format is ironically not known, since EGL is finnicky with the
1313 * blob. MSAA, colourspace, etc are configured here. */
1320 /* Purposeful off-by-one in these fields should be accounted for by the
1321 * MALI_DIMENSION macro */
1328 /* By default, the framebuffer is upside down from OpenGL's
1329 * perspective. Set framebuffer to the end and negate the stride to
1330 * flip in the Y direction */
1332 mali_ptr framebuffer
;
1337 /* Depth and stencil buffers are interleaved, it appears, as they are
1338 * set to the same address in captures. Both fields set to zero if the
1339 * buffer is not being cleared. Depending on GL_ENABLE magic, you might
1340 * get a zero enable despite the buffer being present; that still is
1343 mali_ptr depth_buffer
; // not SAME_VA
1344 u64 depth_buffer_enable
;
1346 mali_ptr stencil_buffer
; // not SAME_VA
1347 u64 stencil_buffer_enable
;
1349 u32 clear_color_1
; // RGBA8888 from glClear, actually used by hardware
1350 u32 clear_color_2
; // always equal, but unclear function?
1351 u32 clear_color_3
; // always equal, but unclear function?
1352 u32 clear_color_4
; // always equal, but unclear function?
1354 /* Set to zero if not cleared */
1356 float clear_depth_1
; // float32, ditto
1357 float clear_depth_2
; // float32, ditto
1358 float clear_depth_3
; // float32, ditto
1359 float clear_depth_4
; // float32, ditto
1361 u32 clear_stencil
; // Exactly as it appears in OpenGL
1365 /* Very weird format, see generation code in trans_builder.c */
1366 u32 resolution_check
;
1370 u64 unknown_address_1
; /* Pointing towards... a zero buffer? */
1371 u64 unknown_address_2
;
1373 /* See mali_kbase_replay.c */
1374 u64 tiler_heap_free
;
1377 /* More below this, maybe */
1378 } __attribute__((packed
));
1380 /* Format bits for the render target flags */
1382 #define MALI_MFBD_FORMAT_AFBC (1 << 5)
1383 #define MALI_MFBD_FORMAT_MSAA (1 << 7)
1385 struct mali_rt_format
{
1389 unsigned nr_channels
: 2; /* MALI_POSITIVE */
1391 unsigned flags
: 11;
1393 unsigned swizzle
: 12;
1396 } __attribute__((packed
));
1398 struct bifrost_render_target
{
1399 struct mali_rt_format format
;
1405 /* Stuff related to ARM Framebuffer Compression. When AFBC is enabled,
1406 * there is an extra metadata buffer that contains 16 bytes per tile.
1407 * The framebuffer needs to be the same size as before, since we don't
1408 * know ahead of time how much space it will take up. The
1409 * framebuffer_stride is set to 0, since the data isn't stored linearly
1414 u32 stride
; // stride in units of tiles
1415 u32 unk
; // = 0x20000
1419 /* Heck if I know */
1425 mali_ptr framebuffer
;
1428 u32 framebuffer_stride
: 28; // in units of bytes
1431 u32 clear_color_1
; // RGBA8888 from glClear, actually used by hardware
1432 u32 clear_color_2
; // always equal, but unclear function?
1433 u32 clear_color_3
; // always equal, but unclear function?
1434 u32 clear_color_4
; // always equal, but unclear function?
1435 } __attribute__((packed
));
1437 /* An optional part of bifrost_framebuffer. It comes between the main structure
1438 * and the array of render targets. It must be included if any of these are
1441 * - Transaction Elimination
1443 * - TODO: Anything else?
1446 /* Flags field: note, these are guesses */
1448 #define MALI_EXTRA_PRESENT (0x400)
1449 #define MALI_EXTRA_AFBC (0x20)
1450 #define MALI_EXTRA_AFBC_ZS (0x10)
1451 #define MALI_EXTRA_ZS (0x4)
1453 struct bifrost_fb_extra
{
1455 /* Each tile has an 8 byte checksum, so the stride is "width in tiles * 8" */
1456 u32 checksum_stride
;
1461 /* Note: AFBC is only allowed for 24/8 combined depth/stencil. */
1463 mali_ptr depth_stencil_afbc_metadata
;
1464 u32 depth_stencil_afbc_stride
; // in units of tiles
1467 mali_ptr depth_stencil
;
1473 /* Depth becomes depth/stencil in case of combined D/S */
1475 u32 depth_stride_zero
: 4;
1476 u32 depth_stride
: 28;
1480 u32 stencil_stride_zero
: 4;
1481 u32 stencil_stride
: 28;
1488 } __attribute__((packed
));
1490 /* flags for unk3 */
1492 /* Enables writing depth results back to main memory (rather than keeping them
1493 * on-chip in the tile buffer and then discarding) */
1495 #define MALI_MFBD_DEPTH_WRITE (1 << 10)
1497 /* The MFBD contains the extra bifrost_fb_extra section */
1499 #define MALI_MFBD_EXTRA (1 << 13)
1501 struct bifrost_framebuffer
{
1504 u32 unknown2
; // = 0x1f, same as SFBD
1505 mali_ptr scratchpad
;
1508 mali_ptr sample_locations
;
1511 u16 width1
, height1
;
1513 u16 width2
, height2
;
1514 u32 unk1
: 19; // = 0x01000
1515 u32 rt_count_1
: 2; // off-by-one (use MALI_POSITIVE)
1516 u32 unk2
: 3; // = 0
1517 u32 rt_count_2
: 3; // no off-by-one
1520 u32 clear_stencil
: 8;
1521 u32 unk3
: 24; // = 0x100
1523 mali_ptr tiler_meta
;
1526 /* Note: these are guesses! */
1527 mali_ptr tiler_scratch_start
;
1528 mali_ptr tiler_scratch_middle
;
1530 /* These are not, since we see symmetry with replay jobs which name these explicitly */
1531 mali_ptr tiler_heap_start
;
1532 mali_ptr tiler_heap_end
;
1534 u64 zero9
, zero10
, zero11
, zero12
;
1536 /* optional: struct bifrost_fb_extra extra */
1537 /* struct bifrost_render_target rts[] */
1538 } __attribute__((packed
));
1540 #endif /* __PANFROST_JOB_H__ */