panfrost: Verify and print brx condition in disasm
[mesa.git] / src / gallium / drivers / panfrost / midgard / midgard.h
1 /* Author(s):
2 * Connor Abbott
3 * Alyssa Rosenzweig
4 *
5 * Copyright (c) 2013 Connor Abbott (connor@abbott.cx)
6 * Copyright (c) 2018 Alyssa Rosenzweig (alyssa@rosenzweig.io)
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 */
26
27 #ifndef __midgard_h__
28 #define __midgard_h__
29
30 #include <stdint.h>
31 #include <stdbool.h>
32
33 typedef enum {
34 midgard_word_type_alu,
35 midgard_word_type_load_store,
36 midgard_word_type_texture,
37 midgard_word_type_unknown
38 } midgard_word_type;
39
40 typedef enum {
41 midgard_alu_vmul,
42 midgard_alu_sadd,
43 midgard_alu_smul,
44 midgard_alu_vadd,
45 midgard_alu_lut
46 } midgard_alu;
47
48 /*
49 * ALU words
50 */
51
52 typedef enum {
53 midgard_alu_op_fadd = 0x10,
54 midgard_alu_op_fmul = 0x14,
55 midgard_alu_op_fmin = 0x28,
56 midgard_alu_op_fmax = 0x2C,
57 midgard_alu_op_fmov = 0x30,
58 midgard_alu_op_ffloor = 0x36,
59 midgard_alu_op_fceil = 0x37,
60 midgard_alu_op_fdot3 = 0x3C,
61 midgard_alu_op_fdot3r = 0x3D,
62 midgard_alu_op_fdot4 = 0x3E,
63 midgard_alu_op_freduce = 0x3F,
64 midgard_alu_op_iadd = 0x40,
65 midgard_alu_op_ishladd = 0x41,
66 midgard_alu_op_isub = 0x46,
67 midgard_alu_op_imul = 0x58,
68 midgard_alu_op_imin = 0x60,
69 midgard_alu_op_imax = 0x62,
70 midgard_alu_op_iasr = 0x68,
71 midgard_alu_op_ilsr = 0x69,
72 midgard_alu_op_ishl = 0x6E,
73 midgard_alu_op_iand = 0x70,
74 midgard_alu_op_ior = 0x71,
75 midgard_alu_op_inot = 0x72,
76 midgard_alu_op_iandnot = 0x74, /* (a, b) -> a & ~b, used for not/b2f */
77 midgard_alu_op_ixor = 0x76,
78 midgard_alu_op_imov = 0x7B,
79 midgard_alu_op_feq = 0x80,
80 midgard_alu_op_fne = 0x81,
81 midgard_alu_op_flt = 0x82,
82 midgard_alu_op_fle = 0x83,
83 midgard_alu_op_fball_eq = 0x88,
84 midgard_alu_op_bball_eq = 0x89,
85 midgard_alu_op_bbany_neq = 0x90, /* used for bvec4(1) */
86 midgard_alu_op_fbany_neq = 0x91, /* bvec4(0) also */
87 midgard_alu_op_f2i = 0x99,
88 midgard_alu_op_f2u8 = 0x9C,
89 midgard_alu_op_f2u = 0x9D,
90 midgard_alu_op_ieq = 0xA0,
91 midgard_alu_op_ine = 0xA1,
92 midgard_alu_op_ilt = 0xA4,
93 midgard_alu_op_ile = 0xA5,
94 midgard_alu_op_iball_eq = 0xA8,
95 midgard_alu_op_ball = 0xA9,
96 midgard_alu_op_ibany_neq = 0xB1,
97 midgard_alu_op_i2f = 0xB8,
98 midgard_alu_op_u2f = 0xBC,
99 midgard_alu_op_icsel = 0xC1,
100 midgard_alu_op_fcsel = 0xC5,
101 midgard_alu_op_fatan_pt2 = 0xE8,
102 midgard_alu_op_frcp = 0xF0,
103 midgard_alu_op_frsqrt = 0xF2,
104 midgard_alu_op_fsqrt = 0xF3,
105 midgard_alu_op_fexp2 = 0xF4,
106 midgard_alu_op_flog2 = 0xF5,
107 midgard_alu_op_fsin = 0xF6,
108 midgard_alu_op_fcos = 0xF7,
109 midgard_alu_op_fatan2_pt1 = 0xF9,
110 } midgard_alu_op;
111
112 typedef enum {
113 midgard_outmod_none = 0,
114 midgard_outmod_pos = 1,
115 midgard_outmod_int = 2,
116 midgard_outmod_sat = 3
117 } midgard_outmod;
118
119 typedef enum {
120 midgard_reg_mode_quarter = 0,
121 midgard_reg_mode_half = 1,
122 midgard_reg_mode_full = 2,
123 midgard_reg_mode_double = 3 /* TODO: verify */
124 } midgard_reg_mode;
125
126 typedef enum {
127 midgard_dest_override_lower = 0,
128 midgard_dest_override_upper = 1,
129 midgard_dest_override_none = 2
130 } midgard_dest_override;
131
132 typedef struct
133 __attribute__((__packed__))
134 {
135 bool abs : 1;
136 bool negate : 1;
137
138 /* replicate lower half if dest = half, or low/high half selection if
139 * dest = full
140 */
141 bool rep_low : 1;
142 bool rep_high : 1; /* unused if dest = full */
143 bool half : 1; /* only matters if dest = full */
144 unsigned swizzle : 8;
145 }
146 midgard_vector_alu_src;
147
148 typedef struct
149 __attribute__((__packed__))
150 {
151 midgard_alu_op op : 8;
152 midgard_reg_mode reg_mode : 2;
153 unsigned src1 : 13;
154 unsigned src2 : 13;
155 midgard_dest_override dest_override : 2;
156 midgard_outmod outmod : 2;
157 unsigned mask : 8;
158 }
159 midgard_vector_alu;
160
161 typedef struct
162 __attribute__((__packed__))
163 {
164 bool abs : 1;
165 bool negate : 1;
166 bool full : 1; /* 0 = half, 1 = full */
167 unsigned component : 3;
168 }
169 midgard_scalar_alu_src;
170
171 typedef struct
172 __attribute__((__packed__))
173 {
174 midgard_alu_op op : 8;
175 unsigned src1 : 6;
176 unsigned src2 : 11;
177 unsigned unknown : 1;
178 midgard_outmod outmod : 2;
179 bool output_full : 1;
180 unsigned output_component : 3;
181 }
182 midgard_scalar_alu;
183
184 typedef struct
185 __attribute__((__packed__))
186 {
187 unsigned src1_reg : 5;
188 unsigned src2_reg : 5;
189 unsigned out_reg : 5;
190 bool src2_imm : 1;
191 }
192 midgard_reg_info;
193
194 typedef enum {
195 midgard_jmp_writeout_op_branch_uncond = 1,
196 midgard_jmp_writeout_op_branch_cond = 2,
197 midgard_jmp_writeout_op_discard = 4,
198 midgard_jmp_writeout_op_writeout = 7,
199 } midgard_jmp_writeout_op;
200
201 typedef enum {
202 midgard_condition_write0 = 0,
203 midgard_condition_false = 1,
204 midgard_condition_true = 2,
205 midgard_condition_always = 3, /* Special for writeout/uncond discard */
206 } midgard_condition;
207
208 typedef struct
209 __attribute__((__packed__))
210 {
211 midgard_jmp_writeout_op op : 3; /* == branch_uncond */
212 unsigned dest_tag : 4; /* tag of branch destination */
213 unsigned unknown : 2;
214 int offset : 7;
215 }
216 midgard_branch_uncond;
217
218 typedef struct
219 __attribute__((__packed__))
220 {
221 midgard_jmp_writeout_op op : 3; /* == branch_cond */
222 unsigned dest_tag : 4; /* tag of branch destination */
223 int offset : 7;
224 midgard_condition cond : 2;
225 }
226 midgard_branch_cond;
227
228 typedef struct
229 __attribute__((__packed__))
230 {
231 midgard_jmp_writeout_op op : 3; /* == branch_cond */
232 unsigned dest_tag : 4; /* tag of branch destination */
233 unsigned unknown : 2;
234 signed offset : 23;
235 unsigned cond : 16;
236 }
237 midgard_branch_extended;
238
239 typedef struct
240 __attribute__((__packed__))
241 {
242 midgard_jmp_writeout_op op : 3; /* == writeout */
243 unsigned unknown : 13;
244 }
245 midgard_writeout;
246
247 /*
248 * Load/store words
249 */
250
251 typedef enum {
252 midgard_op_ld_st_noop = 0x03,
253 midgard_op_load_attr_16 = 0x95,
254 midgard_op_load_attr_32 = 0x94,
255 midgard_op_load_vary_16 = 0x99,
256 midgard_op_load_vary_32 = 0x98,
257 midgard_op_load_color_buffer_16 = 0x9D,
258 midgard_op_load_color_buffer_8 = 0xBA,
259 midgard_op_load_uniform_16 = 0xAC,
260 midgard_op_load_uniform_32 = 0xB0,
261 midgard_op_store_vary_16 = 0xD5,
262 midgard_op_store_vary_32 = 0xD4
263 } midgard_load_store_op;
264
265 typedef enum {
266 midgard_interp_centroid = 1,
267 midgard_interp_default = 2
268 } midgard_interpolation;
269
270 typedef struct
271 __attribute__((__packed__))
272 {
273 unsigned zero1 : 4; /* Always zero */
274
275 /* Varying qualifiers, zero if not a varying */
276 unsigned flat : 1;
277 unsigned is_varying : 1; /* Always one for varying, but maybe something else? */
278 midgard_interpolation interpolation : 2;
279
280 unsigned zero2 : 2; /* Always zero */
281 }
282 midgard_varying_parameter;
283
284 typedef struct
285 __attribute__((__packed__))
286 {
287 midgard_load_store_op op : 8;
288 unsigned reg : 5;
289 unsigned mask : 4;
290 unsigned swizzle : 8;
291 unsigned unknown : 16;
292
293 unsigned varying_parameters : 10;
294
295 unsigned address : 9;
296 }
297 midgard_load_store_word;
298
299 typedef struct
300 __attribute__((__packed__))
301 {
302 unsigned type : 4;
303 unsigned next_type : 4;
304 uint64_t word1 : 60;
305 uint64_t word2 : 60;
306 }
307 midgard_load_store;
308
309 /* Texture pipeline results are in r28-r29 */
310 #define REG_TEX_BASE 28
311
312 /* Texture opcodes... maybe? */
313 #define TEXTURE_OP_NORMAL 0x11
314 #define TEXTURE_OP_TEXEL_FETCH 0x14
315
316 /* Texture format types, found in format */
317 #define TEXTURE_CUBE 0x00
318 #define TEXTURE_2D 0x02
319 #define TEXTURE_3D 0x03
320
321 typedef struct
322 __attribute__((__packed__))
323 {
324 unsigned type : 4;
325 unsigned next_type : 4;
326
327 unsigned op : 6;
328 unsigned shadow : 1;
329 unsigned unknown3 : 1;
330
331 /* A little obscure, but last is set for the last texture operation in
332 * a shader. cont appears to just be last's opposite (?). Yeah, I know,
333 * kind of funky.. BiOpen thinks it could do with memory hinting, or
334 * tile locking? */
335
336 unsigned cont : 1;
337 unsigned last : 1;
338
339 unsigned format : 5;
340 unsigned has_offset : 1;
341
342 /* Like in Bifrost */
343 unsigned filter : 1;
344
345 unsigned in_reg_select : 1;
346 unsigned in_reg_upper : 1;
347
348 unsigned in_reg_swizzle_left : 2;
349 unsigned in_reg_swizzle_right : 2;
350
351 unsigned unknown1 : 2;
352
353 unsigned unknown8 : 4;
354
355 unsigned out_full : 1;
356
357 /* Always 1 afaict... */
358 unsigned unknown7 : 2;
359
360 unsigned out_reg_select : 1;
361 unsigned out_upper : 1;
362
363 unsigned mask : 4;
364
365 unsigned unknown2 : 2;
366
367 unsigned swizzle : 8;
368 unsigned unknown4 : 8;
369
370 unsigned unknownA : 4;
371
372 unsigned offset_unknown1 : 1;
373 unsigned offset_reg_select : 1;
374 unsigned offset_reg_upper : 1;
375 unsigned offset_unknown4 : 1;
376 unsigned offset_unknown5 : 1;
377 unsigned offset_unknown6 : 1;
378 unsigned offset_unknown7 : 1;
379 unsigned offset_unknown8 : 1;
380 unsigned offset_unknown9 : 1;
381
382 unsigned unknownB : 3;
383
384 /* Texture bias or LOD, depending on whether it is executed in a
385 * fragment/vertex shader respectively. Compute as int(2^8 * biasf).
386 *
387 * For texel fetch, this is the LOD as is. */
388 unsigned bias : 8;
389
390 unsigned unknown9 : 8;
391
392 unsigned texture_handle : 16;
393 unsigned sampler_handle : 16;
394 }
395 midgard_texture_word;
396
397 /* Opcode name table */
398
399 static char *alu_opcode_names[256] = {
400 [midgard_alu_op_fadd] = "fadd",
401 [midgard_alu_op_fmul] = "fmul",
402 [midgard_alu_op_fmin] = "fmin",
403 [midgard_alu_op_fmax] = "fmax",
404 [midgard_alu_op_fmov] = "fmov",
405 [midgard_alu_op_ffloor] = "ffloor",
406 [midgard_alu_op_fceil] = "fceil",
407 [midgard_alu_op_fdot3] = "fdot3",
408 [midgard_alu_op_fdot3r] = "fdot3r",
409 [midgard_alu_op_fdot4] = "fdot4",
410 [midgard_alu_op_freduce] = "freduce",
411 [midgard_alu_op_imin] = "imin",
412 [midgard_alu_op_imax] = "imax",
413 [midgard_alu_op_ishl] = "ishl",
414 [midgard_alu_op_iasr] = "iasr",
415 [midgard_alu_op_ilsr] = "ilsr",
416 [midgard_alu_op_iadd] = "iadd",
417 [midgard_alu_op_ishladd] = "ishladd",
418 [midgard_alu_op_isub] = "isub",
419 [midgard_alu_op_imul] = "imul",
420 [midgard_alu_op_imov] = "imov",
421 [midgard_alu_op_iand] = "iand",
422 [midgard_alu_op_ior] = "ior",
423 [midgard_alu_op_inot] = "inot",
424 [midgard_alu_op_iandnot] = "iandnot",
425 [midgard_alu_op_ixor] = "ixor",
426 [midgard_alu_op_feq] = "feq",
427 [midgard_alu_op_fne] = "fne",
428 [midgard_alu_op_flt] = "flt",
429 [midgard_alu_op_fle] = "fle",
430 [midgard_alu_op_fball_eq] = "fball_eq",
431 [midgard_alu_op_fbany_neq] = "fbany_neq",
432 [midgard_alu_op_bball_eq] = "bball_eq",
433 [midgard_alu_op_bbany_neq] = "bbany_neq",
434 [midgard_alu_op_f2i] = "f2i",
435 [midgard_alu_op_f2u] = "f2u",
436 [midgard_alu_op_f2u8] = "f2u8",
437 [midgard_alu_op_ieq] = "ieq",
438 [midgard_alu_op_ine] = "ine",
439 [midgard_alu_op_ilt] = "ilt",
440 [midgard_alu_op_ile] = "ile",
441 [midgard_alu_op_iball_eq] = "iball_eq",
442 [midgard_alu_op_ball] = "ball",
443 [midgard_alu_op_ibany_neq] = "ibany_neq",
444 [midgard_alu_op_i2f] = "i2f",
445 [midgard_alu_op_u2f] = "u2f",
446 [midgard_alu_op_icsel] = "icsel",
447 [midgard_alu_op_fcsel] = "fcsel",
448 [midgard_alu_op_fatan_pt2] = "fatan_pt2",
449 [midgard_alu_op_frcp] = "frcp",
450 [midgard_alu_op_frsqrt] = "frsqrt",
451 [midgard_alu_op_fsqrt] = "fsqrt",
452 [midgard_alu_op_fexp2] = "fexp2",
453 [midgard_alu_op_flog2] = "flog2",
454 [midgard_alu_op_fsin] = "fsin",
455 [midgard_alu_op_fcos] = "fcos",
456 [midgard_alu_op_fatan2_pt1] = "fatan2_pt1"
457 };
458
459 static char *load_store_opcode_names[256] = {
460 [midgard_op_load_attr_16] = "ld_attr_16",
461 [midgard_op_load_attr_32] = "ld_attr_32",
462 [midgard_op_load_vary_16] = "ld_vary_16",
463 [midgard_op_load_vary_32] = "ld_vary_32",
464 [midgard_op_load_uniform_16] = "ld_uniform_16",
465 [midgard_op_load_uniform_32] = "ld_uniform_32",
466 [midgard_op_load_color_buffer_8] = "ld_color_buffer_8",
467 [midgard_op_load_color_buffer_16] = "ld_color_buffer_16",
468 [midgard_op_store_vary_16] = "st_vary_16",
469 [midgard_op_store_vary_32] = "st_vary_32"
470 };
471
472 #endif