src/gallium/drivers/panfrost/pan_assemble.c

   1 /*
   2  * © Copyright 2018 Alyssa Rosenzweig
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  */
  24
  25 #include <stdio.h>
  26 #include <stdlib.h>
  27 #include <string.h>
  28 #include "pan_context.h"
  29
  30 #include "compiler/nir/nir.h"
  31 #include "nir/tgsi_to_nir.h"
  32 #include "midgard/midgard_compile.h"
  33 #include "util/u_dynarray.h"
  34
  35 #include "tgsi/tgsi_dump.h"
  36
  37 void
  38 panfrost_shader_compile(
  39                 struct panfrost_context *ctx,
  40                 struct mali_shader_meta *meta,
  41                 enum pipe_shader_ir ir_type,
  42                 const void *ir,
  43                 gl_shader_stage stage,
  44                 struct panfrost_shader_state *state)
  45 {
  46         uint8_t *dst;
  47
  48         nir_shader *s;
  49
  50         if (ir_type == PIPE_SHADER_IR_NIR) {
  51                 s = nir_shader_clone(NULL, ir);
  52         } else {
  53                 assert (ir_type == PIPE_SHADER_IR_TGSI);
  54                 s = tgsi_to_nir(ir, ctx->base.screen);
  55         }
  56
  57         s->info.stage = stage;
  58
  59         if (stage == MESA_SHADER_FRAGMENT) {
  60                 /* Inject the alpha test now if we need to */
  61
  62                 if (state->alpha_state.enabled) {
  63                         NIR_PASS_V(s, nir_lower_alpha_test, state->alpha_state.func, false);
  64                 }
  65         }
  66
  67         /* Call out to Midgard compiler given the above NIR */
  68
  69         midgard_program program = {
  70                 .alpha_ref = state->alpha_state.ref_value
  71         };
  72
  73         midgard_compile_shader_nir(&ctx->compiler, s, &program, false);
  74
  75         /* Prepare the compiled binary for upload */
  76         int size = program.compiled.size;
  77         dst = program.compiled.data;
  78
  79         /* Upload the shader. The lookahead tag is ORed on as a tagged pointer.
  80          * I bet someone just thought that would be a cute pun. At least,
  81          * that's how I'd do it. */
  82
  83         meta->shader = panfrost_upload(&ctx->shaders, dst, size) | program.first_tag;
  84
  85         util_dynarray_fini(&program.compiled);
  86
  87         /* Sysvals are prepended */
  88         program.uniform_count += program.sysval_count;
  89         state->sysval_count = program.sysval_count;
  90         memcpy(state->sysval, program.sysvals, sizeof(state->sysval[0]) * state->sysval_count);
  91
  92         meta->midgard1.uniform_count = MIN2(program.uniform_count, program.uniform_cutoff);
  93         meta->midgard1.work_count = program.work_register_count;
  94
  95         switch (stage) {
  96         case MESA_SHADER_VERTEX:
  97                 meta->attribute_count = util_bitcount64(s->info.inputs_read);
  98                 meta->varying_count = util_bitcount64(s->info.outputs_written);
  99                 break;
 100         case MESA_SHADER_FRAGMENT:
 101                 meta->attribute_count = 0;
 102                 meta->varying_count = util_bitcount64(s->info.inputs_read);
 103                 break;
 104         case MESA_SHADER_COMPUTE:
 105                 /* TODO: images */
 106                 meta->attribute_count = 0;
 107                 meta->varying_count = 0;
 108                 break;
 109         default:
 110                 unreachable("Unknown shader state");
 111         }
 112
 113         state->can_discard = s->info.fs.uses_discard;
 114         state->writes_point_size = program.writes_point_size;
 115         state->reads_point_coord = false;
 116         state->helper_invocations = s->info.fs.needs_helper_invocations;
 117
 118         /* Separate as primary uniform count is truncated */
 119         state->uniform_count = program.uniform_count;
 120
 121         meta->midgard1.unknown2 = 8; /* XXX */
 122
 123         unsigned default_vec1_swizzle = panfrost_get_default_swizzle(1);
 124         unsigned default_vec2_swizzle = panfrost_get_default_swizzle(2);
 125         unsigned default_vec4_swizzle = panfrost_get_default_swizzle(4);
 126
 127         /* Iterate the varyings and emit the corresponding descriptor */
 128         for (unsigned i = 0; i < meta->varying_count; ++i) {
 129                 unsigned location = program.varyings[i];
 130
 131                 /* Default to a vec4 varying */
 132                 struct mali_attr_meta v = {
 133                         .format = MALI_RGBA32F,
 134                         .swizzle = default_vec4_swizzle,
 135                         .unknown1 = 0x2,
 136                 };
 137
 138                 /* Check for special cases, otherwise assume general varying */
 139
 140                 if (location == VARYING_SLOT_POS) {
 141                         v.index = 1;
 142                         v.format = MALI_VARYING_POS;
 143                 } else if (location == VARYING_SLOT_PSIZ) {
 144                         v.index = 2;
 145                         v.format = MALI_R16F;
 146                         v.swizzle = default_vec1_swizzle;
 147
 148                         state->writes_point_size = true;
 149                 } else if (location == VARYING_SLOT_PNTC) {
 150                         v.index = 3;
 151                         v.format = MALI_RG16F;
 152                         v.swizzle = default_vec2_swizzle;
 153
 154                         state->reads_point_coord = true;
 155                 } else if (location == VARYING_SLOT_FACE) {
 156                         v.index = 4;
 157                         v.format = MALI_R32I;
 158                         v.swizzle = default_vec1_swizzle;
 159
 160                         state->reads_face = true;
 161                 } else {
 162                         v.index = 0;
 163                 }
 164
 165                 state->varyings[i] = v;
 166                 state->varyings_loc[i] = location;
 167         }
 168 }