panfrost: Remove CSO dependency from shader_compile
[mesa.git] / src / gallium / drivers / panfrost / pan_assemble.c
1 /*
2 * © Copyright 2018 Alyssa Rosenzweig
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 */
24
25 #include <stdio.h>
26 #include <stdlib.h>
27 #include <string.h>
28 #include "pan_context.h"
29
30 #include "compiler/nir/nir.h"
31 #include "nir/tgsi_to_nir.h"
32 #include "midgard/midgard_compile.h"
33 #include "util/u_dynarray.h"
34
35 #include "tgsi/tgsi_dump.h"
36
37 void
38 panfrost_shader_compile(
39 struct panfrost_context *ctx,
40 struct mali_shader_meta *meta,
41 enum pipe_shader_ir ir_type,
42 const void *ir,
43 const char *src,
44 int type,
45 struct panfrost_shader_state *state)
46 {
47 uint8_t *dst;
48
49 nir_shader *s;
50
51 if (ir_type == PIPE_SHADER_IR_NIR) {
52 s = nir_shader_clone(NULL, ir);
53 } else {
54 assert (ir_type == PIPE_SHADER_IR_TGSI);
55 s = tgsi_to_nir(ir, ctx->base.screen);
56 }
57
58 s->info.stage = type == JOB_TYPE_VERTEX ? MESA_SHADER_VERTEX : MESA_SHADER_FRAGMENT;
59
60 if (s->info.stage == MESA_SHADER_FRAGMENT) {
61 /* Inject the alpha test now if we need to */
62
63 if (state->alpha_state.enabled) {
64 NIR_PASS_V(s, nir_lower_alpha_test, state->alpha_state.func, false);
65 }
66 }
67
68 /* Call out to Midgard compiler given the above NIR */
69
70 midgard_program program = {
71 .alpha_ref = state->alpha_state.ref_value
72 };
73
74 midgard_compile_shader_nir(&ctx->compiler, s, &program, false);
75
76 /* Prepare the compiled binary for upload */
77 int size = program.compiled.size;
78 dst = program.compiled.data;
79
80 /* Upload the shader. The lookahead tag is ORed on as a tagged pointer.
81 * I bet someone just thought that would be a cute pun. At least,
82 * that's how I'd do it. */
83
84 meta->shader = panfrost_upload(&ctx->shaders, dst, size) | program.first_tag;
85
86 util_dynarray_fini(&program.compiled);
87
88 /* Sysvals are prepended */
89 program.uniform_count += program.sysval_count;
90 state->sysval_count = program.sysval_count;
91 memcpy(state->sysval, program.sysvals, sizeof(state->sysval[0]) * state->sysval_count);
92
93 meta->midgard1.uniform_count = MIN2(program.uniform_count, program.uniform_cutoff);
94 meta->midgard1.work_count = program.work_register_count;
95
96 switch (s->info.stage) {
97 case MESA_SHADER_VERTEX:
98 meta->attribute_count = util_bitcount64(s->info.inputs_read);
99 meta->varying_count = util_bitcount64(s->info.outputs_written);
100 break;
101 case MESA_SHADER_FRAGMENT:
102 meta->attribute_count = 0;
103 meta->varying_count = util_bitcount64(s->info.inputs_read);
104 break;
105 default:
106 unreachable("Unknown shader state");
107 }
108
109 state->can_discard = s->info.fs.uses_discard;
110 state->writes_point_size = program.writes_point_size;
111 state->reads_point_coord = false;
112 state->helper_invocations = s->info.fs.needs_helper_invocations;
113
114 /* Separate as primary uniform count is truncated */
115 state->uniform_count = program.uniform_count;
116
117 meta->midgard1.unknown2 = 8; /* XXX */
118
119 unsigned default_vec1_swizzle = panfrost_get_default_swizzle(1);
120 unsigned default_vec2_swizzle = panfrost_get_default_swizzle(2);
121 unsigned default_vec4_swizzle = panfrost_get_default_swizzle(4);
122
123 /* Iterate the varyings and emit the corresponding descriptor */
124 for (unsigned i = 0; i < meta->varying_count; ++i) {
125 unsigned location = program.varyings[i];
126
127 /* Default to a vec4 varying */
128 struct mali_attr_meta v = {
129 .format = MALI_RGBA32F,
130 .swizzle = default_vec4_swizzle,
131 .unknown1 = 0x2,
132 };
133
134 /* Check for special cases, otherwise assume general varying */
135
136 if (location == VARYING_SLOT_POS) {
137 v.index = 1;
138 v.format = MALI_VARYING_POS;
139 } else if (location == VARYING_SLOT_PSIZ) {
140 v.index = 2;
141 v.format = MALI_R16F;
142 v.swizzle = default_vec1_swizzle;
143
144 state->writes_point_size = true;
145 } else if (location == VARYING_SLOT_PNTC) {
146 v.index = 3;
147 v.format = MALI_RG16F;
148 v.swizzle = default_vec2_swizzle;
149
150 state->reads_point_coord = true;
151 } else if (location == VARYING_SLOT_FACE) {
152 v.index = 4;
153 v.format = MALI_R32I;
154 v.swizzle = default_vec1_swizzle;
155
156 state->reads_face = true;
157 } else {
158 v.index = 0;
159 }
160
161 state->varyings[i] = v;
162 state->varyings_loc[i] = location;
163 }
164 }