2 * Copyright (C) 2018 Alyssa Rosenzweig
3 * Copyright (C) 2020 Collabora Ltd.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 #include "util/macros.h"
27 #include "panfrost-quirks.h"
29 #include "pan_allocate.h"
31 #include "pan_cmdstream.h"
32 #include "pan_context.h"
35 /* TODO: Bifrost requires just a mali_shared_memory, without the rest of the
39 panfrost_vt_attach_framebuffer(struct panfrost_context
*ctx
,
40 struct midgard_payload_vertex_tiler
*vt
)
42 struct panfrost_screen
*screen
= pan_screen(ctx
->base
.screen
);
43 struct panfrost_batch
*batch
= panfrost_get_batch_for_fbo(ctx
);
45 /* If we haven't, reserve space for the framebuffer */
47 if (!batch
->framebuffer
.gpu
) {
48 unsigned size
= (screen
->quirks
& MIDGARD_SFBD
) ?
49 sizeof(struct mali_single_framebuffer
) :
50 sizeof(struct mali_framebuffer
);
52 batch
->framebuffer
= panfrost_allocate_transient(batch
, size
);
55 if (!(screen
->quirks
& MIDGARD_SFBD
))
56 batch
->framebuffer
.gpu
|= MALI_MFBD
;
59 vt
->postfix
.shared_memory
= batch
->framebuffer
.gpu
;
63 panfrost_vt_update_occlusion_query(struct panfrost_context
*ctx
,
64 struct midgard_payload_vertex_tiler
*tp
)
66 SET_BIT(tp
->gl_enables
, MALI_OCCLUSION_QUERY
, ctx
->occlusion_query
);
67 if (ctx
->occlusion_query
)
68 tp
->postfix
.occlusion_counter
= ctx
->occlusion_query
->bo
->gpu
;
70 tp
->postfix
.occlusion_counter
= 0;
74 panfrost_emit_shader_meta(struct panfrost_batch
*batch
,
75 enum pipe_shader_type st
,
76 struct midgard_payload_vertex_tiler
*vtp
)
78 struct panfrost_context
*ctx
= batch
->ctx
;
79 struct panfrost_shader_state
*ss
= panfrost_get_shader_state(ctx
, st
);
82 vtp
->postfix
.shader
= 0;
86 /* Add the shader BO to the batch. */
87 panfrost_batch_add_bo(batch
, ss
->bo
,
88 PAN_BO_ACCESS_PRIVATE
|
90 panfrost_bo_access_for_stage(st
));
92 vtp
->postfix
.shader
= panfrost_upload_transient(batch
, ss
->tripipe
,
93 sizeof(*ss
->tripipe
));
97 panfrost_mali_viewport_init(struct panfrost_context
*ctx
,
98 struct mali_viewport
*mvp
)
100 const struct pipe_viewport_state
*vp
= &ctx
->pipe_viewport
;
102 /* Clip bounds are encoded as floats. The viewport itself is encoded as
103 * (somewhat) asymmetric ints. */
105 const struct pipe_scissor_state
*ss
= &ctx
->scissor
;
107 memset(mvp
, 0, sizeof(*mvp
));
109 /* By default, do no viewport clipping, i.e. clip to (-inf, inf) in
110 * each direction. Clipping to the viewport in theory should work, but
111 * in practice causes issues when we're not explicitly trying to
114 *mvp
= (struct mali_viewport
) {
115 .clip_minx
= -INFINITY
,
116 .clip_miny
= -INFINITY
,
117 .clip_maxx
= INFINITY
,
118 .clip_maxy
= INFINITY
,
121 /* Always scissor to the viewport by default. */
122 float vp_minx
= (int) (vp
->translate
[0] - fabsf(vp
->scale
[0]));
123 float vp_maxx
= (int) (vp
->translate
[0] + fabsf(vp
->scale
[0]));
125 float vp_miny
= (int) (vp
->translate
[1] - fabsf(vp
->scale
[1]));
126 float vp_maxy
= (int) (vp
->translate
[1] + fabsf(vp
->scale
[1]));
128 float minz
= (vp
->translate
[2] - fabsf(vp
->scale
[2]));
129 float maxz
= (vp
->translate
[2] + fabsf(vp
->scale
[2]));
131 /* Apply the scissor test */
133 unsigned minx
, miny
, maxx
, maxy
;
135 if (ss
&& ctx
->rasterizer
&& ctx
->rasterizer
->base
.scissor
) {
136 minx
= MAX2(ss
->minx
, vp_minx
);
137 miny
= MAX2(ss
->miny
, vp_miny
);
138 maxx
= MIN2(ss
->maxx
, vp_maxx
);
139 maxy
= MIN2(ss
->maxy
, vp_maxy
);
147 /* Hardware needs the min/max to be strictly ordered, so flip if we
148 * need to. The viewport transformation in the vertex shader will
149 * handle the negatives if we don't */
152 unsigned temp
= miny
;
158 unsigned temp
= minx
;
169 /* Clamp to the framebuffer size as a last check */
171 minx
= MIN2(ctx
->pipe_framebuffer
.width
, minx
);
172 maxx
= MIN2(ctx
->pipe_framebuffer
.width
, maxx
);
174 miny
= MIN2(ctx
->pipe_framebuffer
.height
, miny
);
175 maxy
= MIN2(ctx
->pipe_framebuffer
.height
, maxy
);
179 mvp
->viewport0
[0] = minx
;
180 mvp
->viewport1
[0] = MALI_POSITIVE(maxx
);
182 mvp
->viewport0
[1] = miny
;
183 mvp
->viewport1
[1] = MALI_POSITIVE(maxy
);
185 mvp
->clip_minz
= minz
;
186 mvp
->clip_maxz
= maxz
;
190 panfrost_emit_viewport(struct panfrost_batch
*batch
,
191 struct midgard_payload_vertex_tiler
*tp
)
193 struct panfrost_context
*ctx
= batch
->ctx
;
194 struct mali_viewport mvp
;
196 panfrost_mali_viewport_init(batch
->ctx
, &mvp
);
198 /* Update the job, unless we're doing wallpapering (whose lack of
199 * scissor we can ignore, since if we "miss" a tile of wallpaper, it'll
200 * just... be faster :) */
202 if (!ctx
->wallpaper_batch
)
203 panfrost_batch_union_scissor(batch
, mvp
.viewport0
[0],
205 mvp
.viewport1
[0] + 1,
206 mvp
.viewport1
[1] + 1);
208 tp
->postfix
.viewport
= panfrost_upload_transient(batch
, &mvp
,
213 panfrost_map_constant_buffer_gpu(struct panfrost_batch
*batch
,
214 enum pipe_shader_type st
,
215 struct panfrost_constant_buffer
*buf
,
218 struct pipe_constant_buffer
*cb
= &buf
->cb
[index
];
219 struct panfrost_resource
*rsrc
= pan_resource(cb
->buffer
);
222 panfrost_batch_add_bo(batch
, rsrc
->bo
,
223 PAN_BO_ACCESS_SHARED
|
225 panfrost_bo_access_for_stage(st
));
227 /* Alignment gauranteed by
228 * PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT */
229 return rsrc
->bo
->gpu
+ cb
->buffer_offset
;
230 } else if (cb
->user_buffer
) {
231 return panfrost_upload_transient(batch
,
236 unreachable("No constant buffer");
240 struct sysval_uniform
{
250 panfrost_upload_viewport_scale_sysval(struct panfrost_batch
*batch
,
251 struct sysval_uniform
*uniform
)
253 struct panfrost_context
*ctx
= batch
->ctx
;
254 const struct pipe_viewport_state
*vp
= &ctx
->pipe_viewport
;
256 uniform
->f
[0] = vp
->scale
[0];
257 uniform
->f
[1] = vp
->scale
[1];
258 uniform
->f
[2] = vp
->scale
[2];
262 panfrost_upload_viewport_offset_sysval(struct panfrost_batch
*batch
,
263 struct sysval_uniform
*uniform
)
265 struct panfrost_context
*ctx
= batch
->ctx
;
266 const struct pipe_viewport_state
*vp
= &ctx
->pipe_viewport
;
268 uniform
->f
[0] = vp
->translate
[0];
269 uniform
->f
[1] = vp
->translate
[1];
270 uniform
->f
[2] = vp
->translate
[2];
273 static void panfrost_upload_txs_sysval(struct panfrost_batch
*batch
,
274 enum pipe_shader_type st
,
275 unsigned int sysvalid
,
276 struct sysval_uniform
*uniform
)
278 struct panfrost_context
*ctx
= batch
->ctx
;
279 unsigned texidx
= PAN_SYSVAL_ID_TO_TXS_TEX_IDX(sysvalid
);
280 unsigned dim
= PAN_SYSVAL_ID_TO_TXS_DIM(sysvalid
);
281 bool is_array
= PAN_SYSVAL_ID_TO_TXS_IS_ARRAY(sysvalid
);
282 struct pipe_sampler_view
*tex
= &ctx
->sampler_views
[st
][texidx
]->base
;
285 uniform
->i
[0] = u_minify(tex
->texture
->width0
, tex
->u
.tex
.first_level
);
288 uniform
->i
[1] = u_minify(tex
->texture
->height0
,
289 tex
->u
.tex
.first_level
);
292 uniform
->i
[2] = u_minify(tex
->texture
->depth0
,
293 tex
->u
.tex
.first_level
);
296 uniform
->i
[dim
] = tex
->texture
->array_size
;
300 panfrost_upload_ssbo_sysval(struct panfrost_batch
*batch
,
301 enum pipe_shader_type st
,
303 struct sysval_uniform
*uniform
)
305 struct panfrost_context
*ctx
= batch
->ctx
;
307 assert(ctx
->ssbo_mask
[st
] & (1 << ssbo_id
));
308 struct pipe_shader_buffer sb
= ctx
->ssbo
[st
][ssbo_id
];
310 /* Compute address */
311 struct panfrost_bo
*bo
= pan_resource(sb
.buffer
)->bo
;
313 panfrost_batch_add_bo(batch
, bo
,
314 PAN_BO_ACCESS_SHARED
| PAN_BO_ACCESS_RW
|
315 panfrost_bo_access_for_stage(st
));
317 /* Upload address and size as sysval */
318 uniform
->du
[0] = bo
->gpu
+ sb
.buffer_offset
;
319 uniform
->u
[2] = sb
.buffer_size
;
323 panfrost_upload_sampler_sysval(struct panfrost_batch
*batch
,
324 enum pipe_shader_type st
,
326 struct sysval_uniform
*uniform
)
328 struct panfrost_context
*ctx
= batch
->ctx
;
329 struct pipe_sampler_state
*sampl
= &ctx
->samplers
[st
][samp_idx
]->base
;
331 uniform
->f
[0] = sampl
->min_lod
;
332 uniform
->f
[1] = sampl
->max_lod
;
333 uniform
->f
[2] = sampl
->lod_bias
;
335 /* Even without any errata, Midgard represents "no mipmapping" as
336 * fixing the LOD with the clamps; keep behaviour consistent. c.f.
337 * panfrost_create_sampler_state which also explains our choice of
338 * epsilon value (again to keep behaviour consistent) */
340 if (sampl
->min_mip_filter
== PIPE_TEX_MIPFILTER_NONE
)
341 uniform
->f
[1] = uniform
->f
[0] + (1.0/256.0);
345 panfrost_upload_num_work_groups_sysval(struct panfrost_batch
*batch
,
346 struct sysval_uniform
*uniform
)
348 struct panfrost_context
*ctx
= batch
->ctx
;
350 uniform
->u
[0] = ctx
->compute_grid
->grid
[0];
351 uniform
->u
[1] = ctx
->compute_grid
->grid
[1];
352 uniform
->u
[2] = ctx
->compute_grid
->grid
[2];
356 panfrost_upload_sysvals(struct panfrost_batch
*batch
, void *buf
,
357 struct panfrost_shader_state
*ss
,
358 enum pipe_shader_type st
)
360 struct sysval_uniform
*uniforms
= (void *)buf
;
362 for (unsigned i
= 0; i
< ss
->sysval_count
; ++i
) {
363 int sysval
= ss
->sysval
[i
];
365 switch (PAN_SYSVAL_TYPE(sysval
)) {
366 case PAN_SYSVAL_VIEWPORT_SCALE
:
367 panfrost_upload_viewport_scale_sysval(batch
,
370 case PAN_SYSVAL_VIEWPORT_OFFSET
:
371 panfrost_upload_viewport_offset_sysval(batch
,
374 case PAN_SYSVAL_TEXTURE_SIZE
:
375 panfrost_upload_txs_sysval(batch
, st
,
376 PAN_SYSVAL_ID(sysval
),
379 case PAN_SYSVAL_SSBO
:
380 panfrost_upload_ssbo_sysval(batch
, st
,
381 PAN_SYSVAL_ID(sysval
),
384 case PAN_SYSVAL_NUM_WORK_GROUPS
:
385 panfrost_upload_num_work_groups_sysval(batch
,
388 case PAN_SYSVAL_SAMPLER
:
389 panfrost_upload_sampler_sysval(batch
, st
,
390 PAN_SYSVAL_ID(sysval
),
400 panfrost_map_constant_buffer_cpu(struct panfrost_constant_buffer
*buf
,
403 struct pipe_constant_buffer
*cb
= &buf
->cb
[index
];
404 struct panfrost_resource
*rsrc
= pan_resource(cb
->buffer
);
407 return rsrc
->bo
->cpu
;
408 else if (cb
->user_buffer
)
409 return cb
->user_buffer
;
411 unreachable("No constant buffer");
415 panfrost_emit_const_buf(struct panfrost_batch
*batch
,
416 enum pipe_shader_type stage
,
417 struct midgard_payload_vertex_tiler
*vtp
)
419 struct panfrost_context
*ctx
= batch
->ctx
;
420 struct panfrost_shader_variants
*all
= ctx
->shader
[stage
];
425 struct panfrost_constant_buffer
*buf
= &ctx
->constant_buffer
[stage
];
427 struct panfrost_shader_state
*ss
= &all
->variants
[all
->active_variant
];
429 /* Uniforms are implicitly UBO #0 */
430 bool has_uniforms
= buf
->enabled_mask
& (1 << 0);
432 /* Allocate room for the sysval and the uniforms */
433 size_t sys_size
= sizeof(float) * 4 * ss
->sysval_count
;
434 size_t uniform_size
= has_uniforms
? (buf
->cb
[0].buffer_size
) : 0;
435 size_t size
= sys_size
+ uniform_size
;
436 struct panfrost_transfer transfer
= panfrost_allocate_transient(batch
,
439 /* Upload sysvals requested by the shader */
440 panfrost_upload_sysvals(batch
, transfer
.cpu
, ss
, stage
);
442 /* Upload uniforms */
443 if (has_uniforms
&& uniform_size
) {
444 const void *cpu
= panfrost_map_constant_buffer_cpu(buf
, 0);
445 memcpy(transfer
.cpu
+ sys_size
, cpu
, uniform_size
);
448 struct mali_vertex_tiler_postfix
*postfix
= &vtp
->postfix
;
450 /* Next up, attach UBOs. UBO #0 is the uniforms we just
453 unsigned ubo_count
= panfrost_ubo_count(ctx
, stage
);
454 assert(ubo_count
>= 1);
456 size_t sz
= sizeof(uint64_t) * ubo_count
;
457 uint64_t ubos
[PAN_MAX_CONST_BUFFERS
];
458 int uniform_count
= ss
->uniform_count
;
460 /* Upload uniforms as a UBO */
461 ubos
[0] = MALI_MAKE_UBO(2 + uniform_count
, transfer
.gpu
);
463 /* The rest are honest-to-goodness UBOs */
465 for (unsigned ubo
= 1; ubo
< ubo_count
; ++ubo
) {
466 size_t usz
= buf
->cb
[ubo
].buffer_size
;
467 bool enabled
= buf
->enabled_mask
& (1 << ubo
);
468 bool empty
= usz
== 0;
470 if (!enabled
|| empty
) {
471 /* Stub out disabled UBOs to catch accesses */
472 ubos
[ubo
] = MALI_MAKE_UBO(0, 0xDEAD0000);
476 mali_ptr gpu
= panfrost_map_constant_buffer_gpu(batch
, stage
,
479 unsigned bytes_per_field
= 16;
480 unsigned aligned
= ALIGN_POT(usz
, bytes_per_field
);
481 ubos
[ubo
] = MALI_MAKE_UBO(aligned
/ bytes_per_field
, gpu
);
484 mali_ptr ubufs
= panfrost_upload_transient(batch
, ubos
, sz
);
485 postfix
->uniforms
= transfer
.gpu
;
486 postfix
->uniform_buffers
= ubufs
;
492 panfrost_emit_shared_memory(struct panfrost_batch
*batch
,
493 const struct pipe_grid_info
*info
,
494 struct midgard_payload_vertex_tiler
*vtp
)
496 struct panfrost_context
*ctx
= batch
->ctx
;
497 struct panfrost_shader_variants
*all
= ctx
->shader
[PIPE_SHADER_COMPUTE
];
498 struct panfrost_shader_state
*ss
= &all
->variants
[all
->active_variant
];
499 unsigned single_size
= util_next_power_of_two(MAX2(ss
->shared_size
,
501 unsigned shared_size
= single_size
* info
->grid
[0] * info
->grid
[1] *
503 struct panfrost_bo
*bo
= panfrost_batch_get_shared_memory(batch
,
507 struct mali_shared_memory shared
= {
508 .shared_memory
= bo
->gpu
,
509 .shared_workgroup_count
=
510 util_logbase2_ceil(info
->grid
[0]) +
511 util_logbase2_ceil(info
->grid
[1]) +
512 util_logbase2_ceil(info
->grid
[2]),
514 .shared_shift
= util_logbase2(single_size
) - 1
517 vtp
->postfix
.shared_memory
= panfrost_upload_transient(batch
, &shared
,