9f22c2b698c24187f44f5ceeb0b9367f3ac2a824
[mesa.git] / src / gallium / drivers / panfrost / pan_context.c
1 /*
2 * © Copyright 2018 Alyssa Rosenzweig
3 * Copyright © 2014-2017 Broadcom
4 * Copyright (C) 2017 Intel Corporation
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 */
26
27 #include <sys/poll.h>
28 #include <errno.h>
29
30 #include "pan_bo.h"
31 #include "pan_context.h"
32 #include "pan_minmax_cache.h"
33 #include "panfrost-quirks.h"
34
35 #include "util/macros.h"
36 #include "util/format/u_format.h"
37 #include "util/u_inlines.h"
38 #include "util/u_upload_mgr.h"
39 #include "util/u_memory.h"
40 #include "util/u_vbuf.h"
41 #include "util/half_float.h"
42 #include "util/u_helpers.h"
43 #include "util/format/u_format.h"
44 #include "util/u_prim.h"
45 #include "util/u_prim_restart.h"
46 #include "indices/u_primconvert.h"
47 #include "tgsi/tgsi_parse.h"
48 #include "tgsi/tgsi_from_mesa.h"
49 #include "util/u_math.h"
50
51 #include "pan_screen.h"
52 #include "pan_blending.h"
53 #include "pan_blend_shaders.h"
54 #include "pan_cmdstream.h"
55 #include "pan_util.h"
56 #include "decode.h"
57 #include "util/pan_lower_framebuffer.h"
58
59 struct midgard_tiler_descriptor
60 panfrost_emit_midg_tiler(struct panfrost_batch *batch, unsigned vertex_count)
61 {
62 struct panfrost_device *device = pan_device(batch->ctx->base.screen);
63 bool hierarchy = !(device->quirks & MIDGARD_NO_HIER_TILING);
64 struct midgard_tiler_descriptor t = {0};
65 unsigned height = batch->key.height;
66 unsigned width = batch->key.width;
67
68 t.hierarchy_mask =
69 panfrost_choose_hierarchy_mask(width, height, vertex_count, hierarchy);
70
71 /* Compute the polygon header size and use that to offset the body */
72
73 unsigned header_size = panfrost_tiler_header_size(
74 width, height, t.hierarchy_mask, hierarchy);
75
76 t.polygon_list_size = panfrost_tiler_full_size(
77 width, height, t.hierarchy_mask, hierarchy);
78
79 if (vertex_count) {
80 t.polygon_list = panfrost_batch_get_polygon_list(batch,
81 header_size +
82 t.polygon_list_size);
83
84
85 t.heap_start = device->tiler_heap->gpu;
86 t.heap_end = device->tiler_heap->gpu + device->tiler_heap->size;
87 } else {
88 struct panfrost_bo *tiler_dummy;
89
90 tiler_dummy = panfrost_batch_get_tiler_dummy(batch);
91 header_size = MALI_TILER_MINIMUM_HEADER_SIZE;
92
93 /* The tiler is disabled, so don't allow the tiler heap */
94 t.heap_start = tiler_dummy->gpu;
95 t.heap_end = t.heap_start;
96
97 /* Use a dummy polygon list */
98 t.polygon_list = tiler_dummy->gpu;
99
100 /* Disable the tiler */
101 if (hierarchy)
102 t.hierarchy_mask |= MALI_TILER_DISABLED;
103 else {
104 t.hierarchy_mask = MALI_TILER_USER;
105 t.polygon_list_size = MALI_TILER_MINIMUM_HEADER_SIZE + 4;
106
107 /* We don't have a WRITE_VALUE job, so write the polygon list manually */
108 uint32_t *polygon_list_body = (uint32_t *) (tiler_dummy->cpu + header_size);
109 polygon_list_body[0] = 0xa0000000; /* TODO: Just that? */
110 }
111 }
112
113 t.polygon_list_body =
114 t.polygon_list + header_size;
115
116 return t;
117 }
118
119 static void
120 panfrost_clear(
121 struct pipe_context *pipe,
122 unsigned buffers,
123 const struct pipe_scissor_state *scissor_state,
124 const union pipe_color_union *color,
125 double depth, unsigned stencil)
126 {
127 struct panfrost_context *ctx = pan_context(pipe);
128
129 /* TODO: panfrost_get_fresh_batch_for_fbo() instantiates a new batch if
130 * the existing batch targeting this FBO has draws. We could probably
131 * avoid that by replacing plain clears by quad-draws with a specific
132 * color/depth/stencil value, thus avoiding the generation of extra
133 * fragment jobs.
134 */
135 struct panfrost_batch *batch = panfrost_get_fresh_batch_for_fbo(ctx);
136 panfrost_batch_clear(batch, buffers, color, depth, stencil);
137 }
138
139 bool
140 panfrost_writes_point_size(struct panfrost_context *ctx)
141 {
142 assert(ctx->shader[PIPE_SHADER_VERTEX]);
143 struct panfrost_shader_state *vs = panfrost_get_shader_state(ctx, PIPE_SHADER_VERTEX);
144
145 return vs->writes_point_size && ctx->active_prim == PIPE_PRIM_POINTS;
146 }
147
148 /* The entire frame is in memory -- send it off to the kernel! */
149
150 void
151 panfrost_flush(
152 struct pipe_context *pipe,
153 struct pipe_fence_handle **fence,
154 unsigned flags)
155 {
156 struct panfrost_context *ctx = pan_context(pipe);
157 struct panfrost_device *dev = pan_device(pipe->screen);
158 uint32_t syncobj = 0;
159
160 if (fence)
161 drmSyncobjCreate(dev->fd, 0, &syncobj);
162
163 /* Submit all pending jobs */
164 panfrost_flush_all_batches(ctx, syncobj);
165
166 if (fence) {
167 struct panfrost_fence *f = panfrost_fence_create(ctx, syncobj);
168 pipe->screen->fence_reference(pipe->screen, fence, NULL);
169 *fence = (struct pipe_fence_handle *)f;
170 }
171
172 if (dev->debug & PAN_DBG_TRACE)
173 pandecode_next_frame();
174 }
175
176 static void
177 panfrost_texture_barrier(struct pipe_context *pipe, unsigned flags)
178 {
179 struct panfrost_context *ctx = pan_context(pipe);
180 panfrost_flush_all_batches(ctx, 0);
181 }
182
183 #define DEFINE_CASE(c) case PIPE_PRIM_##c: return MALI_DRAW_MODE_##c;
184
185 static int
186 g2m_draw_mode(enum pipe_prim_type mode)
187 {
188 switch (mode) {
189 DEFINE_CASE(POINTS);
190 DEFINE_CASE(LINES);
191 DEFINE_CASE(LINE_LOOP);
192 DEFINE_CASE(LINE_STRIP);
193 DEFINE_CASE(TRIANGLES);
194 DEFINE_CASE(TRIANGLE_STRIP);
195 DEFINE_CASE(TRIANGLE_FAN);
196 DEFINE_CASE(QUADS);
197 DEFINE_CASE(QUAD_STRIP);
198 DEFINE_CASE(POLYGON);
199
200 default:
201 unreachable("Invalid draw mode");
202 }
203 }
204
205 #undef DEFINE_CASE
206
207 static bool
208 panfrost_scissor_culls_everything(struct panfrost_context *ctx)
209 {
210 const struct pipe_scissor_state *ss = &ctx->scissor;
211
212 /* Check if we're scissoring at all */
213
214 if (!ctx->rasterizer->base.scissor)
215 return false;
216
217 return (ss->minx == ss->maxx) || (ss->miny == ss->maxy);
218 }
219
220 /* Count generated primitives (when there is no geom/tess shaders) for
221 * transform feedback */
222
223 static void
224 panfrost_statistics_record(
225 struct panfrost_context *ctx,
226 const struct pipe_draw_info *info)
227 {
228 if (!ctx->active_queries)
229 return;
230
231 uint32_t prims = u_prims_for_vertices(info->mode, info->count);
232 ctx->prims_generated += prims;
233
234 if (!ctx->streamout.num_targets)
235 return;
236
237 ctx->tf_prims_generated += prims;
238 }
239
240 static void
241 panfrost_update_streamout_offsets(struct panfrost_context *ctx)
242 {
243 for (unsigned i = 0; i < ctx->streamout.num_targets; ++i) {
244 unsigned count;
245
246 count = u_stream_outputs_for_vertices(ctx->active_prim,
247 ctx->vertex_count);
248 ctx->streamout.offsets[i] += count;
249 }
250 }
251
252 static void
253 panfrost_draw_vbo(
254 struct pipe_context *pipe,
255 const struct pipe_draw_info *info)
256 {
257 struct panfrost_context *ctx = pan_context(pipe);
258
259 /* First of all, check the scissor to see if anything is drawn at all.
260 * If it's not, we drop the draw (mostly a conformance issue;
261 * well-behaved apps shouldn't hit this) */
262
263 if (panfrost_scissor_culls_everything(ctx))
264 return;
265
266 int mode = info->mode;
267
268 /* Fallback unsupported restart index */
269 unsigned primitive_index = (1 << (info->index_size * 8)) - 1;
270
271 if (info->primitive_restart && info->index_size
272 && info->restart_index != primitive_index) {
273 util_draw_vbo_without_prim_restart(pipe, info);
274 return;
275 }
276
277 /* Fallback for unsupported modes */
278
279 assert(ctx->rasterizer != NULL);
280
281 if (!(ctx->draw_modes & (1 << mode))) {
282 if (info->count < 4) {
283 /* Degenerate case? */
284 return;
285 }
286
287 util_primconvert_save_rasterizer_state(ctx->primconvert, &ctx->rasterizer->base);
288 util_primconvert_draw_vbo(ctx->primconvert, info);
289 return;
290 }
291
292 /* Now that we have a guaranteed terminating path, find the job. */
293
294 struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx);
295 panfrost_batch_set_requirements(batch);
296
297 /* Take into account a negative bias */
298 ctx->vertex_count = info->count + abs(info->index_bias);
299 ctx->instance_count = info->instance_count;
300 ctx->active_prim = info->mode;
301
302 struct mali_vertex_tiler_prefix vertex_prefix, tiler_prefix;
303 struct mali_vertex_tiler_postfix vertex_postfix, tiler_postfix;
304 union midgard_primitive_size primitive_size;
305 unsigned vertex_count;
306
307 panfrost_vt_init(ctx, PIPE_SHADER_VERTEX, &vertex_prefix, &vertex_postfix);
308 panfrost_vt_init(ctx, PIPE_SHADER_FRAGMENT, &tiler_prefix, &tiler_postfix);
309
310 panfrost_vt_set_draw_info(ctx, info, g2m_draw_mode(mode),
311 &vertex_postfix, &tiler_prefix,
312 &tiler_postfix, &vertex_count,
313 &ctx->padded_count);
314
315 panfrost_statistics_record(ctx, info);
316
317 panfrost_pack_work_groups_fused(&vertex_prefix, &tiler_prefix,
318 1, vertex_count, info->instance_count,
319 1, 1, 1);
320
321 /* Emit all sort of descriptors. */
322 mali_ptr push_vert = 0, push_frag = 0, attribs = 0;
323
324 vertex_postfix.attribute_meta = panfrost_emit_vertex_data(batch, &attribs);
325 vertex_postfix.attributes = attribs;
326 panfrost_emit_varying_descriptor(batch,
327 ctx->padded_count *
328 ctx->instance_count,
329 &vertex_postfix, &tiler_postfix,
330 &primitive_size);
331 vertex_postfix.sampler_descriptor = panfrost_emit_sampler_descriptors(batch, PIPE_SHADER_VERTEX);
332 tiler_postfix.sampler_descriptor = panfrost_emit_sampler_descriptors(batch, PIPE_SHADER_FRAGMENT);
333 vertex_postfix.textures = panfrost_emit_texture_descriptors(batch, PIPE_SHADER_VERTEX);
334 tiler_postfix.textures = panfrost_emit_texture_descriptors(batch, PIPE_SHADER_FRAGMENT);
335 vertex_postfix.uniform_buffers = panfrost_emit_const_buf(batch, PIPE_SHADER_VERTEX, &push_vert);
336 tiler_postfix.uniform_buffers = panfrost_emit_const_buf(batch, PIPE_SHADER_FRAGMENT, &push_frag);
337 vertex_postfix.uniforms = push_vert;
338 tiler_postfix.uniforms = push_frag;
339 tiler_postfix.viewport = panfrost_emit_viewport(batch);
340
341 vertex_postfix.shader = panfrost_emit_compute_shader_meta(batch, PIPE_SHADER_VERTEX);
342 tiler_postfix.shader = panfrost_emit_frag_shader_meta(batch);
343
344 panfrost_vt_update_primitive_size(ctx, &tiler_prefix, &primitive_size);
345
346 /* Fire off the draw itself */
347 panfrost_emit_vertex_tiler_jobs(batch, &vertex_prefix, &vertex_postfix,
348 &tiler_prefix, &tiler_postfix,
349 &primitive_size);
350
351 /* Adjust the batch stack size based on the new shader stack sizes. */
352 panfrost_batch_adjust_stack_size(batch);
353
354 /* Increment transform feedback offsets */
355 panfrost_update_streamout_offsets(ctx);
356 }
357
358 /* CSO state */
359
360 static void
361 panfrost_generic_cso_delete(struct pipe_context *pctx, void *hwcso)
362 {
363 free(hwcso);
364 }
365
366 static void *
367 panfrost_create_rasterizer_state(
368 struct pipe_context *pctx,
369 const struct pipe_rasterizer_state *cso)
370 {
371 struct panfrost_rasterizer *so = CALLOC_STRUCT(panfrost_rasterizer);
372
373 so->base = *cso;
374
375 /* Gauranteed with the core GL call, so don't expose ARB_polygon_offset */
376 assert(cso->offset_clamp == 0.0);
377
378 return so;
379 }
380
381 static void
382 panfrost_bind_rasterizer_state(
383 struct pipe_context *pctx,
384 void *hwcso)
385 {
386 struct panfrost_context *ctx = pan_context(pctx);
387
388 ctx->rasterizer = hwcso;
389
390 if (!hwcso)
391 return;
392
393 /* Point sprites are emulated */
394
395 struct panfrost_shader_state *variant = panfrost_get_shader_state(ctx, PIPE_SHADER_FRAGMENT);
396
397 if (ctx->rasterizer->base.sprite_coord_enable || (variant && variant->point_sprite_mask))
398 ctx->base.bind_fs_state(&ctx->base, ctx->shader[PIPE_SHADER_FRAGMENT]);
399 }
400
401 static void *
402 panfrost_create_vertex_elements_state(
403 struct pipe_context *pctx,
404 unsigned num_elements,
405 const struct pipe_vertex_element *elements)
406 {
407 struct panfrost_vertex_state *so = CALLOC_STRUCT(panfrost_vertex_state);
408 struct panfrost_device *dev = pan_device(pctx->screen);
409
410 so->num_elements = num_elements;
411 memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
412
413 for (int i = 0; i < num_elements; ++i) {
414 enum pipe_format fmt = elements[i].src_format;
415 const struct util_format_description *desc = util_format_description(fmt);
416 unsigned swizzle = 0;
417 if (dev->quirks & HAS_SWIZZLES)
418 swizzle = panfrost_translate_swizzle_4(desc->swizzle);
419 else
420 swizzle = panfrost_bifrost_swizzle(desc->nr_channels);
421
422 enum mali_format hw_format = panfrost_pipe_format_table[desc->format].hw;
423 so->formats[i] = (hw_format << 12) | swizzle;
424 assert(hw_format);
425 }
426
427 /* Let's also prepare vertex builtins */
428 if (dev->quirks & HAS_SWIZZLES)
429 so->formats[PAN_VERTEX_ID] = (MALI_R32UI << 12) | panfrost_get_default_swizzle(1);
430 else
431 so->formats[PAN_VERTEX_ID] = (MALI_R32UI << 12) | panfrost_bifrost_swizzle(1);
432
433 if (dev->quirks & HAS_SWIZZLES)
434 so->formats[PAN_INSTANCE_ID] = (MALI_R32UI << 12) | panfrost_get_default_swizzle(1);
435 else
436 so->formats[PAN_INSTANCE_ID] = (MALI_R32UI << 12) | panfrost_bifrost_swizzle(1);
437
438 return so;
439 }
440
441 static void
442 panfrost_bind_vertex_elements_state(
443 struct pipe_context *pctx,
444 void *hwcso)
445 {
446 struct panfrost_context *ctx = pan_context(pctx);
447 ctx->vertex = hwcso;
448 }
449
450 static void *
451 panfrost_create_shader_state(
452 struct pipe_context *pctx,
453 const struct pipe_shader_state *cso,
454 enum pipe_shader_type stage)
455 {
456 struct panfrost_shader_variants *so = CALLOC_STRUCT(panfrost_shader_variants);
457 struct panfrost_device *dev = pan_device(pctx->screen);
458 so->base = *cso;
459
460 /* Token deep copy to prevent memory corruption */
461
462 if (cso->type == PIPE_SHADER_IR_TGSI)
463 so->base.tokens = tgsi_dup_tokens(so->base.tokens);
464
465 /* Precompile for shader-db if we need to */
466 if (unlikely((dev->debug & PAN_DBG_PRECOMPILE) && cso->type == PIPE_SHADER_IR_NIR)) {
467 struct panfrost_context *ctx = pan_context(pctx);
468
469 struct panfrost_shader_state state = { 0 };
470 uint64_t outputs_written;
471
472 panfrost_shader_compile(ctx, PIPE_SHADER_IR_NIR,
473 so->base.ir.nir,
474 tgsi_processor_to_shader_stage(stage),
475 &state, &outputs_written);
476 }
477
478 return so;
479 }
480
481 static void
482 panfrost_delete_shader_state(
483 struct pipe_context *pctx,
484 void *so)
485 {
486 struct panfrost_shader_variants *cso = (struct panfrost_shader_variants *) so;
487
488 if (cso->base.type == PIPE_SHADER_IR_TGSI) {
489 /* TODO: leaks TGSI tokens! */
490 }
491
492 for (unsigned i = 0; i < cso->variant_count; ++i) {
493 struct panfrost_shader_state *shader_state = &cso->variants[i];
494 panfrost_bo_unreference(shader_state->bo);
495
496 if (shader_state->upload.rsrc)
497 pipe_resource_reference(&shader_state->upload.rsrc, NULL);
498
499 shader_state->bo = NULL;
500 }
501 free(cso->variants);
502
503
504 free(so);
505 }
506
507 static void *
508 panfrost_create_sampler_state(
509 struct pipe_context *pctx,
510 const struct pipe_sampler_state *cso)
511 {
512 struct panfrost_sampler_state *so = CALLOC_STRUCT(panfrost_sampler_state);
513 struct panfrost_device *device = pan_device(pctx->screen);
514
515 so->base = *cso;
516
517 if (device->quirks & IS_BIFROST)
518 panfrost_sampler_desc_init_bifrost(cso, (struct mali_bifrost_sampler_packed *) &so->hw);
519 else
520 panfrost_sampler_desc_init(cso, &so->hw);
521
522 return so;
523 }
524
525 static void
526 panfrost_bind_sampler_states(
527 struct pipe_context *pctx,
528 enum pipe_shader_type shader,
529 unsigned start_slot, unsigned num_sampler,
530 void **sampler)
531 {
532 assert(start_slot == 0);
533
534 struct panfrost_context *ctx = pan_context(pctx);
535
536 /* XXX: Should upload, not just copy? */
537 ctx->sampler_count[shader] = num_sampler;
538 memcpy(ctx->samplers[shader], sampler, num_sampler * sizeof (void *));
539 }
540
541 static bool
542 panfrost_variant_matches(
543 struct panfrost_context *ctx,
544 struct panfrost_shader_state *variant,
545 enum pipe_shader_type type)
546 {
547 struct panfrost_device *dev = pan_device(ctx->base.screen);
548 struct pipe_rasterizer_state *rasterizer = &ctx->rasterizer->base;
549
550 bool is_fragment = (type == PIPE_SHADER_FRAGMENT);
551
552 if (variant->outputs_read) {
553 struct pipe_framebuffer_state *fb = &ctx->pipe_framebuffer;
554
555 unsigned i;
556 BITSET_FOREACH_SET(i, &variant->outputs_read, 8) {
557 enum pipe_format fmt = PIPE_FORMAT_R8G8B8A8_UNORM;
558
559 if ((fb->nr_cbufs > i) && fb->cbufs[i])
560 fmt = fb->cbufs[i]->format;
561
562 const struct util_format_description *desc =
563 util_format_description(fmt);
564
565 if (pan_format_class_load(desc, dev->quirks) == PAN_FORMAT_NATIVE)
566 fmt = PIPE_FORMAT_NONE;
567
568 if (variant->rt_formats[i] != fmt)
569 return false;
570 }
571 }
572
573 /* Point sprites TODO on bifrost, always pass */
574 if (is_fragment && rasterizer && (rasterizer->sprite_coord_enable |
575 variant->point_sprite_mask)
576 && !(dev->quirks & IS_BIFROST)) {
577 /* Ensure the same varyings are turned to point sprites */
578 if (rasterizer->sprite_coord_enable != variant->point_sprite_mask)
579 return false;
580
581 /* Ensure the orientation is correct */
582 bool upper_left =
583 rasterizer->sprite_coord_mode ==
584 PIPE_SPRITE_COORD_UPPER_LEFT;
585
586 if (variant->point_sprite_upper_left != upper_left)
587 return false;
588 }
589
590 /* Otherwise, we're good to go */
591 return true;
592 }
593
594 /**
595 * Fix an uncompiled shader's stream output info, and produce a bitmask
596 * of which VARYING_SLOT_* are captured for stream output.
597 *
598 * Core Gallium stores output->register_index as a "slot" number, where
599 * slots are assigned consecutively to all outputs in info->outputs_written.
600 * This naive packing of outputs doesn't work for us - we too have slots,
601 * but the layout is defined by the VUE map, which we won't have until we
602 * compile a specific shader variant. So, we remap these and simply store
603 * VARYING_SLOT_* in our copy's output->register_index fields.
604 *
605 * We then produce a bitmask of outputs which are used for SO.
606 *
607 * Implementation from iris.
608 */
609
610 static uint64_t
611 update_so_info(struct pipe_stream_output_info *so_info,
612 uint64_t outputs_written)
613 {
614 uint64_t so_outputs = 0;
615 uint8_t reverse_map[64] = {0};
616 unsigned slot = 0;
617
618 while (outputs_written)
619 reverse_map[slot++] = u_bit_scan64(&outputs_written);
620
621 for (unsigned i = 0; i < so_info->num_outputs; i++) {
622 struct pipe_stream_output *output = &so_info->output[i];
623
624 /* Map Gallium's condensed "slots" back to real VARYING_SLOT_* enums */
625 output->register_index = reverse_map[output->register_index];
626
627 so_outputs |= 1ull << output->register_index;
628 }
629
630 return so_outputs;
631 }
632
633 static void
634 panfrost_bind_shader_state(
635 struct pipe_context *pctx,
636 void *hwcso,
637 enum pipe_shader_type type)
638 {
639 struct panfrost_context *ctx = pan_context(pctx);
640 struct panfrost_device *dev = pan_device(ctx->base.screen);
641 ctx->shader[type] = hwcso;
642
643 if (!hwcso) return;
644
645 /* Match the appropriate variant */
646
647 signed variant = -1;
648 struct panfrost_shader_variants *variants = (struct panfrost_shader_variants *) hwcso;
649
650 for (unsigned i = 0; i < variants->variant_count; ++i) {
651 if (panfrost_variant_matches(ctx, &variants->variants[i], type)) {
652 variant = i;
653 break;
654 }
655 }
656
657 if (variant == -1) {
658 /* No variant matched, so create a new one */
659 variant = variants->variant_count++;
660
661 if (variants->variant_count > variants->variant_space) {
662 unsigned old_space = variants->variant_space;
663
664 variants->variant_space *= 2;
665 if (variants->variant_space == 0)
666 variants->variant_space = 1;
667
668 /* Arbitrary limit to stop runaway programs from
669 * creating an unbounded number of shader variants. */
670 assert(variants->variant_space < 1024);
671
672 unsigned msize = sizeof(struct panfrost_shader_state);
673 variants->variants = realloc(variants->variants,
674 variants->variant_space * msize);
675
676 memset(&variants->variants[old_space], 0,
677 (variants->variant_space - old_space) * msize);
678 }
679
680 struct panfrost_shader_state *v =
681 &variants->variants[variant];
682
683 if (type == PIPE_SHADER_FRAGMENT) {
684 struct pipe_framebuffer_state *fb = &ctx->pipe_framebuffer;
685 for (unsigned i = 0; i < fb->nr_cbufs; ++i) {
686 enum pipe_format fmt = PIPE_FORMAT_R8G8B8A8_UNORM;
687
688 if ((fb->nr_cbufs > i) && fb->cbufs[i])
689 fmt = fb->cbufs[i]->format;
690
691 const struct util_format_description *desc =
692 util_format_description(fmt);
693
694 if (pan_format_class_load(desc, dev->quirks) == PAN_FORMAT_NATIVE)
695 fmt = PIPE_FORMAT_NONE;
696
697 v->rt_formats[i] = fmt;
698 }
699
700 /* Point sprites are TODO on Bifrost */
701 if (ctx->rasterizer && !(dev->quirks & IS_BIFROST)) {
702 v->point_sprite_mask = ctx->rasterizer->base.sprite_coord_enable;
703 v->point_sprite_upper_left =
704 ctx->rasterizer->base.sprite_coord_mode ==
705 PIPE_SPRITE_COORD_UPPER_LEFT;
706 }
707 }
708 }
709
710 /* Select this variant */
711 variants->active_variant = variant;
712
713 struct panfrost_shader_state *shader_state = &variants->variants[variant];
714 assert(panfrost_variant_matches(ctx, shader_state, type));
715
716 /* We finally have a variant, so compile it */
717
718 if (!shader_state->compiled) {
719 uint64_t outputs_written = 0;
720
721 panfrost_shader_compile(ctx, variants->base.type,
722 variants->base.type == PIPE_SHADER_IR_NIR ?
723 variants->base.ir.nir :
724 variants->base.tokens,
725 tgsi_processor_to_shader_stage(type),
726 shader_state,
727 &outputs_written);
728
729 shader_state->compiled = true;
730
731 /* Fixup the stream out information, since what Gallium returns
732 * normally is mildly insane */
733
734 shader_state->stream_output = variants->base.stream_output;
735 shader_state->so_mask =
736 update_so_info(&shader_state->stream_output, outputs_written);
737 }
738 }
739
740 static void *
741 panfrost_create_vs_state(struct pipe_context *pctx, const struct pipe_shader_state *hwcso)
742 {
743 return panfrost_create_shader_state(pctx, hwcso, PIPE_SHADER_VERTEX);
744 }
745
746 static void *
747 panfrost_create_fs_state(struct pipe_context *pctx, const struct pipe_shader_state *hwcso)
748 {
749 return panfrost_create_shader_state(pctx, hwcso, PIPE_SHADER_FRAGMENT);
750 }
751
752 static void
753 panfrost_bind_vs_state(struct pipe_context *pctx, void *hwcso)
754 {
755 panfrost_bind_shader_state(pctx, hwcso, PIPE_SHADER_VERTEX);
756 }
757
758 static void
759 panfrost_bind_fs_state(struct pipe_context *pctx, void *hwcso)
760 {
761 panfrost_bind_shader_state(pctx, hwcso, PIPE_SHADER_FRAGMENT);
762 }
763
764 static void
765 panfrost_set_vertex_buffers(
766 struct pipe_context *pctx,
767 unsigned start_slot,
768 unsigned num_buffers,
769 const struct pipe_vertex_buffer *buffers)
770 {
771 struct panfrost_context *ctx = pan_context(pctx);
772
773 util_set_vertex_buffers_mask(ctx->vertex_buffers, &ctx->vb_mask, buffers, start_slot, num_buffers);
774 }
775
776 static void
777 panfrost_set_constant_buffer(
778 struct pipe_context *pctx,
779 enum pipe_shader_type shader, uint index,
780 const struct pipe_constant_buffer *buf)
781 {
782 struct panfrost_context *ctx = pan_context(pctx);
783 struct panfrost_constant_buffer *pbuf = &ctx->constant_buffer[shader];
784
785 util_copy_constant_buffer(&pbuf->cb[index], buf);
786
787 unsigned mask = (1 << index);
788
789 if (unlikely(!buf)) {
790 pbuf->enabled_mask &= ~mask;
791 pbuf->dirty_mask &= ~mask;
792 return;
793 }
794
795 pbuf->enabled_mask |= mask;
796 pbuf->dirty_mask |= mask;
797 }
798
799 static void
800 panfrost_set_stencil_ref(
801 struct pipe_context *pctx,
802 const struct pipe_stencil_ref *ref)
803 {
804 struct panfrost_context *ctx = pan_context(pctx);
805 ctx->stencil_ref = *ref;
806 }
807
808 void
809 panfrost_create_sampler_view_bo(struct panfrost_sampler_view *so,
810 struct pipe_context *pctx,
811 struct pipe_resource *texture)
812 {
813 struct panfrost_device *device = pan_device(pctx->screen);
814 struct panfrost_resource *prsrc = (struct panfrost_resource *)texture;
815 enum pipe_format format = so->base.format;
816 assert(prsrc->bo);
817
818 /* Format to access the stencil portion of a Z32_S8 texture */
819 if (format == PIPE_FORMAT_X32_S8X24_UINT) {
820 assert(prsrc->separate_stencil);
821 texture = &prsrc->separate_stencil->base;
822 prsrc = (struct panfrost_resource *)texture;
823 format = texture->format;
824 }
825
826 const struct util_format_description *desc = util_format_description(format);
827
828 bool fake_rgtc = !panfrost_supports_compressed_format(device, MALI_BC4_UNORM);
829
830 if (desc->layout == UTIL_FORMAT_LAYOUT_RGTC && fake_rgtc) {
831 if (desc->is_snorm)
832 format = PIPE_FORMAT_R8G8B8A8_SNORM;
833 else
834 format = PIPE_FORMAT_R8G8B8A8_UNORM;
835 desc = util_format_description(format);
836 }
837
838 so->texture_bo = prsrc->bo->gpu;
839 so->modifier = prsrc->modifier;
840
841 unsigned char user_swizzle[4] = {
842 so->base.swizzle_r,
843 so->base.swizzle_g,
844 so->base.swizzle_b,
845 so->base.swizzle_a
846 };
847
848 /* In the hardware, array_size refers specifically to array textures,
849 * whereas in Gallium, it also covers cubemaps */
850
851 unsigned array_size = texture->array_size;
852 unsigned depth = texture->depth0;
853
854 if (so->base.target == PIPE_TEXTURE_CUBE) {
855 /* TODO: Cubemap arrays */
856 assert(array_size == 6);
857 array_size /= 6;
858 }
859
860 /* MSAA only supported for 2D textures (and 2D texture arrays via an
861 * extension currently unimplemented */
862
863 if (so->base.target == PIPE_TEXTURE_2D) {
864 assert(depth == 1);
865 depth = texture->nr_samples;
866 } else {
867 /* MSAA only supported for 2D textures */
868 assert(texture->nr_samples <= 1);
869 }
870
871 enum mali_texture_dimension type =
872 panfrost_translate_texture_dimension(so->base.target);
873
874 if (device->quirks & IS_BIFROST) {
875 unsigned char composed_swizzle[4];
876 util_format_compose_swizzles(desc->swizzle, user_swizzle, composed_swizzle);
877
878 unsigned size = panfrost_estimate_texture_payload_size(
879 so->base.u.tex.first_level,
880 so->base.u.tex.last_level,
881 so->base.u.tex.first_layer,
882 so->base.u.tex.last_layer,
883 texture->nr_samples,
884 type, prsrc->modifier);
885
886 so->bo = panfrost_bo_create(device, size, 0);
887
888 panfrost_new_texture_bifrost(
889 &so->bifrost_descriptor,
890 texture->width0, texture->height0,
891 depth, array_size,
892 format,
893 type, prsrc->modifier,
894 so->base.u.tex.first_level,
895 so->base.u.tex.last_level,
896 so->base.u.tex.first_layer,
897 so->base.u.tex.last_layer,
898 texture->nr_samples,
899 prsrc->cubemap_stride,
900 panfrost_translate_swizzle_4(composed_swizzle),
901 prsrc->bo->gpu,
902 prsrc->slices,
903 so->bo);
904 } else {
905 unsigned size = panfrost_estimate_texture_payload_size(
906 so->base.u.tex.first_level,
907 so->base.u.tex.last_level,
908 so->base.u.tex.first_layer,
909 so->base.u.tex.last_layer,
910 texture->nr_samples,
911 type, prsrc->modifier);
912 size += MALI_MIDGARD_TEXTURE_LENGTH;
913
914 so->bo = panfrost_bo_create(device, size, 0);
915
916 panfrost_new_texture(
917 so->bo->cpu,
918 texture->width0, texture->height0,
919 depth, array_size,
920 format,
921 type, prsrc->modifier,
922 so->base.u.tex.first_level,
923 so->base.u.tex.last_level,
924 so->base.u.tex.first_layer,
925 so->base.u.tex.last_layer,
926 texture->nr_samples,
927 prsrc->cubemap_stride,
928 panfrost_translate_swizzle_4(user_swizzle),
929 prsrc->bo->gpu,
930 prsrc->slices);
931 }
932 }
933
934 static struct pipe_sampler_view *
935 panfrost_create_sampler_view(
936 struct pipe_context *pctx,
937 struct pipe_resource *texture,
938 const struct pipe_sampler_view *template)
939 {
940 struct panfrost_sampler_view *so = rzalloc(pctx, struct panfrost_sampler_view);
941
942 pipe_reference(NULL, &texture->reference);
943
944 so->base = *template;
945 so->base.texture = texture;
946 so->base.reference.count = 1;
947 so->base.context = pctx;
948
949 panfrost_create_sampler_view_bo(so, pctx, texture);
950
951 return (struct pipe_sampler_view *) so;
952 }
953
954 static void
955 panfrost_set_sampler_views(
956 struct pipe_context *pctx,
957 enum pipe_shader_type shader,
958 unsigned start_slot, unsigned num_views,
959 struct pipe_sampler_view **views)
960 {
961 struct panfrost_context *ctx = pan_context(pctx);
962 unsigned new_nr = 0;
963 unsigned i;
964
965 assert(start_slot == 0);
966
967 for (i = 0; i < num_views; ++i) {
968 if (views[i])
969 new_nr = i + 1;
970 pipe_sampler_view_reference((struct pipe_sampler_view **)&ctx->sampler_views[shader][i],
971 views[i]);
972 }
973
974 for (; i < ctx->sampler_view_count[shader]; i++) {
975 pipe_sampler_view_reference((struct pipe_sampler_view **)&ctx->sampler_views[shader][i],
976 NULL);
977 }
978 ctx->sampler_view_count[shader] = new_nr;
979 }
980
981 static void
982 panfrost_sampler_view_destroy(
983 struct pipe_context *pctx,
984 struct pipe_sampler_view *pview)
985 {
986 struct panfrost_sampler_view *view = (struct panfrost_sampler_view *) pview;
987
988 pipe_resource_reference(&pview->texture, NULL);
989 panfrost_bo_unreference(view->bo);
990 ralloc_free(view);
991 }
992
993 static void
994 panfrost_set_shader_buffers(
995 struct pipe_context *pctx,
996 enum pipe_shader_type shader,
997 unsigned start, unsigned count,
998 const struct pipe_shader_buffer *buffers,
999 unsigned writable_bitmask)
1000 {
1001 struct panfrost_context *ctx = pan_context(pctx);
1002
1003 util_set_shader_buffers_mask(ctx->ssbo[shader], &ctx->ssbo_mask[shader],
1004 buffers, start, count);
1005 }
1006
1007 static void
1008 panfrost_set_framebuffer_state(struct pipe_context *pctx,
1009 const struct pipe_framebuffer_state *fb)
1010 {
1011 struct panfrost_context *ctx = pan_context(pctx);
1012
1013 util_copy_framebuffer_state(&ctx->pipe_framebuffer, fb);
1014 ctx->batch = NULL;
1015
1016 /* We may need to generate a new variant if the fragment shader is
1017 * keyed to the framebuffer format (due to EXT_framebuffer_fetch) */
1018 struct panfrost_shader_variants *fs = ctx->shader[PIPE_SHADER_FRAGMENT];
1019
1020 if (fs && fs->variant_count && fs->variants[fs->active_variant].outputs_read)
1021 ctx->base.bind_fs_state(&ctx->base, fs);
1022 }
1023
1024 static inline unsigned
1025 pan_pipe_to_stencil_op(enum pipe_stencil_op in)
1026 {
1027 switch (in) {
1028 case PIPE_STENCIL_OP_KEEP: return MALI_STENCIL_OP_KEEP;
1029 case PIPE_STENCIL_OP_ZERO: return MALI_STENCIL_OP_ZERO;
1030 case PIPE_STENCIL_OP_REPLACE: return MALI_STENCIL_OP_REPLACE;
1031 case PIPE_STENCIL_OP_INCR: return MALI_STENCIL_OP_INCR_SAT;
1032 case PIPE_STENCIL_OP_DECR: return MALI_STENCIL_OP_DECR_SAT;
1033 case PIPE_STENCIL_OP_INCR_WRAP: return MALI_STENCIL_OP_INCR_WRAP;
1034 case PIPE_STENCIL_OP_DECR_WRAP: return MALI_STENCIL_OP_DECR_WRAP;
1035 case PIPE_STENCIL_OP_INVERT: return MALI_STENCIL_OP_INVERT;
1036 default: unreachable("Invalid stencil op");
1037 }
1038 }
1039
1040 static inline void
1041 pan_pipe_to_stencil(const struct pipe_stencil_state *in, void *out)
1042 {
1043 pan_pack(out, STENCIL, cfg) {
1044 cfg.mask = in->valuemask;
1045 cfg.compare_function = panfrost_translate_compare_func(in->func);
1046 cfg.stencil_fail = pan_pipe_to_stencil_op(in->fail_op);
1047 cfg.depth_fail = pan_pipe_to_stencil_op(in->zfail_op);
1048 cfg.depth_pass = pan_pipe_to_stencil_op(in->zpass_op);
1049 }
1050 }
1051
1052 static void *
1053 panfrost_create_depth_stencil_state(struct pipe_context *pipe,
1054 const struct pipe_depth_stencil_alpha_state *zsa)
1055 {
1056 struct panfrost_zsa_state *so = CALLOC_STRUCT(panfrost_zsa_state);
1057 so->base = *zsa;
1058
1059 pan_pipe_to_stencil(&zsa->stencil[0], &so->stencil_front);
1060 so->stencil_mask_front = zsa->stencil[0].writemask;
1061
1062 if (zsa->stencil[1].enabled) {
1063 pan_pipe_to_stencil(&zsa->stencil[1], &so->stencil_back);
1064 so->stencil_mask_back = zsa->stencil[1].writemask;
1065 } else {
1066 so->stencil_back = so->stencil_front;
1067 so->stencil_mask_back = so->stencil_mask_front;
1068 }
1069
1070 /* Alpha lowered by frontend */
1071 assert(!zsa->alpha.enabled);
1072
1073 /* TODO: Bounds test should be easy */
1074 assert(!zsa->depth.bounds_test);
1075
1076 return so;
1077 }
1078
1079 static void
1080 panfrost_bind_depth_stencil_state(struct pipe_context *pipe,
1081 void *cso)
1082 {
1083 struct panfrost_context *ctx = pan_context(pipe);
1084 struct panfrost_zsa_state *zsa = cso;
1085 ctx->depth_stencil = zsa;
1086 }
1087
1088 static void
1089 panfrost_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
1090 {
1091 free( depth );
1092 }
1093
1094 static void
1095 panfrost_set_sample_mask(struct pipe_context *pipe,
1096 unsigned sample_mask)
1097 {
1098 struct panfrost_context *ctx = pan_context(pipe);
1099 ctx->sample_mask = sample_mask;
1100 }
1101
1102 static void
1103 panfrost_set_min_samples(struct pipe_context *pipe,
1104 unsigned min_samples)
1105 {
1106 struct panfrost_context *ctx = pan_context(pipe);
1107 ctx->min_samples = min_samples;
1108 }
1109
1110
1111 static void
1112 panfrost_set_clip_state(struct pipe_context *pipe,
1113 const struct pipe_clip_state *clip)
1114 {
1115 //struct panfrost_context *panfrost = pan_context(pipe);
1116 }
1117
1118 static void
1119 panfrost_set_viewport_states(struct pipe_context *pipe,
1120 unsigned start_slot,
1121 unsigned num_viewports,
1122 const struct pipe_viewport_state *viewports)
1123 {
1124 struct panfrost_context *ctx = pan_context(pipe);
1125
1126 assert(start_slot == 0);
1127 assert(num_viewports == 1);
1128
1129 ctx->pipe_viewport = *viewports;
1130 }
1131
1132 static void
1133 panfrost_set_scissor_states(struct pipe_context *pipe,
1134 unsigned start_slot,
1135 unsigned num_scissors,
1136 const struct pipe_scissor_state *scissors)
1137 {
1138 struct panfrost_context *ctx = pan_context(pipe);
1139
1140 assert(start_slot == 0);
1141 assert(num_scissors == 1);
1142
1143 ctx->scissor = *scissors;
1144 }
1145
1146 static void
1147 panfrost_set_polygon_stipple(struct pipe_context *pipe,
1148 const struct pipe_poly_stipple *stipple)
1149 {
1150 //struct panfrost_context *panfrost = pan_context(pipe);
1151 }
1152
1153 static void
1154 panfrost_set_active_query_state(struct pipe_context *pipe,
1155 bool enable)
1156 {
1157 struct panfrost_context *ctx = pan_context(pipe);
1158 ctx->active_queries = enable;
1159 }
1160
1161 static void
1162 panfrost_destroy(struct pipe_context *pipe)
1163 {
1164 struct panfrost_context *panfrost = pan_context(pipe);
1165
1166 if (panfrost->blitter)
1167 util_blitter_destroy(panfrost->blitter);
1168
1169 if (panfrost->blitter_wallpaper)
1170 util_blitter_destroy(panfrost->blitter_wallpaper);
1171
1172 util_unreference_framebuffer_state(&panfrost->pipe_framebuffer);
1173 u_upload_destroy(pipe->stream_uploader);
1174 u_upload_destroy(panfrost->state_uploader);
1175
1176 ralloc_free(pipe);
1177 }
1178
1179 static struct pipe_query *
1180 panfrost_create_query(struct pipe_context *pipe,
1181 unsigned type,
1182 unsigned index)
1183 {
1184 struct panfrost_query *q = rzalloc(pipe, struct panfrost_query);
1185
1186 q->type = type;
1187 q->index = index;
1188
1189 return (struct pipe_query *) q;
1190 }
1191
1192 static void
1193 panfrost_destroy_query(struct pipe_context *pipe, struct pipe_query *q)
1194 {
1195 struct panfrost_query *query = (struct panfrost_query *) q;
1196
1197 if (query->bo) {
1198 panfrost_bo_unreference(query->bo);
1199 query->bo = NULL;
1200 }
1201
1202 ralloc_free(q);
1203 }
1204
1205 static bool
1206 panfrost_begin_query(struct pipe_context *pipe, struct pipe_query *q)
1207 {
1208 struct panfrost_context *ctx = pan_context(pipe);
1209 struct panfrost_query *query = (struct panfrost_query *) q;
1210
1211 switch (query->type) {
1212 case PIPE_QUERY_OCCLUSION_COUNTER:
1213 case PIPE_QUERY_OCCLUSION_PREDICATE:
1214 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
1215 /* Allocate a bo for the query results to be stored */
1216 if (!query->bo) {
1217 query->bo = panfrost_bo_create(
1218 pan_device(ctx->base.screen),
1219 sizeof(unsigned), 0);
1220 }
1221
1222 unsigned *result = (unsigned *)query->bo->cpu;
1223 *result = 0; /* Default to 0 if nothing at all drawn. */
1224 ctx->occlusion_query = query;
1225 break;
1226
1227 /* Geometry statistics are computed in the driver. XXX: geom/tess
1228 * shaders.. */
1229
1230 case PIPE_QUERY_PRIMITIVES_GENERATED:
1231 query->start = ctx->prims_generated;
1232 break;
1233 case PIPE_QUERY_PRIMITIVES_EMITTED:
1234 query->start = ctx->tf_prims_generated;
1235 break;
1236
1237 default:
1238 /* TODO: timestamp queries, etc? */
1239 break;
1240 }
1241
1242 return true;
1243 }
1244
1245 static bool
1246 panfrost_end_query(struct pipe_context *pipe, struct pipe_query *q)
1247 {
1248 struct panfrost_context *ctx = pan_context(pipe);
1249 struct panfrost_query *query = (struct panfrost_query *) q;
1250
1251 switch (query->type) {
1252 case PIPE_QUERY_OCCLUSION_COUNTER:
1253 case PIPE_QUERY_OCCLUSION_PREDICATE:
1254 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
1255 ctx->occlusion_query = NULL;
1256 break;
1257 case PIPE_QUERY_PRIMITIVES_GENERATED:
1258 query->end = ctx->prims_generated;
1259 break;
1260 case PIPE_QUERY_PRIMITIVES_EMITTED:
1261 query->end = ctx->tf_prims_generated;
1262 break;
1263 }
1264
1265 return true;
1266 }
1267
1268 static bool
1269 panfrost_get_query_result(struct pipe_context *pipe,
1270 struct pipe_query *q,
1271 bool wait,
1272 union pipe_query_result *vresult)
1273 {
1274 struct panfrost_query *query = (struct panfrost_query *) q;
1275 struct panfrost_context *ctx = pan_context(pipe);
1276
1277
1278 switch (query->type) {
1279 case PIPE_QUERY_OCCLUSION_COUNTER:
1280 case PIPE_QUERY_OCCLUSION_PREDICATE:
1281 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
1282 panfrost_flush_batches_accessing_bo(ctx, query->bo, false);
1283 panfrost_bo_wait(query->bo, INT64_MAX, false);
1284
1285 /* Read back the query results */
1286 unsigned *result = (unsigned *) query->bo->cpu;
1287 unsigned passed = *result;
1288
1289 if (query->type == PIPE_QUERY_OCCLUSION_COUNTER) {
1290 vresult->u64 = passed;
1291 } else {
1292 vresult->b = !!passed;
1293 }
1294
1295 break;
1296
1297 case PIPE_QUERY_PRIMITIVES_GENERATED:
1298 case PIPE_QUERY_PRIMITIVES_EMITTED:
1299 panfrost_flush_all_batches(ctx, 0);
1300 vresult->u64 = query->end - query->start;
1301 break;
1302
1303 default:
1304 /* TODO: more queries */
1305 break;
1306 }
1307
1308 return true;
1309 }
1310
1311 static struct pipe_stream_output_target *
1312 panfrost_create_stream_output_target(struct pipe_context *pctx,
1313 struct pipe_resource *prsc,
1314 unsigned buffer_offset,
1315 unsigned buffer_size)
1316 {
1317 struct pipe_stream_output_target *target;
1318
1319 target = rzalloc(pctx, struct pipe_stream_output_target);
1320
1321 if (!target)
1322 return NULL;
1323
1324 pipe_reference_init(&target->reference, 1);
1325 pipe_resource_reference(&target->buffer, prsc);
1326
1327 target->context = pctx;
1328 target->buffer_offset = buffer_offset;
1329 target->buffer_size = buffer_size;
1330
1331 return target;
1332 }
1333
1334 static void
1335 panfrost_stream_output_target_destroy(struct pipe_context *pctx,
1336 struct pipe_stream_output_target *target)
1337 {
1338 pipe_resource_reference(&target->buffer, NULL);
1339 ralloc_free(target);
1340 }
1341
1342 static void
1343 panfrost_set_stream_output_targets(struct pipe_context *pctx,
1344 unsigned num_targets,
1345 struct pipe_stream_output_target **targets,
1346 const unsigned *offsets)
1347 {
1348 struct panfrost_context *ctx = pan_context(pctx);
1349 struct panfrost_streamout *so = &ctx->streamout;
1350
1351 assert(num_targets <= ARRAY_SIZE(so->targets));
1352
1353 for (unsigned i = 0; i < num_targets; i++) {
1354 if (offsets[i] != -1)
1355 so->offsets[i] = offsets[i];
1356
1357 pipe_so_target_reference(&so->targets[i], targets[i]);
1358 }
1359
1360 for (unsigned i = 0; i < so->num_targets; i++)
1361 pipe_so_target_reference(&so->targets[i], NULL);
1362
1363 so->num_targets = num_targets;
1364 }
1365
1366 struct pipe_context *
1367 panfrost_create_context(struct pipe_screen *screen, void *priv, unsigned flags)
1368 {
1369 struct panfrost_context *ctx = rzalloc(screen, struct panfrost_context);
1370 struct pipe_context *gallium = (struct pipe_context *) ctx;
1371 struct panfrost_device *dev = pan_device(screen);
1372
1373 gallium->screen = screen;
1374
1375 gallium->destroy = panfrost_destroy;
1376
1377 gallium->set_framebuffer_state = panfrost_set_framebuffer_state;
1378
1379 gallium->flush = panfrost_flush;
1380 gallium->clear = panfrost_clear;
1381 gallium->draw_vbo = panfrost_draw_vbo;
1382 gallium->texture_barrier = panfrost_texture_barrier;
1383
1384 gallium->set_vertex_buffers = panfrost_set_vertex_buffers;
1385 gallium->set_constant_buffer = panfrost_set_constant_buffer;
1386 gallium->set_shader_buffers = panfrost_set_shader_buffers;
1387
1388 gallium->set_stencil_ref = panfrost_set_stencil_ref;
1389
1390 gallium->create_sampler_view = panfrost_create_sampler_view;
1391 gallium->set_sampler_views = panfrost_set_sampler_views;
1392 gallium->sampler_view_destroy = panfrost_sampler_view_destroy;
1393
1394 gallium->create_rasterizer_state = panfrost_create_rasterizer_state;
1395 gallium->bind_rasterizer_state = panfrost_bind_rasterizer_state;
1396 gallium->delete_rasterizer_state = panfrost_generic_cso_delete;
1397
1398 gallium->create_vertex_elements_state = panfrost_create_vertex_elements_state;
1399 gallium->bind_vertex_elements_state = panfrost_bind_vertex_elements_state;
1400 gallium->delete_vertex_elements_state = panfrost_generic_cso_delete;
1401
1402 gallium->create_fs_state = panfrost_create_fs_state;
1403 gallium->delete_fs_state = panfrost_delete_shader_state;
1404 gallium->bind_fs_state = panfrost_bind_fs_state;
1405
1406 gallium->create_vs_state = panfrost_create_vs_state;
1407 gallium->delete_vs_state = panfrost_delete_shader_state;
1408 gallium->bind_vs_state = panfrost_bind_vs_state;
1409
1410 gallium->create_sampler_state = panfrost_create_sampler_state;
1411 gallium->delete_sampler_state = panfrost_generic_cso_delete;
1412 gallium->bind_sampler_states = panfrost_bind_sampler_states;
1413
1414 gallium->create_depth_stencil_alpha_state = panfrost_create_depth_stencil_state;
1415 gallium->bind_depth_stencil_alpha_state = panfrost_bind_depth_stencil_state;
1416 gallium->delete_depth_stencil_alpha_state = panfrost_delete_depth_stencil_state;
1417
1418 gallium->set_sample_mask = panfrost_set_sample_mask;
1419 gallium->set_min_samples = panfrost_set_min_samples;
1420
1421 gallium->set_clip_state = panfrost_set_clip_state;
1422 gallium->set_viewport_states = panfrost_set_viewport_states;
1423 gallium->set_scissor_states = panfrost_set_scissor_states;
1424 gallium->set_polygon_stipple = panfrost_set_polygon_stipple;
1425 gallium->set_active_query_state = panfrost_set_active_query_state;
1426
1427 gallium->create_query = panfrost_create_query;
1428 gallium->destroy_query = panfrost_destroy_query;
1429 gallium->begin_query = panfrost_begin_query;
1430 gallium->end_query = panfrost_end_query;
1431 gallium->get_query_result = panfrost_get_query_result;
1432
1433 gallium->create_stream_output_target = panfrost_create_stream_output_target;
1434 gallium->stream_output_target_destroy = panfrost_stream_output_target_destroy;
1435 gallium->set_stream_output_targets = panfrost_set_stream_output_targets;
1436
1437 panfrost_resource_context_init(gallium);
1438 panfrost_blend_context_init(gallium);
1439 panfrost_compute_context_init(gallium);
1440
1441 gallium->stream_uploader = u_upload_create_default(gallium);
1442 gallium->const_uploader = gallium->stream_uploader;
1443
1444 ctx->state_uploader = u_upload_create(gallium, 4096,
1445 PIPE_BIND_CONSTANT_BUFFER, PIPE_USAGE_DYNAMIC, 0);
1446
1447 /* All of our GPUs support ES mode. Midgard supports additionally
1448 * QUADS/QUAD_STRIPS/POLYGON. Bifrost supports just QUADS. */
1449
1450 ctx->draw_modes = (1 << (PIPE_PRIM_QUADS + 1)) - 1;
1451
1452 if (!(dev->quirks & IS_BIFROST)) {
1453 ctx->draw_modes |= (1 << PIPE_PRIM_QUAD_STRIP);
1454 ctx->draw_modes |= (1 << PIPE_PRIM_POLYGON);
1455 }
1456
1457 ctx->primconvert = util_primconvert_create(gallium, ctx->draw_modes);
1458
1459 ctx->blitter = util_blitter_create(gallium);
1460 ctx->blitter_wallpaper = util_blitter_create(gallium);
1461
1462 assert(ctx->blitter);
1463 assert(ctx->blitter_wallpaper);
1464
1465 /* Prepare for render! */
1466
1467 panfrost_batch_init(ctx);
1468
1469 if (!(dev->quirks & IS_BIFROST)) {
1470 for (unsigned c = 0; c < PIPE_MAX_COLOR_BUFS; ++c)
1471 ctx->blit_blend.rt[c].shaders = _mesa_hash_table_u64_create(ctx);
1472 }
1473
1474 /* By default mask everything on */
1475 ctx->sample_mask = ~0;
1476 ctx->active_queries = true;
1477
1478 return gallium;
1479 }