2 * © Copyright 2018 Alyssa Rosenzweig
3 * Copyright © 2014-2017 Broadcom
4 * Copyright (C) 2017 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 #include "pan_context.h"
32 #include "pan_minmax_cache.h"
33 #include "panfrost-quirks.h"
35 #include "util/macros.h"
36 #include "util/format/u_format.h"
37 #include "util/u_inlines.h"
38 #include "util/u_upload_mgr.h"
39 #include "util/u_memory.h"
40 #include "util/u_vbuf.h"
41 #include "util/half_float.h"
42 #include "util/u_helpers.h"
43 #include "util/format/u_format.h"
44 #include "util/u_prim.h"
45 #include "util/u_prim_restart.h"
46 #include "indices/u_primconvert.h"
47 #include "tgsi/tgsi_parse.h"
48 #include "tgsi/tgsi_from_mesa.h"
49 #include "util/u_math.h"
51 #include "pan_screen.h"
52 #include "pan_blending.h"
53 #include "pan_blend_shaders.h"
54 #include "pan_cmdstream.h"
57 #include "util/pan_lower_framebuffer.h"
59 struct midgard_tiler_descriptor
60 panfrost_emit_midg_tiler(struct panfrost_batch
*batch
, unsigned vertex_count
)
62 struct panfrost_device
*device
= pan_device(batch
->ctx
->base
.screen
);
63 bool hierarchy
= !(device
->quirks
& MIDGARD_NO_HIER_TILING
);
64 struct midgard_tiler_descriptor t
= {0};
65 unsigned height
= batch
->key
.height
;
66 unsigned width
= batch
->key
.width
;
69 panfrost_choose_hierarchy_mask(width
, height
, vertex_count
, hierarchy
);
71 /* Compute the polygon header size and use that to offset the body */
73 unsigned header_size
= panfrost_tiler_header_size(
74 width
, height
, t
.hierarchy_mask
, hierarchy
);
76 t
.polygon_list_size
= panfrost_tiler_full_size(
77 width
, height
, t
.hierarchy_mask
, hierarchy
);
82 struct panfrost_bo
*tiler_heap
;
84 tiler_heap
= panfrost_batch_get_tiler_heap(batch
);
85 t
.polygon_list
= panfrost_batch_get_polygon_list(batch
,
90 /* Allow the entire tiler heap */
91 t
.heap_start
= tiler_heap
->gpu
;
92 t
.heap_end
= tiler_heap
->gpu
+ tiler_heap
->size
;
94 struct panfrost_bo
*tiler_dummy
;
96 tiler_dummy
= panfrost_batch_get_tiler_dummy(batch
);
97 header_size
= MALI_TILER_MINIMUM_HEADER_SIZE
;
99 /* The tiler is disabled, so don't allow the tiler heap */
100 t
.heap_start
= tiler_dummy
->gpu
;
101 t
.heap_end
= t
.heap_start
;
103 /* Use a dummy polygon list */
104 t
.polygon_list
= tiler_dummy
->gpu
;
106 /* Disable the tiler */
108 t
.hierarchy_mask
|= MALI_TILER_DISABLED
;
110 t
.hierarchy_mask
= MALI_TILER_USER
;
111 t
.polygon_list_size
= MALI_TILER_MINIMUM_HEADER_SIZE
+ 4;
113 /* We don't have a WRITE_VALUE job, so write the polygon list manually */
114 uint32_t *polygon_list_body
= (uint32_t *) (tiler_dummy
->cpu
+ header_size
);
115 polygon_list_body
[0] = 0xa0000000; /* TODO: Just that? */
119 t
.polygon_list_body
=
120 t
.polygon_list
+ header_size
;
127 struct pipe_context
*pipe
,
129 const struct pipe_scissor_state
*scissor_state
,
130 const union pipe_color_union
*color
,
131 double depth
, unsigned stencil
)
133 struct panfrost_context
*ctx
= pan_context(pipe
);
135 /* TODO: panfrost_get_fresh_batch_for_fbo() instantiates a new batch if
136 * the existing batch targeting this FBO has draws. We could probably
137 * avoid that by replacing plain clears by quad-draws with a specific
138 * color/depth/stencil value, thus avoiding the generation of extra
141 struct panfrost_batch
*batch
= panfrost_get_fresh_batch_for_fbo(ctx
);
142 panfrost_batch_clear(batch
, buffers
, color
, depth
, stencil
);
146 panfrost_writes_point_size(struct panfrost_context
*ctx
)
148 assert(ctx
->shader
[PIPE_SHADER_VERTEX
]);
149 struct panfrost_shader_state
*vs
= panfrost_get_shader_state(ctx
, PIPE_SHADER_VERTEX
);
151 return vs
->writes_point_size
&& ctx
->active_prim
== PIPE_PRIM_POINTS
;
154 /* Compute number of UBOs active (more specifically, compute the highest UBO
155 * number addressable -- if there are gaps, include them in the count anyway).
156 * We always include UBO #0 in the count, since we *need* uniforms enabled for
160 panfrost_ubo_count(struct panfrost_context
*ctx
, enum pipe_shader_type stage
)
162 unsigned mask
= ctx
->constant_buffer
[stage
].enabled_mask
| 1;
163 return 32 - __builtin_clz(mask
);
166 /* The entire frame is in memory -- send it off to the kernel! */
170 struct pipe_context
*pipe
,
171 struct pipe_fence_handle
**fence
,
174 struct panfrost_context
*ctx
= pan_context(pipe
);
175 struct panfrost_device
*dev
= pan_device(pipe
->screen
);
176 uint32_t syncobj
= 0;
179 drmSyncobjCreate(dev
->fd
, 0, &syncobj
);
181 /* Submit all pending jobs */
182 panfrost_flush_all_batches(ctx
, syncobj
);
185 struct panfrost_fence
*f
= panfrost_fence_create(ctx
, syncobj
);
186 pipe
->screen
->fence_reference(pipe
->screen
, fence
, NULL
);
187 *fence
= (struct pipe_fence_handle
*)f
;
190 if (dev
->debug
& PAN_DBG_TRACE
)
191 pandecode_next_frame();
195 panfrost_texture_barrier(struct pipe_context
*pipe
, unsigned flags
)
197 struct panfrost_context
*ctx
= pan_context(pipe
);
198 panfrost_flush_all_batches(ctx
, 0);
201 #define DEFINE_CASE(c) case PIPE_PRIM_##c: return MALI_DRAW_MODE_##c;
204 g2m_draw_mode(enum pipe_prim_type mode
)
209 DEFINE_CASE(LINE_LOOP
);
210 DEFINE_CASE(LINE_STRIP
);
211 DEFINE_CASE(TRIANGLES
);
212 DEFINE_CASE(TRIANGLE_STRIP
);
213 DEFINE_CASE(TRIANGLE_FAN
);
215 DEFINE_CASE(QUAD_STRIP
);
216 DEFINE_CASE(POLYGON
);
219 unreachable("Invalid draw mode");
226 panfrost_scissor_culls_everything(struct panfrost_context
*ctx
)
228 const struct pipe_scissor_state
*ss
= &ctx
->scissor
;
230 /* Check if we're scissoring at all */
232 if (!ctx
->rasterizer
->base
.scissor
)
235 return (ss
->minx
== ss
->maxx
) || (ss
->miny
== ss
->maxy
);
238 /* Count generated primitives (when there is no geom/tess shaders) for
239 * transform feedback */
242 panfrost_statistics_record(
243 struct panfrost_context
*ctx
,
244 const struct pipe_draw_info
*info
)
246 if (!ctx
->active_queries
)
249 uint32_t prims
= u_prims_for_vertices(info
->mode
, info
->count
);
250 ctx
->prims_generated
+= prims
;
252 if (!ctx
->streamout
.num_targets
)
255 ctx
->tf_prims_generated
+= prims
;
259 panfrost_update_streamout_offsets(struct panfrost_context
*ctx
)
261 for (unsigned i
= 0; i
< ctx
->streamout
.num_targets
; ++i
) {
264 count
= u_stream_outputs_for_vertices(ctx
->active_prim
,
266 ctx
->streamout
.offsets
[i
] += count
;
272 struct pipe_context
*pipe
,
273 const struct pipe_draw_info
*info
)
275 struct panfrost_context
*ctx
= pan_context(pipe
);
277 /* First of all, check the scissor to see if anything is drawn at all.
278 * If it's not, we drop the draw (mostly a conformance issue;
279 * well-behaved apps shouldn't hit this) */
281 if (panfrost_scissor_culls_everything(ctx
))
284 int mode
= info
->mode
;
286 /* Fallback unsupported restart index */
287 unsigned primitive_index
= (1 << (info
->index_size
* 8)) - 1;
289 if (info
->primitive_restart
&& info
->index_size
290 && info
->restart_index
!= primitive_index
) {
291 util_draw_vbo_without_prim_restart(pipe
, info
);
295 /* Fallback for unsupported modes */
297 assert(ctx
->rasterizer
!= NULL
);
299 if (!(ctx
->draw_modes
& (1 << mode
))) {
300 if (info
->count
< 4) {
301 /* Degenerate case? */
305 util_primconvert_save_rasterizer_state(ctx
->primconvert
, &ctx
->rasterizer
->base
);
306 util_primconvert_draw_vbo(ctx
->primconvert
, info
);
310 /* Now that we have a guaranteed terminating path, find the job. */
312 struct panfrost_batch
*batch
= panfrost_get_batch_for_fbo(ctx
);
313 panfrost_batch_set_requirements(batch
);
315 /* Take into account a negative bias */
316 ctx
->vertex_count
= info
->count
+ abs(info
->index_bias
);
317 ctx
->instance_count
= info
->instance_count
;
318 ctx
->active_prim
= info
->mode
;
320 struct mali_vertex_tiler_prefix vertex_prefix
, tiler_prefix
;
321 struct mali_vertex_tiler_postfix vertex_postfix
, tiler_postfix
;
322 union midgard_primitive_size primitive_size
;
323 unsigned vertex_count
;
325 panfrost_vt_init(ctx
, PIPE_SHADER_VERTEX
, &vertex_prefix
, &vertex_postfix
);
326 panfrost_vt_init(ctx
, PIPE_SHADER_FRAGMENT
, &tiler_prefix
, &tiler_postfix
);
328 panfrost_vt_set_draw_info(ctx
, info
, g2m_draw_mode(mode
),
329 &vertex_postfix
, &tiler_prefix
,
330 &tiler_postfix
, &vertex_count
,
333 panfrost_statistics_record(ctx
, info
);
335 panfrost_pack_work_groups_fused(&vertex_prefix
, &tiler_prefix
,
336 1, vertex_count
, info
->instance_count
,
339 /* Emit all sort of descriptors. */
340 panfrost_emit_vertex_data(batch
, &vertex_postfix
);
341 panfrost_emit_varying_descriptor(batch
,
344 &vertex_postfix
, &tiler_postfix
,
346 panfrost_emit_shader_meta(batch
, PIPE_SHADER_VERTEX
, &vertex_postfix
);
347 panfrost_emit_shader_meta(batch
, PIPE_SHADER_FRAGMENT
, &tiler_postfix
);
348 panfrost_emit_sampler_descriptors(batch
, PIPE_SHADER_VERTEX
, &vertex_postfix
);
349 panfrost_emit_sampler_descriptors(batch
, PIPE_SHADER_FRAGMENT
, &tiler_postfix
);
350 panfrost_emit_texture_descriptors(batch
, PIPE_SHADER_VERTEX
, &vertex_postfix
);
351 panfrost_emit_texture_descriptors(batch
, PIPE_SHADER_FRAGMENT
, &tiler_postfix
);
352 panfrost_emit_const_buf(batch
, PIPE_SHADER_VERTEX
, &vertex_postfix
);
353 panfrost_emit_const_buf(batch
, PIPE_SHADER_FRAGMENT
, &tiler_postfix
);
354 panfrost_emit_viewport(batch
, &tiler_postfix
);
356 panfrost_vt_update_primitive_size(ctx
, &tiler_prefix
, &primitive_size
);
358 /* Fire off the draw itself */
359 panfrost_emit_vertex_tiler_jobs(batch
, &vertex_prefix
, &vertex_postfix
,
360 &tiler_prefix
, &tiler_postfix
,
363 /* Adjust the batch stack size based on the new shader stack sizes. */
364 panfrost_batch_adjust_stack_size(batch
);
366 /* Increment transform feedback offsets */
367 panfrost_update_streamout_offsets(ctx
);
373 panfrost_generic_cso_delete(struct pipe_context
*pctx
, void *hwcso
)
379 panfrost_create_rasterizer_state(
380 struct pipe_context
*pctx
,
381 const struct pipe_rasterizer_state
*cso
)
383 struct panfrost_rasterizer
*so
= CALLOC_STRUCT(panfrost_rasterizer
);
391 panfrost_bind_rasterizer_state(
392 struct pipe_context
*pctx
,
395 struct panfrost_context
*ctx
= pan_context(pctx
);
397 ctx
->rasterizer
= hwcso
;
402 /* Gauranteed with the core GL call, so don't expose ARB_polygon_offset */
403 assert(ctx
->rasterizer
->base
.offset_clamp
== 0.0);
405 /* Point sprites are emulated */
407 struct panfrost_shader_state
*variant
= panfrost_get_shader_state(ctx
, PIPE_SHADER_FRAGMENT
);
409 if (ctx
->rasterizer
->base
.sprite_coord_enable
|| (variant
&& variant
->point_sprite_mask
))
410 ctx
->base
.bind_fs_state(&ctx
->base
, ctx
->shader
[PIPE_SHADER_FRAGMENT
]);
414 panfrost_create_vertex_elements_state(
415 struct pipe_context
*pctx
,
416 unsigned num_elements
,
417 const struct pipe_vertex_element
*elements
)
419 struct panfrost_vertex_state
*so
= CALLOC_STRUCT(panfrost_vertex_state
);
420 struct panfrost_device
*dev
= pan_device(pctx
->screen
);
422 so
->num_elements
= num_elements
;
423 memcpy(so
->pipe
, elements
, sizeof(*elements
) * num_elements
);
425 for (int i
= 0; i
< num_elements
; ++i
) {
426 enum pipe_format fmt
= elements
[i
].src_format
;
427 const struct util_format_description
*desc
= util_format_description(fmt
);
428 unsigned swizzle
= 0;
429 if (dev
->quirks
& HAS_SWIZZLES
)
430 swizzle
= panfrost_translate_swizzle_4(desc
->swizzle
);
432 swizzle
= panfrost_bifrost_swizzle(desc
->nr_channels
);
434 enum mali_format hw_format
= panfrost_pipe_format_table
[desc
->format
].hw
;
435 so
->formats
[i
] = (hw_format
<< 12) | swizzle
;
439 /* Let's also prepare vertex builtins */
440 if (dev
->quirks
& HAS_SWIZZLES
)
441 so
->formats
[PAN_VERTEX_ID
] = (MALI_R32UI
<< 12) | panfrost_get_default_swizzle(1);
443 so
->formats
[PAN_VERTEX_ID
] = (MALI_R32UI
<< 12) | panfrost_bifrost_swizzle(1);
445 if (dev
->quirks
& HAS_SWIZZLES
)
446 so
->formats
[PAN_INSTANCE_ID
] = (MALI_R32UI
<< 12) | panfrost_get_default_swizzle(1);
448 so
->formats
[PAN_INSTANCE_ID
] = (MALI_R32UI
<< 12) | panfrost_bifrost_swizzle(1);
454 panfrost_bind_vertex_elements_state(
455 struct pipe_context
*pctx
,
458 struct panfrost_context
*ctx
= pan_context(pctx
);
463 panfrost_create_shader_state(
464 struct pipe_context
*pctx
,
465 const struct pipe_shader_state
*cso
,
466 enum pipe_shader_type stage
)
468 struct panfrost_shader_variants
*so
= CALLOC_STRUCT(panfrost_shader_variants
);
469 struct panfrost_device
*dev
= pan_device(pctx
->screen
);
472 /* Token deep copy to prevent memory corruption */
474 if (cso
->type
== PIPE_SHADER_IR_TGSI
)
475 so
->base
.tokens
= tgsi_dup_tokens(so
->base
.tokens
);
477 /* Precompile for shader-db if we need to */
478 if (unlikely((dev
->debug
& PAN_DBG_PRECOMPILE
) && cso
->type
== PIPE_SHADER_IR_NIR
)) {
479 struct panfrost_context
*ctx
= pan_context(pctx
);
481 struct panfrost_shader_state state
;
482 uint64_t outputs_written
;
484 panfrost_shader_compile(ctx
, PIPE_SHADER_IR_NIR
,
486 tgsi_processor_to_shader_stage(stage
),
487 &state
, &outputs_written
);
494 panfrost_delete_shader_state(
495 struct pipe_context
*pctx
,
498 struct panfrost_shader_variants
*cso
= (struct panfrost_shader_variants
*) so
;
500 if (cso
->base
.type
== PIPE_SHADER_IR_TGSI
) {
501 /* TODO: leaks TGSI tokens! */
504 for (unsigned i
= 0; i
< cso
->variant_count
; ++i
) {
505 struct panfrost_shader_state
*shader_state
= &cso
->variants
[i
];
506 panfrost_bo_unreference(shader_state
->bo
);
507 shader_state
->bo
= NULL
;
515 panfrost_create_sampler_state(
516 struct pipe_context
*pctx
,
517 const struct pipe_sampler_state
*cso
)
519 struct panfrost_sampler_state
*so
= CALLOC_STRUCT(panfrost_sampler_state
);
520 struct panfrost_device
*device
= pan_device(pctx
->screen
);
524 if (device
->quirks
& IS_BIFROST
)
525 panfrost_sampler_desc_init_bifrost(cso
, (struct mali_bifrost_sampler_packed
*) &so
->hw
);
527 panfrost_sampler_desc_init(cso
, &so
->hw
);
533 panfrost_bind_sampler_states(
534 struct pipe_context
*pctx
,
535 enum pipe_shader_type shader
,
536 unsigned start_slot
, unsigned num_sampler
,
539 assert(start_slot
== 0);
541 struct panfrost_context
*ctx
= pan_context(pctx
);
543 /* XXX: Should upload, not just copy? */
544 ctx
->sampler_count
[shader
] = num_sampler
;
545 memcpy(ctx
->samplers
[shader
], sampler
, num_sampler
* sizeof (void *));
549 panfrost_variant_matches(
550 struct panfrost_context
*ctx
,
551 struct panfrost_shader_state
*variant
,
552 enum pipe_shader_type type
)
554 struct panfrost_device
*dev
= pan_device(ctx
->base
.screen
);
555 struct pipe_rasterizer_state
*rasterizer
= &ctx
->rasterizer
->base
;
557 bool is_fragment
= (type
== PIPE_SHADER_FRAGMENT
);
559 if (variant
->outputs_read
) {
560 struct pipe_framebuffer_state
*fb
= &ctx
->pipe_framebuffer
;
563 BITSET_FOREACH_SET(i
, &variant
->outputs_read
, 8) {
564 enum pipe_format fmt
= PIPE_FORMAT_R8G8B8A8_UNORM
;
566 if ((fb
->nr_cbufs
> i
) && fb
->cbufs
[i
])
567 fmt
= fb
->cbufs
[i
]->format
;
569 const struct util_format_description
*desc
=
570 util_format_description(fmt
);
572 if (pan_format_class_load(desc
, dev
->quirks
) == PAN_FORMAT_NATIVE
)
573 fmt
= PIPE_FORMAT_NONE
;
575 if (variant
->rt_formats
[i
] != fmt
)
580 /* Point sprites TODO on bifrost, always pass */
581 if (is_fragment
&& rasterizer
&& (rasterizer
->sprite_coord_enable
|
582 variant
->point_sprite_mask
)
583 && !(dev
->quirks
& IS_BIFROST
)) {
584 /* Ensure the same varyings are turned to point sprites */
585 if (rasterizer
->sprite_coord_enable
!= variant
->point_sprite_mask
)
588 /* Ensure the orientation is correct */
590 rasterizer
->sprite_coord_mode
==
591 PIPE_SPRITE_COORD_UPPER_LEFT
;
593 if (variant
->point_sprite_upper_left
!= upper_left
)
597 /* Otherwise, we're good to go */
602 * Fix an uncompiled shader's stream output info, and produce a bitmask
603 * of which VARYING_SLOT_* are captured for stream output.
605 * Core Gallium stores output->register_index as a "slot" number, where
606 * slots are assigned consecutively to all outputs in info->outputs_written.
607 * This naive packing of outputs doesn't work for us - we too have slots,
608 * but the layout is defined by the VUE map, which we won't have until we
609 * compile a specific shader variant. So, we remap these and simply store
610 * VARYING_SLOT_* in our copy's output->register_index fields.
612 * We then produce a bitmask of outputs which are used for SO.
614 * Implementation from iris.
618 update_so_info(struct pipe_stream_output_info
*so_info
,
619 uint64_t outputs_written
)
621 uint64_t so_outputs
= 0;
622 uint8_t reverse_map
[64] = {0};
625 while (outputs_written
)
626 reverse_map
[slot
++] = u_bit_scan64(&outputs_written
);
628 for (unsigned i
= 0; i
< so_info
->num_outputs
; i
++) {
629 struct pipe_stream_output
*output
= &so_info
->output
[i
];
631 /* Map Gallium's condensed "slots" back to real VARYING_SLOT_* enums */
632 output
->register_index
= reverse_map
[output
->register_index
];
634 so_outputs
|= 1ull << output
->register_index
;
641 panfrost_bind_shader_state(
642 struct pipe_context
*pctx
,
644 enum pipe_shader_type type
)
646 struct panfrost_context
*ctx
= pan_context(pctx
);
647 struct panfrost_device
*dev
= pan_device(ctx
->base
.screen
);
648 ctx
->shader
[type
] = hwcso
;
652 /* Match the appropriate variant */
655 struct panfrost_shader_variants
*variants
= (struct panfrost_shader_variants
*) hwcso
;
657 for (unsigned i
= 0; i
< variants
->variant_count
; ++i
) {
658 if (panfrost_variant_matches(ctx
, &variants
->variants
[i
], type
)) {
665 /* No variant matched, so create a new one */
666 variant
= variants
->variant_count
++;
668 if (variants
->variant_count
> variants
->variant_space
) {
669 unsigned old_space
= variants
->variant_space
;
671 variants
->variant_space
*= 2;
672 if (variants
->variant_space
== 0)
673 variants
->variant_space
= 1;
675 /* Arbitrary limit to stop runaway programs from
676 * creating an unbounded number of shader variants. */
677 assert(variants
->variant_space
< 1024);
679 unsigned msize
= sizeof(struct panfrost_shader_state
);
680 variants
->variants
= realloc(variants
->variants
,
681 variants
->variant_space
* msize
);
683 memset(&variants
->variants
[old_space
], 0,
684 (variants
->variant_space
- old_space
) * msize
);
687 struct panfrost_shader_state
*v
=
688 &variants
->variants
[variant
];
690 if (type
== PIPE_SHADER_FRAGMENT
) {
691 struct pipe_framebuffer_state
*fb
= &ctx
->pipe_framebuffer
;
692 for (unsigned i
= 0; i
< fb
->nr_cbufs
; ++i
) {
693 enum pipe_format fmt
= PIPE_FORMAT_R8G8B8A8_UNORM
;
695 if ((fb
->nr_cbufs
> i
) && fb
->cbufs
[i
])
696 fmt
= fb
->cbufs
[i
]->format
;
698 const struct util_format_description
*desc
=
699 util_format_description(fmt
);
701 if (pan_format_class_load(desc
, dev
->quirks
) == PAN_FORMAT_NATIVE
)
702 fmt
= PIPE_FORMAT_NONE
;
704 v
->rt_formats
[i
] = fmt
;
707 /* Point sprites are TODO on Bifrost */
708 if (ctx
->rasterizer
&& !(dev
->quirks
& IS_BIFROST
)) {
709 v
->point_sprite_mask
= ctx
->rasterizer
->base
.sprite_coord_enable
;
710 v
->point_sprite_upper_left
=
711 ctx
->rasterizer
->base
.sprite_coord_mode
==
712 PIPE_SPRITE_COORD_UPPER_LEFT
;
717 /* Select this variant */
718 variants
->active_variant
= variant
;
720 struct panfrost_shader_state
*shader_state
= &variants
->variants
[variant
];
721 assert(panfrost_variant_matches(ctx
, shader_state
, type
));
723 /* We finally have a variant, so compile it */
725 if (!shader_state
->compiled
) {
726 uint64_t outputs_written
= 0;
728 panfrost_shader_compile(ctx
, variants
->base
.type
,
729 variants
->base
.type
== PIPE_SHADER_IR_NIR
?
730 variants
->base
.ir
.nir
:
731 variants
->base
.tokens
,
732 tgsi_processor_to_shader_stage(type
),
736 shader_state
->compiled
= true;
738 /* Fixup the stream out information, since what Gallium returns
739 * normally is mildly insane */
741 shader_state
->stream_output
= variants
->base
.stream_output
;
742 shader_state
->so_mask
=
743 update_so_info(&shader_state
->stream_output
, outputs_written
);
748 panfrost_create_vs_state(struct pipe_context
*pctx
, const struct pipe_shader_state
*hwcso
)
750 return panfrost_create_shader_state(pctx
, hwcso
, PIPE_SHADER_VERTEX
);
754 panfrost_create_fs_state(struct pipe_context
*pctx
, const struct pipe_shader_state
*hwcso
)
756 return panfrost_create_shader_state(pctx
, hwcso
, PIPE_SHADER_FRAGMENT
);
760 panfrost_bind_vs_state(struct pipe_context
*pctx
, void *hwcso
)
762 panfrost_bind_shader_state(pctx
, hwcso
, PIPE_SHADER_VERTEX
);
766 panfrost_bind_fs_state(struct pipe_context
*pctx
, void *hwcso
)
768 panfrost_bind_shader_state(pctx
, hwcso
, PIPE_SHADER_FRAGMENT
);
772 panfrost_set_vertex_buffers(
773 struct pipe_context
*pctx
,
775 unsigned num_buffers
,
776 const struct pipe_vertex_buffer
*buffers
)
778 struct panfrost_context
*ctx
= pan_context(pctx
);
780 util_set_vertex_buffers_mask(ctx
->vertex_buffers
, &ctx
->vb_mask
, buffers
, start_slot
, num_buffers
);
784 panfrost_set_constant_buffer(
785 struct pipe_context
*pctx
,
786 enum pipe_shader_type shader
, uint index
,
787 const struct pipe_constant_buffer
*buf
)
789 struct panfrost_context
*ctx
= pan_context(pctx
);
790 struct panfrost_constant_buffer
*pbuf
= &ctx
->constant_buffer
[shader
];
792 util_copy_constant_buffer(&pbuf
->cb
[index
], buf
);
794 unsigned mask
= (1 << index
);
796 if (unlikely(!buf
)) {
797 pbuf
->enabled_mask
&= ~mask
;
798 pbuf
->dirty_mask
&= ~mask
;
802 pbuf
->enabled_mask
|= mask
;
803 pbuf
->dirty_mask
|= mask
;
807 panfrost_set_stencil_ref(
808 struct pipe_context
*pctx
,
809 const struct pipe_stencil_ref
*ref
)
811 struct panfrost_context
*ctx
= pan_context(pctx
);
812 ctx
->stencil_ref
= *ref
;
816 panfrost_create_sampler_view_bo(struct panfrost_sampler_view
*so
,
817 struct pipe_context
*pctx
,
818 struct pipe_resource
*texture
)
820 struct panfrost_device
*device
= pan_device(pctx
->screen
);
821 struct panfrost_resource
*prsrc
= (struct panfrost_resource
*)texture
;
822 enum pipe_format format
= so
->base
.format
;
825 /* Format to access the stencil portion of a Z32_S8 texture */
826 if (format
== PIPE_FORMAT_X32_S8X24_UINT
) {
827 assert(prsrc
->separate_stencil
);
828 texture
= &prsrc
->separate_stencil
->base
;
829 prsrc
= (struct panfrost_resource
*)texture
;
830 format
= texture
->format
;
833 const struct util_format_description
*desc
= util_format_description(format
);
835 bool fake_rgtc
= !panfrost_supports_compressed_format(device
, MALI_BC4_UNORM
);
837 if (desc
->layout
== UTIL_FORMAT_LAYOUT_RGTC
&& fake_rgtc
) {
839 format
= PIPE_FORMAT_R8G8B8A8_SNORM
;
841 format
= PIPE_FORMAT_R8G8B8A8_UNORM
;
842 desc
= util_format_description(format
);
845 so
->texture_bo
= prsrc
->bo
->gpu
;
846 so
->modifier
= prsrc
->modifier
;
848 unsigned char user_swizzle
[4] = {
855 /* In the hardware, array_size refers specifically to array textures,
856 * whereas in Gallium, it also covers cubemaps */
858 unsigned array_size
= texture
->array_size
;
859 unsigned depth
= texture
->depth0
;
861 if (so
->base
.target
== PIPE_TEXTURE_CUBE
) {
862 /* TODO: Cubemap arrays */
863 assert(array_size
== 6);
867 /* MSAA only supported for 2D textures (and 2D texture arrays via an
868 * extension currently unimplemented */
870 if (so
->base
.target
== PIPE_TEXTURE_2D
) {
872 depth
= texture
->nr_samples
;
874 /* MSAA only supported for 2D textures */
875 assert(texture
->nr_samples
<= 1);
878 enum mali_texture_dimension type
=
879 panfrost_translate_texture_dimension(so
->base
.target
);
881 if (device
->quirks
& IS_BIFROST
) {
882 unsigned char composed_swizzle
[4];
883 util_format_compose_swizzles(desc
->swizzle
, user_swizzle
, composed_swizzle
);
885 unsigned size
= panfrost_estimate_texture_payload_size(
886 so
->base
.u
.tex
.first_level
,
887 so
->base
.u
.tex
.last_level
,
888 so
->base
.u
.tex
.first_layer
,
889 so
->base
.u
.tex
.last_layer
,
891 type
, prsrc
->modifier
);
893 so
->bo
= panfrost_bo_create(device
, size
, 0);
895 panfrost_new_texture_bifrost(
896 &so
->bifrost_descriptor
,
897 texture
->width0
, texture
->height0
,
900 type
, prsrc
->modifier
,
901 so
->base
.u
.tex
.first_level
,
902 so
->base
.u
.tex
.last_level
,
903 so
->base
.u
.tex
.first_layer
,
904 so
->base
.u
.tex
.last_layer
,
906 prsrc
->cubemap_stride
,
907 panfrost_translate_swizzle_4(composed_swizzle
),
912 unsigned size
= panfrost_estimate_texture_payload_size(
913 so
->base
.u
.tex
.first_level
,
914 so
->base
.u
.tex
.last_level
,
915 so
->base
.u
.tex
.first_layer
,
916 so
->base
.u
.tex
.last_layer
,
918 type
, prsrc
->modifier
);
919 size
+= MALI_MIDGARD_TEXTURE_LENGTH
;
921 so
->bo
= panfrost_bo_create(device
, size
, 0);
923 panfrost_new_texture(
925 texture
->width0
, texture
->height0
,
928 type
, prsrc
->modifier
,
929 so
->base
.u
.tex
.first_level
,
930 so
->base
.u
.tex
.last_level
,
931 so
->base
.u
.tex
.first_layer
,
932 so
->base
.u
.tex
.last_layer
,
934 prsrc
->cubemap_stride
,
935 panfrost_translate_swizzle_4(user_swizzle
),
941 static struct pipe_sampler_view
*
942 panfrost_create_sampler_view(
943 struct pipe_context
*pctx
,
944 struct pipe_resource
*texture
,
945 const struct pipe_sampler_view
*template)
947 struct panfrost_sampler_view
*so
= rzalloc(pctx
, struct panfrost_sampler_view
);
949 pipe_reference(NULL
, &texture
->reference
);
951 so
->base
= *template;
952 so
->base
.texture
= texture
;
953 so
->base
.reference
.count
= 1;
954 so
->base
.context
= pctx
;
956 panfrost_create_sampler_view_bo(so
, pctx
, texture
);
958 return (struct pipe_sampler_view
*) so
;
962 panfrost_set_sampler_views(
963 struct pipe_context
*pctx
,
964 enum pipe_shader_type shader
,
965 unsigned start_slot
, unsigned num_views
,
966 struct pipe_sampler_view
**views
)
968 struct panfrost_context
*ctx
= pan_context(pctx
);
972 assert(start_slot
== 0);
974 for (i
= 0; i
< num_views
; ++i
) {
977 pipe_sampler_view_reference((struct pipe_sampler_view
**)&ctx
->sampler_views
[shader
][i
],
981 for (; i
< ctx
->sampler_view_count
[shader
]; i
++) {
982 pipe_sampler_view_reference((struct pipe_sampler_view
**)&ctx
->sampler_views
[shader
][i
],
985 ctx
->sampler_view_count
[shader
] = new_nr
;
989 panfrost_sampler_view_destroy(
990 struct pipe_context
*pctx
,
991 struct pipe_sampler_view
*pview
)
993 struct panfrost_sampler_view
*view
= (struct panfrost_sampler_view
*) pview
;
995 pipe_resource_reference(&pview
->texture
, NULL
);
996 panfrost_bo_unreference(view
->bo
);
1001 panfrost_set_shader_buffers(
1002 struct pipe_context
*pctx
,
1003 enum pipe_shader_type shader
,
1004 unsigned start
, unsigned count
,
1005 const struct pipe_shader_buffer
*buffers
,
1006 unsigned writable_bitmask
)
1008 struct panfrost_context
*ctx
= pan_context(pctx
);
1010 util_set_shader_buffers_mask(ctx
->ssbo
[shader
], &ctx
->ssbo_mask
[shader
],
1011 buffers
, start
, count
);
1015 panfrost_set_framebuffer_state(struct pipe_context
*pctx
,
1016 const struct pipe_framebuffer_state
*fb
)
1018 struct panfrost_context
*ctx
= pan_context(pctx
);
1020 util_copy_framebuffer_state(&ctx
->pipe_framebuffer
, fb
);
1023 /* We may need to generate a new variant if the fragment shader is
1024 * keyed to the framebuffer format (due to EXT_framebuffer_fetch) */
1025 struct panfrost_shader_variants
*fs
= ctx
->shader
[PIPE_SHADER_FRAGMENT
];
1027 if (fs
&& fs
->variant_count
&& fs
->variants
[fs
->active_variant
].outputs_read
)
1028 ctx
->base
.bind_fs_state(&ctx
->base
, fs
);
1031 static inline unsigned
1032 pan_pipe_to_stencil_op(enum pipe_stencil_op in
)
1035 case PIPE_STENCIL_OP_KEEP
: return MALI_STENCIL_OP_KEEP
;
1036 case PIPE_STENCIL_OP_ZERO
: return MALI_STENCIL_OP_ZERO
;
1037 case PIPE_STENCIL_OP_REPLACE
: return MALI_STENCIL_OP_REPLACE
;
1038 case PIPE_STENCIL_OP_INCR
: return MALI_STENCIL_OP_INCR_SAT
;
1039 case PIPE_STENCIL_OP_DECR
: return MALI_STENCIL_OP_DECR_SAT
;
1040 case PIPE_STENCIL_OP_INCR_WRAP
: return MALI_STENCIL_OP_INCR_WRAP
;
1041 case PIPE_STENCIL_OP_DECR_WRAP
: return MALI_STENCIL_OP_DECR_WRAP
;
1042 case PIPE_STENCIL_OP_INVERT
: return MALI_STENCIL_OP_INVERT
;
1043 default: unreachable("Invalid stencil op");
1048 pan_pipe_to_stencil(const struct pipe_stencil_state
*in
, void *out
)
1050 pan_pack(out
, STENCIL
, cfg
) {
1051 cfg
.mask
= in
->valuemask
;
1052 cfg
.compare_function
= panfrost_translate_compare_func(in
->func
);
1053 cfg
.stencil_fail
= pan_pipe_to_stencil_op(in
->fail_op
);
1054 cfg
.depth_fail
= pan_pipe_to_stencil_op(in
->zfail_op
);
1055 cfg
.depth_pass
= pan_pipe_to_stencil_op(in
->zpass_op
);
1060 panfrost_create_depth_stencil_state(struct pipe_context
*pipe
,
1061 const struct pipe_depth_stencil_alpha_state
*zsa
)
1063 struct panfrost_zsa_state
*so
= CALLOC_STRUCT(panfrost_zsa_state
);
1066 pan_pipe_to_stencil(&zsa
->stencil
[0], &so
->stencil_front
);
1067 pan_pipe_to_stencil(&zsa
->stencil
[1], &so
->stencil_back
);
1069 so
->stencil_mask_front
= zsa
->stencil
[0].writemask
;
1071 if (zsa
->stencil
[1].enabled
)
1072 so
->stencil_mask_back
= zsa
->stencil
[1].writemask
;
1074 so
->stencil_mask_back
= so
->stencil_mask_front
;
1076 /* Alpha lowered by frontend */
1077 assert(!zsa
->alpha
.enabled
);
1079 /* TODO: Bounds test should be easy */
1080 assert(!zsa
->depth
.bounds_test
);
1086 panfrost_bind_depth_stencil_state(struct pipe_context
*pipe
,
1089 struct panfrost_context
*ctx
= pan_context(pipe
);
1090 struct panfrost_zsa_state
*zsa
= cso
;
1091 ctx
->depth_stencil
= zsa
;
1095 panfrost_delete_depth_stencil_state(struct pipe_context
*pipe
, void *depth
)
1101 panfrost_set_sample_mask(struct pipe_context
*pipe
,
1102 unsigned sample_mask
)
1104 struct panfrost_context
*ctx
= pan_context(pipe
);
1105 ctx
->sample_mask
= sample_mask
;
1109 panfrost_set_min_samples(struct pipe_context
*pipe
,
1110 unsigned min_samples
)
1112 struct panfrost_context
*ctx
= pan_context(pipe
);
1113 ctx
->min_samples
= min_samples
;
1118 panfrost_set_clip_state(struct pipe_context
*pipe
,
1119 const struct pipe_clip_state
*clip
)
1121 //struct panfrost_context *panfrost = pan_context(pipe);
1125 panfrost_set_viewport_states(struct pipe_context
*pipe
,
1126 unsigned start_slot
,
1127 unsigned num_viewports
,
1128 const struct pipe_viewport_state
*viewports
)
1130 struct panfrost_context
*ctx
= pan_context(pipe
);
1132 assert(start_slot
== 0);
1133 assert(num_viewports
== 1);
1135 ctx
->pipe_viewport
= *viewports
;
1139 panfrost_set_scissor_states(struct pipe_context
*pipe
,
1140 unsigned start_slot
,
1141 unsigned num_scissors
,
1142 const struct pipe_scissor_state
*scissors
)
1144 struct panfrost_context
*ctx
= pan_context(pipe
);
1146 assert(start_slot
== 0);
1147 assert(num_scissors
== 1);
1149 ctx
->scissor
= *scissors
;
1153 panfrost_set_polygon_stipple(struct pipe_context
*pipe
,
1154 const struct pipe_poly_stipple
*stipple
)
1156 //struct panfrost_context *panfrost = pan_context(pipe);
1160 panfrost_set_active_query_state(struct pipe_context
*pipe
,
1163 struct panfrost_context
*ctx
= pan_context(pipe
);
1164 ctx
->active_queries
= enable
;
1168 panfrost_destroy(struct pipe_context
*pipe
)
1170 struct panfrost_context
*panfrost
= pan_context(pipe
);
1172 if (panfrost
->blitter
)
1173 util_blitter_destroy(panfrost
->blitter
);
1175 if (panfrost
->blitter_wallpaper
)
1176 util_blitter_destroy(panfrost
->blitter_wallpaper
);
1178 util_unreference_framebuffer_state(&panfrost
->pipe_framebuffer
);
1179 u_upload_destroy(pipe
->stream_uploader
);
1184 static struct pipe_query
*
1185 panfrost_create_query(struct pipe_context
*pipe
,
1189 struct panfrost_query
*q
= rzalloc(pipe
, struct panfrost_query
);
1194 return (struct pipe_query
*) q
;
1198 panfrost_destroy_query(struct pipe_context
*pipe
, struct pipe_query
*q
)
1200 struct panfrost_query
*query
= (struct panfrost_query
*) q
;
1203 panfrost_bo_unreference(query
->bo
);
1211 panfrost_begin_query(struct pipe_context
*pipe
, struct pipe_query
*q
)
1213 struct panfrost_context
*ctx
= pan_context(pipe
);
1214 struct panfrost_query
*query
= (struct panfrost_query
*) q
;
1216 switch (query
->type
) {
1217 case PIPE_QUERY_OCCLUSION_COUNTER
:
1218 case PIPE_QUERY_OCCLUSION_PREDICATE
:
1219 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE
:
1220 /* Allocate a bo for the query results to be stored */
1222 query
->bo
= panfrost_bo_create(
1223 pan_device(ctx
->base
.screen
),
1224 sizeof(unsigned), 0);
1227 unsigned *result
= (unsigned *)query
->bo
->cpu
;
1228 *result
= 0; /* Default to 0 if nothing at all drawn. */
1229 ctx
->occlusion_query
= query
;
1232 /* Geometry statistics are computed in the driver. XXX: geom/tess
1235 case PIPE_QUERY_PRIMITIVES_GENERATED
:
1236 query
->start
= ctx
->prims_generated
;
1238 case PIPE_QUERY_PRIMITIVES_EMITTED
:
1239 query
->start
= ctx
->tf_prims_generated
;
1243 /* TODO: timestamp queries, etc? */
1251 panfrost_end_query(struct pipe_context
*pipe
, struct pipe_query
*q
)
1253 struct panfrost_context
*ctx
= pan_context(pipe
);
1254 struct panfrost_query
*query
= (struct panfrost_query
*) q
;
1256 switch (query
->type
) {
1257 case PIPE_QUERY_OCCLUSION_COUNTER
:
1258 case PIPE_QUERY_OCCLUSION_PREDICATE
:
1259 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE
:
1260 ctx
->occlusion_query
= NULL
;
1262 case PIPE_QUERY_PRIMITIVES_GENERATED
:
1263 query
->end
= ctx
->prims_generated
;
1265 case PIPE_QUERY_PRIMITIVES_EMITTED
:
1266 query
->end
= ctx
->tf_prims_generated
;
1274 panfrost_get_query_result(struct pipe_context
*pipe
,
1275 struct pipe_query
*q
,
1277 union pipe_query_result
*vresult
)
1279 struct panfrost_query
*query
= (struct panfrost_query
*) q
;
1280 struct panfrost_context
*ctx
= pan_context(pipe
);
1283 switch (query
->type
) {
1284 case PIPE_QUERY_OCCLUSION_COUNTER
:
1285 case PIPE_QUERY_OCCLUSION_PREDICATE
:
1286 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE
:
1287 panfrost_flush_batches_accessing_bo(ctx
, query
->bo
, false);
1288 panfrost_bo_wait(query
->bo
, INT64_MAX
, false);
1290 /* Read back the query results */
1291 unsigned *result
= (unsigned *) query
->bo
->cpu
;
1292 unsigned passed
= *result
;
1294 if (query
->type
== PIPE_QUERY_OCCLUSION_COUNTER
) {
1295 vresult
->u64
= passed
;
1297 vresult
->b
= !!passed
;
1302 case PIPE_QUERY_PRIMITIVES_GENERATED
:
1303 case PIPE_QUERY_PRIMITIVES_EMITTED
:
1304 panfrost_flush_all_batches(ctx
, 0);
1305 vresult
->u64
= query
->end
- query
->start
;
1309 /* TODO: more queries */
1316 static struct pipe_stream_output_target
*
1317 panfrost_create_stream_output_target(struct pipe_context
*pctx
,
1318 struct pipe_resource
*prsc
,
1319 unsigned buffer_offset
,
1320 unsigned buffer_size
)
1322 struct pipe_stream_output_target
*target
;
1324 target
= rzalloc(pctx
, struct pipe_stream_output_target
);
1329 pipe_reference_init(&target
->reference
, 1);
1330 pipe_resource_reference(&target
->buffer
, prsc
);
1332 target
->context
= pctx
;
1333 target
->buffer_offset
= buffer_offset
;
1334 target
->buffer_size
= buffer_size
;
1340 panfrost_stream_output_target_destroy(struct pipe_context
*pctx
,
1341 struct pipe_stream_output_target
*target
)
1343 pipe_resource_reference(&target
->buffer
, NULL
);
1344 ralloc_free(target
);
1348 panfrost_set_stream_output_targets(struct pipe_context
*pctx
,
1349 unsigned num_targets
,
1350 struct pipe_stream_output_target
**targets
,
1351 const unsigned *offsets
)
1353 struct panfrost_context
*ctx
= pan_context(pctx
);
1354 struct panfrost_streamout
*so
= &ctx
->streamout
;
1356 assert(num_targets
<= ARRAY_SIZE(so
->targets
));
1358 for (unsigned i
= 0; i
< num_targets
; i
++) {
1359 if (offsets
[i
] != -1)
1360 so
->offsets
[i
] = offsets
[i
];
1362 pipe_so_target_reference(&so
->targets
[i
], targets
[i
]);
1365 for (unsigned i
= 0; i
< so
->num_targets
; i
++)
1366 pipe_so_target_reference(&so
->targets
[i
], NULL
);
1368 so
->num_targets
= num_targets
;
1371 struct pipe_context
*
1372 panfrost_create_context(struct pipe_screen
*screen
, void *priv
, unsigned flags
)
1374 struct panfrost_context
*ctx
= rzalloc(screen
, struct panfrost_context
);
1375 struct pipe_context
*gallium
= (struct pipe_context
*) ctx
;
1376 struct panfrost_device
*dev
= pan_device(screen
);
1378 gallium
->screen
= screen
;
1380 gallium
->destroy
= panfrost_destroy
;
1382 gallium
->set_framebuffer_state
= panfrost_set_framebuffer_state
;
1384 gallium
->flush
= panfrost_flush
;
1385 gallium
->clear
= panfrost_clear
;
1386 gallium
->draw_vbo
= panfrost_draw_vbo
;
1387 gallium
->texture_barrier
= panfrost_texture_barrier
;
1389 gallium
->set_vertex_buffers
= panfrost_set_vertex_buffers
;
1390 gallium
->set_constant_buffer
= panfrost_set_constant_buffer
;
1391 gallium
->set_shader_buffers
= panfrost_set_shader_buffers
;
1393 gallium
->set_stencil_ref
= panfrost_set_stencil_ref
;
1395 gallium
->create_sampler_view
= panfrost_create_sampler_view
;
1396 gallium
->set_sampler_views
= panfrost_set_sampler_views
;
1397 gallium
->sampler_view_destroy
= panfrost_sampler_view_destroy
;
1399 gallium
->create_rasterizer_state
= panfrost_create_rasterizer_state
;
1400 gallium
->bind_rasterizer_state
= panfrost_bind_rasterizer_state
;
1401 gallium
->delete_rasterizer_state
= panfrost_generic_cso_delete
;
1403 gallium
->create_vertex_elements_state
= panfrost_create_vertex_elements_state
;
1404 gallium
->bind_vertex_elements_state
= panfrost_bind_vertex_elements_state
;
1405 gallium
->delete_vertex_elements_state
= panfrost_generic_cso_delete
;
1407 gallium
->create_fs_state
= panfrost_create_fs_state
;
1408 gallium
->delete_fs_state
= panfrost_delete_shader_state
;
1409 gallium
->bind_fs_state
= panfrost_bind_fs_state
;
1411 gallium
->create_vs_state
= panfrost_create_vs_state
;
1412 gallium
->delete_vs_state
= panfrost_delete_shader_state
;
1413 gallium
->bind_vs_state
= panfrost_bind_vs_state
;
1415 gallium
->create_sampler_state
= panfrost_create_sampler_state
;
1416 gallium
->delete_sampler_state
= panfrost_generic_cso_delete
;
1417 gallium
->bind_sampler_states
= panfrost_bind_sampler_states
;
1419 gallium
->create_depth_stencil_alpha_state
= panfrost_create_depth_stencil_state
;
1420 gallium
->bind_depth_stencil_alpha_state
= panfrost_bind_depth_stencil_state
;
1421 gallium
->delete_depth_stencil_alpha_state
= panfrost_delete_depth_stencil_state
;
1423 gallium
->set_sample_mask
= panfrost_set_sample_mask
;
1424 gallium
->set_min_samples
= panfrost_set_min_samples
;
1426 gallium
->set_clip_state
= panfrost_set_clip_state
;
1427 gallium
->set_viewport_states
= panfrost_set_viewport_states
;
1428 gallium
->set_scissor_states
= panfrost_set_scissor_states
;
1429 gallium
->set_polygon_stipple
= panfrost_set_polygon_stipple
;
1430 gallium
->set_active_query_state
= panfrost_set_active_query_state
;
1432 gallium
->create_query
= panfrost_create_query
;
1433 gallium
->destroy_query
= panfrost_destroy_query
;
1434 gallium
->begin_query
= panfrost_begin_query
;
1435 gallium
->end_query
= panfrost_end_query
;
1436 gallium
->get_query_result
= panfrost_get_query_result
;
1438 gallium
->create_stream_output_target
= panfrost_create_stream_output_target
;
1439 gallium
->stream_output_target_destroy
= panfrost_stream_output_target_destroy
;
1440 gallium
->set_stream_output_targets
= panfrost_set_stream_output_targets
;
1442 panfrost_resource_context_init(gallium
);
1443 panfrost_blend_context_init(gallium
);
1444 panfrost_compute_context_init(gallium
);
1446 gallium
->stream_uploader
= u_upload_create_default(gallium
);
1447 gallium
->const_uploader
= gallium
->stream_uploader
;
1448 assert(gallium
->stream_uploader
);
1450 /* All of our GPUs support ES mode. Midgard supports additionally
1451 * QUADS/QUAD_STRIPS/POLYGON. Bifrost supports just QUADS. */
1453 ctx
->draw_modes
= (1 << (PIPE_PRIM_QUADS
+ 1)) - 1;
1455 if (!(dev
->quirks
& IS_BIFROST
)) {
1456 ctx
->draw_modes
|= (1 << PIPE_PRIM_QUAD_STRIP
);
1457 ctx
->draw_modes
|= (1 << PIPE_PRIM_POLYGON
);
1460 ctx
->primconvert
= util_primconvert_create(gallium
, ctx
->draw_modes
);
1462 ctx
->blitter
= util_blitter_create(gallium
);
1463 ctx
->blitter_wallpaper
= util_blitter_create(gallium
);
1465 assert(ctx
->blitter
);
1466 assert(ctx
->blitter_wallpaper
);
1468 /* Prepare for render! */
1470 panfrost_batch_init(ctx
);
1472 if (!(dev
->quirks
& IS_BIFROST
)) {
1473 for (unsigned c
= 0; c
< PIPE_MAX_COLOR_BUFS
; ++c
)
1474 ctx
->blit_blend
.rt
[c
].shaders
= _mesa_hash_table_u64_create(ctx
);
1477 /* By default mask everything on */
1478 ctx
->sample_mask
= ~0;
1479 ctx
->active_queries
= true;