panfrost: Add backend targeting the DRM driver
[mesa.git] / src / gallium / drivers / panfrost / pan_context.h
1 /*
2 * © Copyright 2018 Alyssa Rosenzweig
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 */
24
25 #ifndef __BUILDER_H__
26 #define __BUILDER_H__
27
28 #define _LARGEFILE64_SOURCE 1
29 #define CACHE_LINE_SIZE 1024 /* TODO */
30 #include <sys/mman.h>
31 #include <assert.h>
32 #include "pan_resource.h"
33 #include "pan_job.h"
34
35 #include "pipe/p_compiler.h"
36 #include "pipe/p_config.h"
37 #include "pipe/p_context.h"
38 #include "pipe/p_defines.h"
39 #include "pipe/p_format.h"
40 #include "pipe/p_screen.h"
41 #include "pipe/p_state.h"
42 #include "util/u_blitter.h"
43 #include "util/hash_table.h"
44
45 /* Forward declare to avoid extra header dep */
46 struct prim_convert_context;
47
48 #define MAX_DRAW_CALLS 4096
49 #define MAX_VARYINGS 4096
50
51 //#define PAN_DIRTY_CLEAR (1 << 0)
52 #define PAN_DIRTY_RASTERIZER (1 << 2)
53 #define PAN_DIRTY_FS (1 << 3)
54 #define PAN_DIRTY_FRAG_CORE (PAN_DIRTY_FS) /* Dirty writes are tied */
55 #define PAN_DIRTY_VS (1 << 4)
56 #define PAN_DIRTY_VERTEX (1 << 5)
57 #define PAN_DIRTY_VERT_BUF (1 << 6)
58 //#define PAN_DIRTY_VIEWPORT (1 << 7)
59 #define PAN_DIRTY_SAMPLERS (1 << 8)
60 #define PAN_DIRTY_TEXTURES (1 << 9)
61
62 struct panfrost_constant_buffer {
63 bool dirty;
64 size_t size;
65 void *buffer;
66 };
67
68 struct panfrost_query {
69 /* Passthrough from Gallium */
70 unsigned type;
71 unsigned index;
72
73 /* Memory for the GPU to writeback the value of the query */
74 struct panfrost_transfer transfer;
75 };
76
77 struct panfrost_fence {
78 struct pipe_reference reference;
79 int fd;
80 };
81
82 #define PANFROST_MAX_TRANSIENT_ENTRIES 64
83
84 struct panfrost_transient_pool {
85 /* Memory blocks in the pool */
86 struct panfrost_memory_entry *entries[PANFROST_MAX_TRANSIENT_ENTRIES];
87
88 /* Number of entries we own */
89 unsigned entry_count;
90
91 /* Current entry that we are writing to, zero-indexed, strictly less than entry_count */
92 unsigned entry_index;
93
94 /* Number of bytes into the current entry we are */
95 off_t entry_offset;
96
97 /* Entry size (all entries must be homogenous) */
98 size_t entry_size;
99 };
100
101 struct panfrost_context {
102 /* Gallium context */
103 struct pipe_context base;
104
105 /* Bound job and map of panfrost_job_key to jobs */
106 struct panfrost_job *job;
107 struct hash_table *jobs;
108
109 /* Bit mask for supported PIPE_DRAW for this hardware */
110 unsigned draw_modes;
111
112 struct pipe_framebuffer_state pipe_framebuffer;
113
114 /* The number of concurrent FBOs allowed depends on the number of pools
115 * used; pools are ringed for parallelism opportunities */
116
117 struct panfrost_transient_pool transient_pools[2];
118 int cmdstream_i;
119
120 struct panfrost_memory cmdstream_persistent;
121 struct panfrost_memory shaders;
122 struct panfrost_memory scratchpad;
123 struct panfrost_memory tiler_heap;
124 struct panfrost_memory varying_mem;
125 struct panfrost_memory misc_0;
126 struct panfrost_memory misc_1;
127 struct panfrost_memory depth_stencil_buffer;
128
129 struct panfrost_query *occlusion_query;
130
131 /* Each render job has multiple framebuffer descriptors associated with
132 * it, used for various purposes with more or less the same format. The
133 * most obvious is the fragment framebuffer descriptor, which carries
134 * e.g. clearing information */
135
136 union {
137 struct mali_single_framebuffer fragment_sfbd;
138 struct {
139 struct bifrost_framebuffer fragment_mfbd;
140 struct bifrost_fb_extra fragment_extra;
141 struct bifrost_render_target fragment_rts[4];
142 };
143 };
144
145 /* Each draw has corresponding vertex and tiler payloads */
146 struct midgard_payload_vertex_tiler payload_vertex;
147 struct midgard_payload_vertex_tiler payload_tiler;
148
149 /* The fragment shader binary itself is pointed here (for the tripipe) but
150 * also everything else in the shader core, including blending, the
151 * stencil/depth tests, etc. Refer to the presentations. */
152
153 struct mali_shader_meta fragment_shader_core;
154
155 /* A frame is composed of a starting set value job, a number of vertex
156 * and tiler jobs, linked to the fragment job at the end. See the
157 * presentations for more information how this works */
158
159 unsigned draw_count;
160
161 mali_ptr set_value_job;
162 mali_ptr vertex_jobs[MAX_DRAW_CALLS];
163 mali_ptr tiler_jobs[MAX_DRAW_CALLS];
164
165 struct mali_job_descriptor_header *u_set_value_job;
166 struct mali_job_descriptor_header *u_vertex_jobs[MAX_DRAW_CALLS];
167 struct mali_job_descriptor_header *u_tiler_jobs[MAX_DRAW_CALLS];
168
169 unsigned vertex_job_count;
170 unsigned tiler_job_count;
171
172 /* Per-draw Dirty flags are setup like any other driver */
173 int dirty;
174
175 unsigned vertex_count;
176
177 union mali_attr attributes[PIPE_MAX_ATTRIBS];
178
179 unsigned varying_height;
180
181 struct mali_viewport *viewport;
182 struct mali_single_framebuffer vt_framebuffer_sfbd;
183 struct bifrost_framebuffer vt_framebuffer_mfbd;
184
185 /* TODO: Multiple uniform buffers (index =/= 0), finer updates? */
186
187 struct panfrost_constant_buffer constant_buffer[PIPE_SHADER_TYPES];
188
189 /* CSOs */
190 struct panfrost_rasterizer *rasterizer;
191
192 struct panfrost_shader_variants *vs;
193 struct panfrost_shader_variants *fs;
194
195 struct panfrost_vertex_state *vertex;
196
197 struct pipe_vertex_buffer *vertex_buffers;
198 unsigned vertex_buffer_count;
199
200 struct panfrost_sampler_state *samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
201 unsigned sampler_count[PIPE_SHADER_TYPES];
202
203 struct panfrost_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_SAMPLER_VIEWS];
204 unsigned sampler_view_count[PIPE_SHADER_TYPES];
205
206 struct primconvert_context *primconvert;
207 struct blitter_context *blitter;
208
209 struct panfrost_blend_state *blend;
210
211 struct pipe_viewport_state pipe_viewport;
212 struct pipe_scissor_state scissor;
213 struct pipe_blend_color blend_color;
214 struct pipe_depth_stencil_alpha_state *depth_stencil;
215 struct pipe_stencil_ref stencil_ref;
216
217 /* True for t6XX, false for t8xx. */
218 bool is_t6xx;
219
220 /* If set, we'll require the use of single render-target framebuffer
221 * descriptors (SFBD), for older hardware -- specifically, <T760 hardware, If
222 * false, we'll use the MFBD no matter what. New hardware -does- retain support
223 * for SFBD, and in theory we could flip between them on a per-RT basis, but
224 * there's no real advantage to doing so */
225 bool require_sfbd;
226
227 uint32_t out_sync;
228 };
229
230 /* Corresponds to the CSO */
231
232 struct panfrost_rasterizer {
233 struct pipe_rasterizer_state base;
234
235 /* Bitmask of front face, etc */
236 unsigned tiler_gl_enables;
237 };
238
239 struct panfrost_blend_state {
240 struct pipe_blend_state base;
241
242 /* Whether a blend shader is in use */
243 bool has_blend_shader;
244
245 /* Compiled fixed function command */
246 struct mali_blend_equation equation;
247
248 /* Compiled blend shader */
249 mali_ptr blend_shader;
250 int blend_work_count;
251 };
252
253 /* Internal varyings descriptor */
254 struct panfrost_varyings {
255 /* Varyings information: stride of each chunk of memory used for
256 * varyings (similar structure with attributes). Count is just the
257 * number of vec4's. Buffer count is the number of varying chunks (<=
258 * count). Height is used to calculate gl_Position's position ("it's
259 * not a pun, Alyssa!"). Vertex-only varyings == descriptor for
260 * gl_Position and something else apparently occupying the same space.
261 * Varyings == main varyings descriptors following typical mali_attr
262 * conventions. */
263
264 unsigned varyings_stride[MAX_VARYINGS];
265 unsigned varying_count;
266 unsigned varying_buffer_count;
267
268 /* Map of the actual varyings buffer */
269 uint8_t *varyings_buffer_cpu;
270 mali_ptr varyings_descriptor;
271 mali_ptr varyings_descriptor_fragment;
272 };
273
274 /* Variants bundle together to form the backing CSO, bundling multiple
275 * shaders with varying emulated features baked in (alpha test
276 * parameters, etc) */
277 #define MAX_SHADER_VARIANTS 8
278
279 /* A shader state corresponds to the actual, current variant of the shader */
280 struct panfrost_shader_state {
281 struct pipe_shader_state *base;
282
283 /* Compiled, mapped descriptor, ready for the hardware */
284 bool compiled;
285 struct mali_shader_meta *tripipe;
286 mali_ptr tripipe_gpu;
287
288 /* Non-descript information */
289 int uniform_count;
290 bool can_discard;
291 bool writes_point_size;
292
293 /* Valid for vertex shaders only due to when this is calculated */
294 struct panfrost_varyings varyings;
295
296 /* Information on this particular shader variant */
297 struct pipe_alpha_state alpha_state;
298 };
299
300 /* A collection of varyings (the CSO) */
301 struct panfrost_shader_variants {
302 struct pipe_shader_state base;
303
304 struct panfrost_shader_state variants[MAX_SHADER_VARIANTS];
305 unsigned variant_count;
306
307 /* The current active variant */
308 unsigned active_variant;
309 };
310
311 struct panfrost_vertex_state {
312 unsigned num_elements;
313
314 struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];
315 int nr_components[PIPE_MAX_ATTRIBS];
316
317 /* The actual attribute meta, prebaked and GPU mapped. TODO: Free memory */
318 struct mali_attr_meta *hw;
319 mali_ptr descriptor_ptr;
320 };
321
322 struct panfrost_sampler_state {
323 struct pipe_sampler_state base;
324 struct mali_sampler_descriptor hw;
325 };
326
327 /* Misnomer: Sampler view corresponds to textures, not samplers */
328
329 struct panfrost_sampler_view {
330 struct pipe_sampler_view base;
331 struct mali_texture_descriptor hw;
332 };
333
334 static inline struct panfrost_context *
335 pan_context(struct pipe_context *pcontext)
336 {
337 return (struct panfrost_context *) pcontext;
338 }
339
340 static inline struct panfrost_screen *
341 pan_screen(struct pipe_screen *p)
342 {
343 return (struct panfrost_screen *)p;
344 }
345
346 struct pipe_context *
347 panfrost_create_context(struct pipe_screen *screen, void *priv, unsigned flags);
348
349 void
350 panfrost_emit_for_draw(struct panfrost_context *ctx, bool with_vertex_data);
351
352 struct panfrost_transfer
353 panfrost_vertex_tiler_job(struct panfrost_context *ctx, bool is_tiler, bool is_elided_tiler);
354
355 unsigned
356 panfrost_get_default_swizzle(unsigned components);
357
358 void
359 panfrost_flush(
360 struct pipe_context *pipe,
361 struct pipe_fence_handle **fence,
362 unsigned flags);
363
364 mali_ptr
365 panfrost_fragment_job(struct panfrost_context *ctx);
366
367 void
368 panfrost_shader_compile(struct panfrost_context *ctx, struct mali_shader_meta *meta, const char *src, int type, struct panfrost_shader_state *state);
369
370 #endif