panfrost: Force Z/S writeback
[mesa.git] / src / gallium / drivers / panfrost / pan_mfbd.c
1 /*
2 * Copyright 2018-2019 Alyssa Rosenzweig
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 */
24
25 #include "pan_bo.h"
26 #include "pan_context.h"
27 #include "pan_cmdstream.h"
28 #include "pan_util.h"
29 #include "panfrost-quirks.h"
30
31 static struct mali_rt_format
32 panfrost_mfbd_format(struct pipe_surface *surf)
33 {
34 /* Explode details on the format */
35
36 const struct util_format_description *desc =
37 util_format_description(surf->format);
38
39 /* The swizzle for rendering is inverted from texturing */
40
41 unsigned char swizzle[4];
42 panfrost_invert_swizzle(desc->swizzle, swizzle);
43
44 /* Fill in accordingly, defaulting to 8-bit UNORM */
45
46 struct mali_rt_format fmt = {
47 .unk1 = 0x4000000,
48 .unk2 = 0x1,
49 .nr_channels = MALI_POSITIVE(desc->nr_channels),
50 .unk3 = 0x4,
51 .flags = 0x8,
52 .swizzle = panfrost_translate_swizzle_4(swizzle),
53 .no_preload = true
54 };
55
56 if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB)
57 fmt.flags |= MALI_MFBD_FORMAT_SRGB;
58
59 /* sRGB handled as a dedicated flag */
60 enum pipe_format linearized = util_format_linear(surf->format);
61
62 /* If RGB, we're good to go */
63 if (util_format_is_unorm8(desc))
64 return fmt;
65
66 /* Set flags for alternative formats */
67
68 switch (linearized) {
69 case PIPE_FORMAT_B5G6R5_UNORM:
70 fmt.unk1 = 0x14000000;
71 fmt.nr_channels = MALI_POSITIVE(2);
72 fmt.unk3 |= 0x1;
73 break;
74
75 case PIPE_FORMAT_A4B4G4R4_UNORM:
76 case PIPE_FORMAT_B4G4R4A4_UNORM:
77 case PIPE_FORMAT_R4G4B4A4_UNORM:
78 fmt.unk1 = 0x10000000;
79 fmt.unk3 = 0x5;
80 fmt.nr_channels = MALI_POSITIVE(1);
81 break;
82
83 case PIPE_FORMAT_R10G10B10A2_UNORM:
84 case PIPE_FORMAT_B10G10R10A2_UNORM:
85 case PIPE_FORMAT_R10G10B10X2_UNORM:
86 case PIPE_FORMAT_B10G10R10X2_UNORM:
87 fmt.unk1 = 0x08000000;
88 fmt.unk3 = 0x6;
89 fmt.nr_channels = MALI_POSITIVE(1);
90 break;
91
92 case PIPE_FORMAT_B5G5R5A1_UNORM:
93 case PIPE_FORMAT_R5G5B5A1_UNORM:
94 case PIPE_FORMAT_B5G5R5X1_UNORM:
95 fmt.unk1 = 0x18000000;
96 fmt.unk3 = 0x7;
97 fmt.nr_channels = MALI_POSITIVE(2);
98 break;
99
100 /* Generic 8-bit */
101 case PIPE_FORMAT_R8_UINT:
102 case PIPE_FORMAT_R8_SINT:
103 fmt.unk1 = 0x80000000;
104 fmt.unk3 = 0x0;
105 fmt.nr_channels = MALI_POSITIVE(1);
106 break;
107
108 /* Generic 32-bit */
109 case PIPE_FORMAT_R11G11B10_FLOAT:
110 case PIPE_FORMAT_R8G8B8A8_UINT:
111 case PIPE_FORMAT_R8G8B8A8_SINT:
112 case PIPE_FORMAT_R16G16_FLOAT:
113 case PIPE_FORMAT_R16G16_UINT:
114 case PIPE_FORMAT_R16G16_SINT:
115 case PIPE_FORMAT_R32_FLOAT:
116 case PIPE_FORMAT_R32_UINT:
117 case PIPE_FORMAT_R32_SINT:
118 case PIPE_FORMAT_R10G10B10A2_UINT:
119 fmt.unk1 = 0x88000000;
120 fmt.unk3 = 0x0;
121 fmt.nr_channels = MALI_POSITIVE(4);
122 break;
123
124 /* Generic 16-bit */
125 case PIPE_FORMAT_R8G8_UINT:
126 case PIPE_FORMAT_R8G8_SINT:
127 case PIPE_FORMAT_R16_FLOAT:
128 case PIPE_FORMAT_R16_UINT:
129 case PIPE_FORMAT_R16_SINT:
130 fmt.unk1 = 0x84000000;
131 fmt.unk3 = 0x0;
132 fmt.nr_channels = MALI_POSITIVE(2);
133 break;
134
135 /* Generic 64-bit */
136 case PIPE_FORMAT_R32G32_FLOAT:
137 case PIPE_FORMAT_R32G32_SINT:
138 case PIPE_FORMAT_R32G32_UINT:
139 case PIPE_FORMAT_R16G16B16A16_FLOAT:
140 case PIPE_FORMAT_R16G16B16A16_SINT:
141 case PIPE_FORMAT_R16G16B16A16_UINT:
142 fmt.unk1 = 0x8c000000;
143 fmt.unk3 = 0x1;
144 fmt.nr_channels = MALI_POSITIVE(2);
145 break;
146
147 /* Generic 128-bit */
148 case PIPE_FORMAT_R32G32B32A32_FLOAT:
149 case PIPE_FORMAT_R32G32B32A32_SINT:
150 case PIPE_FORMAT_R32G32B32A32_UINT:
151 fmt.unk1 = 0x90000000;
152 fmt.unk3 = 0x1;
153 fmt.nr_channels = MALI_POSITIVE(4);
154 break;
155
156 default:
157 unreachable("Invalid format rendering");
158 }
159
160 return fmt;
161 }
162
163
164 static void
165 panfrost_mfbd_clear(
166 struct panfrost_batch *batch,
167 struct mali_framebuffer *fb,
168 struct mali_framebuffer_extra *fbx,
169 struct mali_render_target *rts,
170 unsigned rt_count)
171 {
172 struct panfrost_context *ctx = batch->ctx;
173 struct pipe_context *gallium = (struct pipe_context *) ctx;
174 struct panfrost_device *dev = pan_device(gallium->screen);
175
176 for (unsigned i = 0; i < rt_count; ++i) {
177 if (!(batch->clear & (PIPE_CLEAR_COLOR0 << i)))
178 continue;
179
180 rts[i].clear_color_1 = batch->clear_color[i][0];
181 rts[i].clear_color_2 = batch->clear_color[i][1];
182 rts[i].clear_color_3 = batch->clear_color[i][2];
183 rts[i].clear_color_4 = batch->clear_color[i][3];
184 }
185
186 if (batch->clear & PIPE_CLEAR_DEPTH) {
187 fb->clear_depth = batch->clear_depth;
188 }
189
190 if (batch->clear & PIPE_CLEAR_STENCIL) {
191 fb->clear_stencil = batch->clear_stencil;
192 }
193
194 if (dev->quirks & IS_BIFROST) {
195 fbx->clear_color_1 = batch->clear_color[0][0];
196 fbx->clear_color_2 = 0xc0000000 | (fbx->clear_color_1 & 0xffff); /* WTF? */
197 }
198 }
199
200 static void
201 panfrost_mfbd_set_cbuf(
202 struct mali_render_target *rt,
203 struct pipe_surface *surf)
204 {
205 struct panfrost_resource *rsrc = pan_resource(surf->texture);
206 struct panfrost_device *dev = pan_device(surf->context->screen);
207 bool is_bifrost = dev->quirks & IS_BIFROST;
208
209 unsigned level = surf->u.tex.level;
210 unsigned first_layer = surf->u.tex.first_layer;
211 assert(surf->u.tex.last_layer == first_layer);
212 int stride = rsrc->slices[level].stride;
213
214 /* Only set layer_stride for MSAA rendering */
215
216 unsigned nr_samples = surf->nr_samples;
217
218 if (!nr_samples)
219 nr_samples = surf->texture->nr_samples;
220
221 unsigned layer_stride = (nr_samples > 1) ? rsrc->slices[level].size0 : 0;
222
223 mali_ptr base = panfrost_get_texture_address(rsrc, level, first_layer, 0);
224
225 rt->format = panfrost_mfbd_format(surf);
226
227 if (layer_stride)
228 rt->format.flags |= MALI_MFBD_FORMAT_MSAA | MALI_MFBD_FORMAT_LAYERED;
229
230 /* Now, we set the layout specific pieces */
231
232 if (rsrc->layout == MALI_TEXTURE_LINEAR) {
233 if (is_bifrost) {
234 rt->format.unk4 = 0x1;
235 } else {
236 rt->format.block = MALI_BLOCK_LINEAR;
237 }
238
239 rt->framebuffer = base;
240 rt->framebuffer_stride = stride / 16;
241 rt->layer_stride = layer_stride;
242 } else if (rsrc->layout == MALI_TEXTURE_TILED) {
243 if (is_bifrost) {
244 rt->format.unk3 |= 0x8;
245 } else {
246 rt->format.block = MALI_BLOCK_TILED;
247 }
248
249 rt->framebuffer = base;
250 rt->framebuffer_stride = stride;
251 rt->layer_stride = layer_stride;
252 } else if (rsrc->layout == MALI_TEXTURE_AFBC) {
253 rt->format.block = MALI_BLOCK_AFBC;
254
255 unsigned header_size = rsrc->slices[level].header_size;
256
257 rt->framebuffer = base + header_size;
258 rt->layer_stride = layer_stride;
259 rt->afbc.metadata = base;
260 rt->afbc.stride = 0;
261 rt->afbc.flags = MALI_AFBC_FLAGS;
262
263 unsigned components = util_format_get_nr_components(surf->format);
264
265 /* The "lossless colorspace transform" is lossy for R and RG formats */
266 if (components >= 3)
267 rt->afbc.flags |= MALI_AFBC_YTR;
268
269 /* TODO: The blob sets this to something nonzero, but it's not
270 * clear what/how to calculate/if it matters */
271 rt->framebuffer_stride = 0;
272 } else {
273 fprintf(stderr, "Invalid render layout (cbuf)");
274 assert(0);
275 }
276 }
277
278 static void
279 panfrost_mfbd_set_zsbuf(
280 struct mali_framebuffer *fb,
281 struct mali_framebuffer_extra *fbx,
282 struct pipe_surface *surf)
283 {
284 struct panfrost_device *dev = pan_device(surf->context->screen);
285 bool is_bifrost = dev->quirks & IS_BIFROST;
286 struct panfrost_resource *rsrc = pan_resource(surf->texture);
287
288 unsigned level = surf->u.tex.level;
289 unsigned first_layer = surf->u.tex.first_layer;
290 assert(surf->u.tex.last_layer == first_layer);
291
292 mali_ptr base = panfrost_get_texture_address(rsrc, level, first_layer, 0);
293
294 if (rsrc->layout == MALI_TEXTURE_AFBC) {
295 /* The only Z/S format we can compress is Z24S8 or variants
296 * thereof (handled by the gallium frontend) */
297 assert(panfrost_is_z24s8_variant(surf->format));
298
299 unsigned header_size = rsrc->slices[level].header_size;
300
301 fb->mfbd_flags |= MALI_MFBD_EXTRA | MALI_MFBD_DEPTH_WRITE;
302
303 fbx->flags_hi |= MALI_EXTRA_PRESENT;
304 fbx->flags_lo |= MALI_EXTRA_ZS | 0x1; /* unknown */
305 fbx->zs_block = MALI_BLOCK_AFBC;
306
307 fbx->ds_afbc.depth_stencil = base + header_size;
308 fbx->ds_afbc.depth_stencil_afbc_metadata = base;
309 fbx->ds_afbc.depth_stencil_afbc_stride = 0;
310
311 fbx->ds_afbc.flags = MALI_AFBC_FLAGS;
312 fbx->ds_afbc.padding = 0x1000;
313 } else if (rsrc->layout == MALI_TEXTURE_LINEAR || rsrc->layout == MALI_TEXTURE_TILED) {
314 /* TODO: Z32F(S8) support, which is always linear */
315
316 int stride = rsrc->slices[level].stride;
317
318 unsigned nr_samples = surf->nr_samples;
319
320 if (!nr_samples)
321 nr_samples = surf->texture->nr_samples;
322
323 unsigned layer_stride = (nr_samples > 1) ? rsrc->slices[level].size0 : 0;
324
325 fb->mfbd_flags |= MALI_MFBD_EXTRA | MALI_MFBD_DEPTH_WRITE;
326 fbx->flags_hi |= MALI_EXTRA_PRESENT;
327 fbx->flags_lo |= MALI_EXTRA_ZS;
328
329 fbx->ds_linear.depth = base;
330
331 if (rsrc->layout == MALI_TEXTURE_LINEAR) {
332 fbx->zs_block = MALI_BLOCK_LINEAR;
333 fbx->ds_linear.depth_stride = stride / 16;
334 fbx->ds_linear.depth_layer_stride = layer_stride;
335 } else {
336 if (is_bifrost) {
337 fbx->zs_block = MALI_BLOCK_UNKNOWN;
338 fbx->flags_hi |= 0x4400;
339 fbx->flags_lo |= 0x1;
340 } else {
341 fbx->zs_block = MALI_BLOCK_TILED;
342 }
343
344 fbx->ds_linear.depth_stride = stride;
345 fbx->ds_linear.depth_layer_stride = layer_stride;
346 }
347
348 if (panfrost_is_z24s8_variant(surf->format)) {
349 fbx->flags_lo |= 0x1;
350 } else if (surf->format == PIPE_FORMAT_Z32_FLOAT) {
351 fbx->flags_lo |= 0xA;
352 fb->mfbd_flags ^= 0x100;
353 fb->mfbd_flags |= 0x200;
354 } else if (surf->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) {
355 fbx->flags_hi |= 0x400;
356 fbx->flags_lo |= 0xA;
357 fb->mfbd_flags ^= 0x100;
358 fb->mfbd_flags |= 0x201;
359
360 struct panfrost_resource *stencil = rsrc->separate_stencil;
361 struct panfrost_slice stencil_slice = stencil->slices[level];
362 unsigned stencil_layer_stride = (nr_samples > 1) ? stencil_slice.size0 : 0;
363
364 fbx->ds_linear.stencil = panfrost_get_texture_address(stencil, level, first_layer, 0);
365 fbx->ds_linear.stencil_stride = stencil_slice.stride;
366 fbx->ds_linear.stencil_layer_stride = stencil_layer_stride;
367 }
368
369 } else {
370 assert(0);
371 }
372 }
373
374 /* Helper for sequential uploads used for MFBD */
375
376 #define UPLOAD(dest, offset, src, max) { \
377 size_t sz = sizeof(*src); \
378 memcpy(dest.cpu + offset, src, sz); \
379 assert((offset + sz) <= max); \
380 offset += sz; \
381 }
382
383 static mali_ptr
384 panfrost_mfbd_upload(struct panfrost_batch *batch,
385 struct mali_framebuffer *fb,
386 struct mali_framebuffer_extra *fbx,
387 struct mali_render_target *rts,
388 unsigned rt_count)
389 {
390 off_t offset = 0;
391
392 /* There may be extra data stuck in the middle */
393 bool has_extra = fb->mfbd_flags & MALI_MFBD_EXTRA;
394
395 /* Compute total size for transfer */
396
397 size_t total_sz =
398 sizeof(struct mali_framebuffer) +
399 (has_extra ? sizeof(struct mali_framebuffer_extra) : 0) +
400 sizeof(struct mali_render_target) * 4;
401
402 struct panfrost_transfer m_f_trans =
403 panfrost_pool_alloc(&batch->pool, total_sz);
404
405 /* Do the transfer */
406
407 UPLOAD(m_f_trans, offset, fb, total_sz);
408
409 if (has_extra)
410 UPLOAD(m_f_trans, offset, fbx, total_sz);
411
412 for (unsigned c = 0; c < 4; ++c) {
413 UPLOAD(m_f_trans, offset, &rts[c], total_sz);
414 }
415
416 /* Return pointer suitable for the fragment section */
417 unsigned tag =
418 MALI_MFBD |
419 (has_extra ? MALI_MFBD_TAG_EXTRA : 0) |
420 (MALI_POSITIVE(rt_count) << 2);
421
422 return m_f_trans.gpu | tag;
423 }
424
425 #undef UPLOAD
426
427 /* Determines whether a framebuffer uses too much tilebuffer space (requiring
428 * us to scale up the tile at a performance penalty). This is conservative but
429 * afaict you get 128-bits per pixel normally */
430
431 static bool
432 pan_is_large_tib(struct panfrost_batch *batch)
433 {
434 unsigned size = 0;
435
436 for (int cb = 0; cb < batch->key.nr_cbufs; ++cb) {
437 struct pipe_surface *surf = batch->key.cbufs[cb];
438 assert(surf);
439 unsigned bpp = util_format_get_blocksize(surf->format);
440 size += ALIGN_POT(bpp, 4);
441 }
442
443 return (size > 16);
444 }
445
446 static struct mali_framebuffer
447 panfrost_emit_mfbd(struct panfrost_batch *batch, unsigned vertex_count)
448 {
449 struct panfrost_context *ctx = batch->ctx;
450 struct pipe_context *gallium = (struct pipe_context *) ctx;
451 struct panfrost_device *dev = pan_device(gallium->screen);
452
453 unsigned width = batch->key.width;
454 unsigned height = batch->key.height;
455
456 struct mali_framebuffer mfbd = {
457 .width1 = MALI_POSITIVE(width),
458 .height1 = MALI_POSITIVE(height),
459 .width2 = MALI_POSITIVE(width),
460 .height2 = MALI_POSITIVE(height),
461
462 /* Seems to configure tib size */
463 .unk1 = pan_is_large_tib(batch) ? 0xc80 : 0x1080,
464
465 .rt_count_1 = MALI_POSITIVE(batch->key.nr_cbufs),
466 .rt_count_2 = 4,
467 };
468
469 if (dev->quirks & IS_BIFROST) {
470 mfbd.msaa.sample_locations = panfrost_emit_sample_locations(batch);
471 mfbd.tiler_meta = panfrost_batch_get_tiler_meta(batch, vertex_count);
472 } else {
473 unsigned shift = panfrost_get_stack_shift(batch->stack_size);
474 struct panfrost_bo *bo = panfrost_batch_get_scratchpad(batch,
475 shift,
476 dev->thread_tls_alloc,
477 dev->core_count);
478 mfbd.shared_memory.stack_shift = shift;
479 mfbd.shared_memory.scratchpad = bo->gpu;
480 mfbd.shared_memory.shared_workgroup_count = ~0;
481
482 mfbd.tiler = panfrost_emit_midg_tiler(batch, vertex_count);
483 }
484
485 return mfbd;
486 }
487
488 void
489 panfrost_attach_mfbd(struct panfrost_batch *batch, unsigned vertex_count)
490 {
491 struct mali_framebuffer mfbd =
492 panfrost_emit_mfbd(batch, vertex_count);
493
494 memcpy(batch->framebuffer.cpu, &mfbd, sizeof(mfbd));
495 }
496
497 /* Creates an MFBD for the FRAGMENT section of the bound framebuffer */
498
499 mali_ptr
500 panfrost_mfbd_fragment(struct panfrost_batch *batch, bool has_draws)
501 {
502 struct panfrost_device *dev = pan_device(batch->ctx->base.screen);
503 bool is_bifrost = dev->quirks & IS_BIFROST;
504
505 struct mali_framebuffer fb = panfrost_emit_mfbd(batch, has_draws);
506 struct mali_framebuffer_extra fbx = {0};
507 struct mali_render_target rts[4] = {0};
508
509 /* We always upload at least one dummy GL_NONE render target */
510
511 unsigned rt_descriptors = MAX2(batch->key.nr_cbufs, 1);
512
513 fb.rt_count_1 = MALI_POSITIVE(rt_descriptors);
514 fb.rt_count_2 = rt_descriptors;
515 fb.mfbd_flags = 0x100;
516
517 /* TODO: MRT clear */
518 panfrost_mfbd_clear(batch, &fb, &fbx, rts, fb.rt_count_2);
519
520
521 /* Upload either the render target or a dummy GL_NONE target */
522
523 for (int cb = 0; cb < rt_descriptors; ++cb) {
524 struct pipe_surface *surf = batch->key.cbufs[cb];
525
526 if (surf) {
527 unsigned nr_samples = surf->nr_samples;
528
529 if (!nr_samples)
530 nr_samples = surf->texture->nr_samples;
531
532 if (nr_samples > 1)
533 batch->requirements |= PAN_REQ_MSAA;
534
535 panfrost_mfbd_set_cbuf(&rts[cb], surf);
536
537 /* What is this? Looks like some extension of the bpp
538 * field. Maybe it establishes how much internal
539 * tilebuffer space is reserved? */
540
541 unsigned bpp = util_format_get_blocksize(surf->format);
542 fb.rt_count_2 = MAX2(fb.rt_count_2, ALIGN_POT(bpp, 4) / 4);
543 } else {
544 struct mali_rt_format null_rt = {
545 .unk1 = 0x4000000,
546 .no_preload = true
547 };
548
549 if (is_bifrost) {
550 null_rt.flags = 0x8;
551 null_rt.unk3 = 0x8;
552 }
553
554 rts[cb].format = null_rt;
555 rts[cb].framebuffer = 0;
556 rts[cb].framebuffer_stride = 0;
557 }
558
559 /* TODO: Break out the field */
560 rts[cb].format.unk1 |= (cb * 0x400);
561 }
562
563 if (batch->key.zsbuf) {
564 panfrost_mfbd_set_zsbuf(&fb, &fbx, batch->key.zsbuf);
565 }
566
567 /* When scanning out, the depth buffer is immediately invalidated, so
568 * we don't need to waste bandwidth writing it out. This can improve
569 * performance substantially (Z24X8_UNORM 1080p @ 60fps is 475 MB/s of
570 * memory bandwidth!).
571 *
572 * The exception is ReadPixels, but this is not supported on GLES so we
573 * can safely ignore it. */
574
575 if (panfrost_batch_is_scanout(batch))
576 batch->requirements &= ~PAN_REQ_DEPTH_WRITE;
577
578 /* Actualize the requirements */
579
580 if (batch->requirements & PAN_REQ_MSAA) {
581 rts[0].format.flags |= MALI_MFBD_FORMAT_MSAA;
582
583 /* XXX */
584 fb.unk1 |= (1 << 4) | (1 << 1);
585 fb.rt_count_2 = 4;
586 }
587
588 if (batch->requirements & PAN_REQ_DEPTH_WRITE)
589 fb.mfbd_flags |= MALI_MFBD_DEPTH_WRITE;
590
591 /* Checksumming only works with a single render target */
592
593 if (batch->key.nr_cbufs == 1) {
594 struct pipe_surface *surf = batch->key.cbufs[0];
595 struct panfrost_resource *rsrc = pan_resource(surf->texture);
596
597 if (rsrc->checksummed) {
598 unsigned level = surf->u.tex.level;
599 struct panfrost_slice *slice = &rsrc->slices[level];
600
601 fb.mfbd_flags |= MALI_MFBD_EXTRA;
602 fbx.flags_hi |= MALI_EXTRA_PRESENT;
603 fbx.checksum_stride = slice->checksum_stride;
604 if (slice->checksum_bo)
605 fbx.checksum = slice->checksum_bo->gpu;
606 else
607 fbx.checksum = rsrc->bo->gpu + slice->checksum_offset;
608 }
609 }
610
611 return panfrost_mfbd_upload(batch, &fb, &fbx, rts, rt_descriptors);
612 }