src/gallium/drivers/panfrost/pan_screen.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 VMware, Inc.
   4  * Copyright 2014 Broadcom
   5  * Copyright 2018 Alyssa Rosenzweig
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the
  10  * "Software"), to deal in the Software without restriction, including
  11  * without limitation the rights to use, copy, modify, merge, publish,
  12  * distribute, sub license, and/or sell copies of the Software, and to
  13  * permit persons to whom the Software is furnished to do so, subject to
  14  * the following conditions:
  15  *
  16  * The above copyright notice and this permission notice (including the
  17  * next paragraph) shall be included in all copies or substantial portions
  18  * of the Software.
  19  *
  20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27  *
  28  **************************************************************************/
  29
  30
  31 #include "util/u_debug.h"
  32 #include "util/u_memory.h"
  33 #include "util/u_format.h"
  34 #include "util/u_format_s3tc.h"
  35 #include "util/u_video.h"
  36 #include "util/u_screen.h"
  37 #include "util/os_time.h"
  38 #include "pipe/p_defines.h"
  39 #include "pipe/p_screen.h"
  40 #include "draw/draw_context.h"
  41 #include <xf86drm.h>
  42
  43 #include <fcntl.h>
  44
  45 #include "drm-uapi/drm_fourcc.h"
  46
  47 #include "pan_screen.h"
  48 #include "pan_resource.h"
  49 #include "pan_public.h"
  50 #include "pan_util.h"
  51
  52 #include "pan_context.h"
  53 #include "midgard/midgard_compile.h"
  54
  55 static const struct debug_named_value debug_options[] = {
  56         {"msgs",      PAN_DBG_MSGS,     "Print debug messages"},
  57         {"shaders",   PAN_DBG_SHADERS,  "Dump shaders in NIR"},
  58         DEBUG_NAMED_VALUE_END
  59 };
  60
  61 DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
  62
  63 int pan_debug = 0;
  64
  65 struct panfrost_driver *panfrost_create_drm_driver(int fd);
  66 struct panfrost_driver *panfrost_create_nondrm_driver(int fd);
  67
  68 const char *pan_counters_base = NULL;
  69
  70 static const char *
  71 panfrost_get_name(struct pipe_screen *screen)
  72 {
  73         return "panfrost";
  74 }
  75
  76 static const char *
  77 panfrost_get_vendor(struct pipe_screen *screen)
  78 {
  79         return "panfrost";
  80 }
  81
  82 static const char *
  83 panfrost_get_device_vendor(struct pipe_screen *screen)
  84 {
  85         return "Arm";
  86 }
  87
  88 static int
  89 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
  90 {
  91         switch (param) {
  92         case PIPE_CAP_NPOT_TEXTURES:
  93         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  94         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  95                 return 1;
  96
  97         case PIPE_CAP_SM3:
  98         case PIPE_CAP_POINT_SPRITE:
  99                 return 1;
 100
 101         case PIPE_CAP_MAX_RENDER_TARGETS:
 102         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 103                 return 1;
 104
 105         case PIPE_CAP_OCCLUSION_QUERY:
 106         case PIPE_CAP_QUERY_TIME_ELAPSED:
 107         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 108                 return 1; /* TODO: Queries */
 109
 110         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 111         case PIPE_CAP_TEXTURE_SWIZZLE:
 112                 return 1;
 113
 114         /* TODO: ES3. We expose these caps so we can access higher dEQP
 115          * tests; in actuality they are nonfunctional */
 116         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 117                 return 4;
 118         case PIPE_CAP_TGSI_INSTANCEID:
 119         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 120                 return 1;
 121
 122         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 123         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 124         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 125                 return 13;
 126
 127         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 128                 return 1;
 129
 130         case PIPE_CAP_INDEP_BLEND_ENABLE:
 131                 return 1;
 132
 133         case PIPE_CAP_INDEP_BLEND_FUNC:
 134                 return 1;
 135
 136         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 137         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 138         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 139         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 140                 return 1;
 141
 142         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 143                 return 1;
 144
 145         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 146         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 147                 return 16 * 4;
 148
 149         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 150         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 151                 return 1024;
 152
 153         case PIPE_CAP_MAX_VERTEX_STREAMS:
 154                 return 1;
 155
 156         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 157                 return 1;
 158
 159         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 160         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 161                 return 1;
 162
 163         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 164                 return 256; /* for GL3 */
 165
 166         case PIPE_CAP_CONDITIONAL_RENDER:
 167                 return 1;
 168
 169         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 170         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 171         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 172                 return 1;
 173
 174         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 175                 return 330;
 176
 177         case PIPE_CAP_USER_VERTEX_BUFFERS: /* TODO */
 178         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 179                 return 0;
 180
 181         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 182         case PIPE_CAP_DOUBLES:
 183         case PIPE_CAP_INT64:
 184         case PIPE_CAP_INT64_DIVMOD:
 185                 return 1;
 186
 187         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 188                 return 16;
 189
 190         case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
 191                 return 0xffff;
 192
 193         case PIPE_CAP_QUERY_TIMESTAMP:
 194         case PIPE_CAP_CUBE_MAP_ARRAY:
 195                 return 1;
 196
 197         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 198                 return 1;
 199
 200         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 201                 return 65536;
 202
 203         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 204                 return 0;
 205
 206         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 207                 return 0;
 208
 209         case PIPE_CAP_MAX_VIEWPORTS:
 210                 return PIPE_MAX_VIEWPORTS;
 211
 212         case PIPE_CAP_ENDIANNESS:
 213                 return PIPE_ENDIAN_NATIVE;
 214
 215         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 216                 return 4;
 217
 218         case PIPE_CAP_TEXTURE_GATHER_SM5:
 219         case PIPE_CAP_TEXTURE_QUERY_LOD:
 220         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 221         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 222         case PIPE_CAP_FAKE_SW_MSAA:
 223                 return 1;
 224
 225         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 226                 return -32;
 227
 228         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 229                 return 31;
 230
 231         case PIPE_CAP_DRAW_INDIRECT:
 232                 return 1;
 233
 234         case PIPE_CAP_QUERY_SO_OVERFLOW:
 235                 return 1;
 236
 237         case PIPE_CAP_VENDOR_ID:
 238                 return 0xFFFFFFFF;
 239
 240         case PIPE_CAP_DEVICE_ID:
 241                 return 0xFFFFFFFF;
 242
 243         case PIPE_CAP_ACCELERATED:
 244                 return 1;
 245
 246         case PIPE_CAP_VIDEO_MEMORY: {
 247                 uint64_t system_memory;
 248
 249                 if (!os_get_total_physical_memory(&system_memory))
 250                         return 0;
 251
 252                 return (int)(system_memory >> 20);
 253         }
 254
 255         case PIPE_CAP_UMA:
 256                 return 1;
 257
 258         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 259         case PIPE_CAP_CLIP_HALFZ:
 260         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 261         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 262         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 263         case PIPE_CAP_CULL_DISTANCE:
 264         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 265         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 266         case PIPE_CAP_CLEAR_TEXTURE:
 267                 return 1;
 268
 269         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 270                 return 4;
 271
 272         case PIPE_CAP_MAX_VARYINGS:
 273                 return 16;
 274
 275         default:
 276                 return u_pipe_screen_get_param_defaults(screen, param);
 277         }
 278 }
 279
 280 static int
 281 panfrost_get_shader_param(struct pipe_screen *screen,
 282                           enum pipe_shader_type shader,
 283                           enum pipe_shader_cap param)
 284 {
 285         if (shader != PIPE_SHADER_VERTEX &&
 286                         shader != PIPE_SHADER_FRAGMENT) {
 287                 return 0;
 288         }
 289
 290         /* this is probably not totally correct.. but it's a start: */
 291         switch (param) {
 292         case PIPE_SHADER_CAP_SCALAR_ISA:
 293                 return 0;
 294
 295         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 296                 return 0;
 297         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 298         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 299         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 300                 return 16384;
 301
 302         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 303                 return 1024;
 304
 305         case PIPE_SHADER_CAP_MAX_INPUTS:
 306                 return 16;
 307
 308         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 309                 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
 310
 311         case PIPE_SHADER_CAP_MAX_TEMPS:
 312                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 313
 314         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 315                 return 16 * 1024 * sizeof(float);
 316
 317         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 318                 return 4;
 319
 320         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 321                 return 0;
 322
 323         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 324         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 325         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 326                 return 0;
 327
 328         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 329                 return 1;
 330
 331         case PIPE_SHADER_CAP_SUBROUTINES:
 332                 return 0;
 333
 334         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 335                 return 0;
 336
 337         case PIPE_SHADER_CAP_INTEGERS:
 338                 return 1;
 339
 340         case PIPE_SHADER_CAP_INT64_ATOMICS:
 341         case PIPE_SHADER_CAP_FP16:
 342         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 343         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 344         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 345         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 346         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 347                 return 0;
 348
 349         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 350         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 351                 return 16; /* XXX: How many? */
 352
 353         case PIPE_SHADER_CAP_PREFERRED_IR:
 354                 return PIPE_SHADER_IR_NIR;
 355
 356         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 357                 return 0;
 358
 359         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 360                 return 32;
 361
 362         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 363         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 364         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 365         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 366         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 367         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 368                 return 0;
 369
 370         default:
 371                 fprintf(stderr, "unknown shader param %d\n", param);
 372                 return 0;
 373         }
 374
 375         return 0;
 376 }
 377
 378 static float
 379 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 380 {
 381         switch (param) {
 382         case PIPE_CAPF_MAX_LINE_WIDTH:
 383
 384         /* fall-through */
 385         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 386                 return 255.0; /* arbitrary */
 387
 388         case PIPE_CAPF_MAX_POINT_WIDTH:
 389
 390         /* fall-through */
 391         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 392                 return 255.0; /* arbitrary */
 393
 394         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 395                 return 16.0;
 396
 397         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 398                 return 16.0; /* arbitrary */
 399
 400         default:
 401                 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 402                 return 0.0;
 403         }
 404 }
 405
 406 /**
 407  * Query format support for creating a texture, drawing surface, etc.
 408  * \param format  the format to test
 409  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 410  */
 411 static boolean
 412 panfrost_is_format_supported( struct pipe_screen *screen,
 413                               enum pipe_format format,
 414                               enum pipe_texture_target target,
 415                               unsigned sample_count,
 416                               unsigned storage_sample_count,
 417                               unsigned bind)
 418 {
 419         const struct util_format_description *format_desc;
 420
 421         assert(target == PIPE_BUFFER ||
 422                target == PIPE_TEXTURE_1D ||
 423                target == PIPE_TEXTURE_1D_ARRAY ||
 424                target == PIPE_TEXTURE_2D ||
 425                target == PIPE_TEXTURE_2D_ARRAY ||
 426                target == PIPE_TEXTURE_RECT ||
 427                target == PIPE_TEXTURE_3D ||
 428                target == PIPE_TEXTURE_CUBE ||
 429                target == PIPE_TEXTURE_CUBE_ARRAY);
 430
 431         format_desc = util_format_description(format);
 432
 433         if (!format_desc)
 434                 return FALSE;
 435
 436         if (sample_count > 1)
 437                 return FALSE;
 438
 439         /* Format wishlist */
 440         if (format == PIPE_FORMAT_Z24X8_UNORM || format == PIPE_FORMAT_X8Z24_UNORM)
 441                 return FALSE;
 442
 443         if (bind & PIPE_BIND_RENDER_TARGET) {
 444                 /* We don't support rendering into anything but RGBA8 yet. We
 445                  * need more formats for spec compliance, but for now, honesty
 446                  * is the best policy <3 */
 447
 448                 if (!util_format_is_rgba8_variant(format_desc))
 449                         return FALSE;
 450
 451                 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
 452                         return FALSE;
 453
 454                 /*
 455                  * Although possible, it is unnatural to render into compressed or YUV
 456                  * surfaces. So disable these here to avoid going into weird paths
 457                  * inside the state trackers.
 458                  */
 459                 if (format_desc->block.width != 1 ||
 460                                 format_desc->block.height != 1)
 461                         return FALSE;
 462         }
 463
 464         if (bind & PIPE_BIND_DEPTH_STENCIL) {
 465                 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
 466                         return FALSE;
 467         }
 468
 469         if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC ||
 470                         format_desc->layout == UTIL_FORMAT_LAYOUT_ASTC) {
 471                 /* Compressed formats not yet hooked up. */
 472                 return FALSE;
 473         }
 474
 475         if ((bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW)) &&
 476                         ((bind & PIPE_BIND_DISPLAY_TARGET) == 0) &&
 477                         target != PIPE_BUFFER) {
 478                 const struct util_format_description *desc =
 479                         util_format_description(format);
 480
 481                 if (desc->nr_channels == 3 && desc->is_array) {
 482                         /* Don't support any 3-component formats for rendering/texturing
 483                          * since we don't support the corresponding 8-bit 3 channel UNORM
 484                          * formats.  This allows us to support GL_ARB_copy_image between
 485                          * GL_RGB8 and GL_RGB8UI, for example.  Otherwise, we may be asked to
 486                          * do a resource copy between PIPE_FORMAT_R8G8B8_UINT and
 487                          * PIPE_FORMAT_R8G8B8X8_UNORM, for example, which will not work
 488                          * (different bpp).
 489                          */
 490                         return FALSE;
 491                 }
 492         }
 493
 494         return TRUE;
 495 }
 496
 497
 498 static void
 499 panfrost_destroy_screen( struct pipe_screen *screen )
 500 {
 501         FREE(screen);
 502 }
 503
 504 static void
 505 panfrost_flush_frontbuffer(struct pipe_screen *_screen,
 506                            struct pipe_resource *resource,
 507                            unsigned level, unsigned layer,
 508                            void *context_private,
 509                            struct pipe_box *sub_box)
 510 {
 511         /* TODO: Display target integration */
 512 }
 513
 514 static uint64_t
 515 panfrost_get_timestamp(struct pipe_screen *_screen)
 516 {
 517         return os_time_get_nano();
 518 }
 519
 520 static void
 521 panfrost_fence_reference(struct pipe_screen *pscreen,
 522                          struct pipe_fence_handle **ptr,
 523                          struct pipe_fence_handle *fence)
 524 {
 525         struct panfrost_screen *screen = pan_screen(pscreen);
 526         screen->driver->fence_reference(pscreen, ptr, fence);
 527 }
 528
 529 static boolean
 530 panfrost_fence_finish(struct pipe_screen *pscreen,
 531                       struct pipe_context *ctx,
 532                       struct pipe_fence_handle *fence,
 533                       uint64_t timeout)
 534 {
 535         struct panfrost_screen *screen = pan_screen(pscreen);
 536         return screen->driver->fence_finish(pscreen, ctx, fence, timeout);
 537 }
 538
 539 static const void *
 540 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
 541                                      enum pipe_shader_ir ir,
 542                                      enum pipe_shader_type shader)
 543 {
 544         return &midgard_nir_options;
 545 }
 546
 547 struct pipe_screen *
 548 panfrost_create_screen(int fd, struct renderonly *ro, bool is_drm)
 549 {
 550         struct panfrost_screen *screen = CALLOC_STRUCT(panfrost_screen);
 551
 552         pan_debug = debug_get_option_pan_debug();
 553
 554         if (!screen)
 555                 return NULL;
 556
 557         if (ro) {
 558                 screen->ro = renderonly_dup(ro);
 559                 if (!screen->ro) {
 560                         fprintf(stderr, "Failed to dup renderonly object\n");
 561                         free(screen);
 562                         return NULL;
 563                 }
 564         }
 565
 566         if (is_drm) {
 567                 screen->driver = panfrost_create_drm_driver(fd);
 568         } else {
 569 #ifdef PAN_NONDRM_OVERLAY
 570                 screen->driver = panfrost_create_nondrm_driver(fd);
 571 #else
 572                 fprintf(stderr, "Legacy (non-DRM) operation requires out-of-tree overlay\n");
 573                 return NULL;
 574 #endif
 575         }
 576
 577         /* Dump memory and/or performance counters iff asked for in the environment */
 578         const char *pantrace_base = getenv("PANTRACE_BASE");
 579         pan_counters_base = getenv("PANCOUNTERS_BASE");
 580
 581         if (pantrace_base) {
 582                 pantrace_initialize(pantrace_base);
 583         }
 584
 585         if (pan_counters_base) {
 586                 screen->driver->allocate_slab(screen, &screen->perf_counters, 64, true, 0, 0, 0);
 587                 screen->driver->enable_counters(screen);
 588         }
 589
 590         screen->base.destroy = panfrost_destroy_screen;
 591
 592         screen->base.get_name = panfrost_get_name;
 593         screen->base.get_vendor = panfrost_get_vendor;
 594         screen->base.get_device_vendor = panfrost_get_device_vendor;
 595         screen->base.get_param = panfrost_get_param;
 596         screen->base.get_shader_param = panfrost_get_shader_param;
 597         screen->base.get_paramf = panfrost_get_paramf;
 598         screen->base.get_timestamp = panfrost_get_timestamp;
 599         screen->base.is_format_supported = panfrost_is_format_supported;
 600         screen->base.context_create = panfrost_create_context;
 601         screen->base.flush_frontbuffer = panfrost_flush_frontbuffer;
 602         screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
 603         screen->base.fence_reference = panfrost_fence_reference;
 604         screen->base.fence_finish = panfrost_fence_finish;
 605
 606         screen->last_fragment_id = -1;
 607         screen->last_fragment_flushed = true;
 608
 609         panfrost_resource_screen_init(screen);
 610
 611         return &screen->base;
 612 }