2 * Copyright (C) 2008 VMware, Inc.
3 * Copyright (C) 2014 Broadcom
4 * Copyright (C) 2018 Alyssa Rosenzweig
5 * Copyright (C) 2019 Collabora, Ltd.
6 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
29 #include "util/u_debug.h"
30 #include "util/u_memory.h"
31 #include "util/format/u_format.h"
32 #include "util/format/u_format_s3tc.h"
33 #include "util/u_video.h"
34 #include "util/u_screen.h"
35 #include "util/os_time.h"
36 #include "util/u_process.h"
37 #include "pipe/p_defines.h"
38 #include "pipe/p_screen.h"
39 #include "draw/draw_context.h"
43 #include "drm-uapi/drm_fourcc.h"
44 #include "drm-uapi/panfrost_drm.h"
47 #include "pan_screen.h"
48 #include "pan_resource.h"
49 #include "pan_public.h"
53 #include "pan_context.h"
54 #include "midgard/midgard_compile.h"
55 #include "bifrost/bifrost_compile.h"
56 #include "panfrost-quirks.h"
58 static const struct debug_named_value debug_options
[] = {
59 {"msgs", PAN_DBG_MSGS
, "Print debug messages"},
60 {"trace", PAN_DBG_TRACE
, "Trace the command stream"},
61 {"deqp", PAN_DBG_DEQP
, "Hacks for dEQP"},
62 {"afbc", PAN_DBG_AFBC
, "Enable AFBC buffer sharing"},
63 {"sync", PAN_DBG_SYNC
, "Wait for each job's completion and check for any GPU fault"},
64 {"precompile", PAN_DBG_PRECOMPILE
, "Precompile shaders for shader-db"},
65 {"nofp16", PAN_DBG_NOFP16
, "Disable 16-bit support"},
66 {"bifrost", PAN_DBG_BIFROST
, "Enable experimental Mali G31 and G52 support"},
67 {"gl3", PAN_DBG_GL3
, "Enable experimental GL 3.x implementation, up to 3.3"},
72 panfrost_get_name(struct pipe_screen
*screen
)
74 return panfrost_model_name(pan_device(screen
)->gpu_id
);
78 panfrost_get_vendor(struct pipe_screen
*screen
)
84 panfrost_get_device_vendor(struct pipe_screen
*screen
)
90 panfrost_get_param(struct pipe_screen
*screen
, enum pipe_cap param
)
92 /* We expose in-dev stuff for dEQP that we don't want apps to use yet */
93 struct panfrost_device
*dev
= pan_device(screen
);
94 bool is_deqp
= dev
->debug
& PAN_DBG_DEQP
;
96 /* Our GL 3.x implementation is WIP */
97 bool is_gl3
= dev
->debug
& PAN_DBG_GL3
;
100 /* Don't expose MRT related CAPs on GPUs that don't implement them */
101 bool has_mrt
= !(dev
->quirks
& MIDGARD_SFBD
);
103 /* Bifrost is WIP. No MRT support yet. */
104 bool is_bifrost
= (dev
->quirks
& IS_BIFROST
);
105 has_mrt
&= !is_bifrost
;
108 case PIPE_CAP_NPOT_TEXTURES
:
109 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS
:
110 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD
:
111 case PIPE_CAP_VERTEX_SHADER_SATURATE
:
112 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED
:
113 case PIPE_CAP_POINT_SPRITE
:
114 case PIPE_CAP_DEPTH_CLIP_DISABLE
:
115 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
116 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES
:
117 case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE
:
120 case PIPE_CAP_MAX_RENDER_TARGETS
:
121 case PIPE_CAP_FBFETCH
:
122 case PIPE_CAP_FBFETCH_COHERENT
:
123 return has_mrt
? 8 : 1;
125 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS
:
128 case PIPE_CAP_SAMPLE_SHADING
:
130 return is_gl3
? 1 : 0;
133 /* ES3 features unsupported on Bifrost */
134 case PIPE_CAP_OCCLUSION_QUERY
:
135 case PIPE_CAP_TGSI_INSTANCEID
:
136 case PIPE_CAP_TEXTURE_MULTISAMPLE
:
137 case PIPE_CAP_SURFACE_SAMPLE_COUNT
:
138 case PIPE_CAP_PRIMITIVE_RESTART
:
139 case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX
:
142 case PIPE_CAP_SAMPLER_VIEW_TARGET
:
143 case PIPE_CAP_TEXTURE_SWIZZLE
:
144 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
145 case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE
:
146 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
147 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
148 case PIPE_CAP_INDEP_BLEND_ENABLE
:
149 case PIPE_CAP_INDEP_BLEND_FUNC
:
150 case PIPE_CAP_GENERATE_MIPMAP
:
151 case PIPE_CAP_ACCELERATED
:
153 case PIPE_CAP_TEXTURE_FLOAT_LINEAR
:
154 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR
:
155 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS
:
156 case PIPE_CAP_TGSI_ARRAY_COMPONENTS
:
159 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS
:
160 return is_bifrost
? 0 : 4;
161 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS
:
162 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS
:
163 return is_bifrost
? 0 : 64;
164 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS
:
165 return is_bifrost
? 0 : 1;
167 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
:
168 return is_bifrost
? 0 : 256;
170 case PIPE_CAP_GLSL_FEATURE_LEVEL
:
171 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY
:
172 return is_gl3
? 330 : (is_bifrost
? 120 : 140);
173 case PIPE_CAP_ESSL_FEATURE_LEVEL
:
174 return is_bifrost
? 120 : 300;
176 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
:
179 /* For faking GLES 3.1 for dEQP-GLES31 */
180 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS
:
181 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS
:
182 case PIPE_CAP_IMAGE_LOAD_FORMATTED
:
183 case PIPE_CAP_CUBE_MAP_ARRAY
:
184 case PIPE_CAP_COMPUTE
:
186 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE
:
187 return is_deqp
? 65536 : 0;
189 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS
:
190 case PIPE_CAP_QUERY_TIMESTAMP
:
191 case PIPE_CAP_CONDITIONAL_RENDER
:
194 /* TODO: Where does this req come from in practice? */
195 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY
:
198 case PIPE_CAP_MAX_TEXTURE_2D_SIZE
:
200 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
201 return is_bifrost
? 0 : 13;
202 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
205 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
206 /* Hardware is natively upper left */
209 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
210 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
211 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
212 case PIPE_CAP_TGSI_TEXCOORD
:
215 /* We would prefer varyings on Midgard, but proper sysvals on Bifrost */
216 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL
:
217 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL
:
218 case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL
:
221 case PIPE_CAP_SEAMLESS_CUBE_MAP
:
222 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE
:
225 case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET
:
228 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER
:
231 case PIPE_CAP_ENDIANNESS
:
232 return PIPE_ENDIAN_NATIVE
;
236 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET
:
239 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET
:
242 case PIPE_CAP_VIDEO_MEMORY
: {
243 uint64_t system_memory
;
245 if (!os_get_total_physical_memory(&system_memory
))
248 return (int)(system_memory
>> 20);
251 case PIPE_CAP_SHADER_STENCIL_EXPORT
:
254 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT
:
257 case PIPE_CAP_MAX_VARYINGS
:
260 case PIPE_CAP_ALPHA_TEST
:
261 case PIPE_CAP_FLATSHADE
:
262 case PIPE_CAP_TWO_SIDED_COLOR
:
263 case PIPE_CAP_CLIP_PLANES
:
266 case PIPE_CAP_PACKED_STREAM_OUTPUT
:
269 case PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED
:
270 case PIPE_CAP_PSIZ_CLAMPED
:
274 return u_pipe_screen_get_param_defaults(screen
, param
);
279 panfrost_get_shader_param(struct pipe_screen
*screen
,
280 enum pipe_shader_type shader
,
281 enum pipe_shader_cap param
)
283 struct panfrost_device
*dev
= pan_device(screen
);
284 bool is_deqp
= dev
->debug
& PAN_DBG_DEQP
;
285 bool is_nofp16
= dev
->debug
& PAN_DBG_NOFP16
;
286 bool is_bifrost
= dev
->quirks
& IS_BIFROST
;
288 if (shader
!= PIPE_SHADER_VERTEX
&&
289 shader
!= PIPE_SHADER_FRAGMENT
&&
290 !(shader
== PIPE_SHADER_COMPUTE
&& is_deqp
))
293 /* this is probably not totally correct.. but it's a start: */
295 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
296 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
297 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
298 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
301 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
304 case PIPE_SHADER_CAP_MAX_INPUTS
:
307 case PIPE_SHADER_CAP_MAX_OUTPUTS
:
308 return shader
== PIPE_SHADER_FRAGMENT
? 8 : 16;
310 case PIPE_SHADER_CAP_MAX_TEMPS
:
311 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
313 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
:
314 return 16 * 1024 * sizeof(float);
316 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
317 return PAN_MAX_CONST_BUFFERS
;
319 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
322 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
323 return is_bifrost
? 0 : 1;
324 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
327 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
330 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
331 return is_bifrost
? 0 : 1;
333 case PIPE_SHADER_CAP_SUBROUTINES
:
336 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
:
339 case PIPE_SHADER_CAP_INTEGERS
:
342 case PIPE_SHADER_CAP_FP16
:
343 case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS
:
346 case PIPE_SHADER_CAP_FP16_DERIVATIVES
:
347 case PIPE_SHADER_CAP_INT16
:
348 case PIPE_SHADER_CAP_INT64_ATOMICS
:
349 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED
:
350 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED
:
351 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED
:
352 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED
:
353 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE
:
356 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
357 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS
:
358 return 16; /* XXX: How many? */
360 case PIPE_SHADER_CAP_PREFERRED_IR
:
361 return PIPE_SHADER_IR_NIR
;
363 case PIPE_SHADER_CAP_SUPPORTED_IRS
:
364 return (1 << PIPE_SHADER_IR_NIR
) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED
);
366 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT
:
369 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS
:
370 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES
:
371 return is_deqp
? 8 : 0;
372 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS
:
373 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS
:
376 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS
:
377 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD
:
381 /* Other params are unknown */
389 panfrost_get_paramf(struct pipe_screen
*screen
, enum pipe_capf param
)
392 case PIPE_CAPF_MAX_LINE_WIDTH
:
395 case PIPE_CAPF_MAX_LINE_WIDTH_AA
:
396 return 255.0; /* arbitrary */
398 case PIPE_CAPF_MAX_POINT_WIDTH
:
401 case PIPE_CAPF_MAX_POINT_WIDTH_AA
:
404 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
:
407 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
:
408 return 16.0; /* arbitrary */
410 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE
:
411 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE
:
412 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY
:
416 debug_printf("Unexpected PIPE_CAPF %d query\n", param
);
422 * Query format support for creating a texture, drawing surface, etc.
423 * \param format the format to test
424 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
427 panfrost_is_format_supported( struct pipe_screen
*screen
,
428 enum pipe_format format
,
429 enum pipe_texture_target target
,
430 unsigned sample_count
,
431 unsigned storage_sample_count
,
434 struct panfrost_device
*dev
= pan_device(screen
);
435 const struct util_format_description
*format_desc
;
437 assert(target
== PIPE_BUFFER
||
438 target
== PIPE_TEXTURE_1D
||
439 target
== PIPE_TEXTURE_1D_ARRAY
||
440 target
== PIPE_TEXTURE_2D
||
441 target
== PIPE_TEXTURE_2D_ARRAY
||
442 target
== PIPE_TEXTURE_RECT
||
443 target
== PIPE_TEXTURE_3D
||
444 target
== PIPE_TEXTURE_CUBE
||
445 target
== PIPE_TEXTURE_CUBE_ARRAY
);
447 format_desc
= util_format_description(format
);
452 /* MSAA 4x supported, but no more. Technically some revisions of the
453 * hardware can go up to 16x but we don't support higher modes yet.
454 * MSAA 2x is notably not supported and gets rounded up to MSAA 4x. */
456 if (!(sample_count
== 0 || sample_count
== 1 || sample_count
== 4))
459 if (MAX2(sample_count
, 1) != MAX2(storage_sample_count
, 1))
462 /* Don't confuse poorly written apps (workaround dEQP bug) that expect
463 * more alpha than they ask for */
465 bool scanout
= bind
& (PIPE_BIND_SCANOUT
| PIPE_BIND_SHARED
| PIPE_BIND_DISPLAY_TARGET
);
466 bool renderable
= bind
& PIPE_BIND_RENDER_TARGET
;
468 if (scanout
&& renderable
&& !util_format_is_rgba8_variant(format_desc
))
471 /* Check we support the format with the given bind */
473 unsigned relevant_bind
= bind
&
474 ( PIPE_BIND_DEPTH_STENCIL
| PIPE_BIND_RENDER_TARGET
475 | PIPE_BIND_VERTEX_BUFFER
| PIPE_BIND_SAMPLER_VIEW
);
477 struct panfrost_format fmt
= panfrost_pipe_format_table
[format
];
479 /* Also check that compressed texture formats are supported on this
480 * particular chip. They may not be depending on system integration
481 * differences. RGTC can be emulated so is always supported. */
483 bool is_rgtc
= format_desc
->layout
== UTIL_FORMAT_LAYOUT_RGTC
;
484 bool supported
= panfrost_supports_compressed_format(dev
, fmt
.hw
);
486 if (!is_rgtc
&& !supported
)
489 return fmt
.hw
&& ((relevant_bind
& ~fmt
.bind
) == 0);
492 /* We always support linear and tiled operations, both external and internal.
493 * We support AFBC for a subset of formats, and colourspace transform for a
494 * subset of those. */
497 panfrost_query_dmabuf_modifiers(struct pipe_screen
*screen
,
498 enum pipe_format format
, int max
, uint64_t *modifiers
, unsigned
499 int *external_only
, int *out_count
)
501 /* Query AFBC status */
502 bool afbc
= panfrost_format_supports_afbc(format
);
503 bool ytr
= panfrost_afbc_can_ytr(format
);
505 /* Don't advertise AFBC before T760 */
506 struct panfrost_device
*dev
= pan_device(screen
);
507 afbc
&= !(dev
->quirks
& MIDGARD_NO_AFBC
);
509 /* XXX: AFBC scanout is broken on mainline RK3399 with older kernels */
510 afbc
&= (dev
->debug
& PAN_DBG_AFBC
);
514 for (unsigned i
= 0; i
< PAN_MODIFIER_COUNT
; ++i
) {
515 if (drm_is_afbc(pan_best_modifiers
[i
]) && !afbc
)
518 if ((pan_best_modifiers
[i
] & AFBC_FORMAT_MOD_YTR
) && !ytr
)
523 if (max
> (int) count
) {
524 modifiers
[count
] = pan_best_modifiers
[i
];
527 external_only
[count
] = false;
535 panfrost_get_compute_param(struct pipe_screen
*pscreen
, enum pipe_shader_ir ir_type
,
536 enum pipe_compute_cap param
, void *ret
)
538 struct panfrost_device
*dev
= pan_device(pscreen
);
539 const char * const ir
= "panfrost";
541 if (!(dev
->debug
& PAN_DBG_DEQP
))
544 #define RET(x) do { \
546 memcpy(ret, x, sizeof(x)); \
551 case PIPE_COMPUTE_CAP_ADDRESS_BITS
:
552 RET((uint32_t []){ 64 });
554 case PIPE_COMPUTE_CAP_IR_TARGET
:
556 sprintf(ret
, "%s", ir
);
557 return strlen(ir
) * sizeof(char);
559 case PIPE_COMPUTE_CAP_GRID_DIMENSION
:
560 RET((uint64_t []) { 3 });
562 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE
:
563 RET(((uint64_t []) { 65535, 65535, 65535 }));
565 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE
:
566 RET(((uint64_t []) { 1024, 1024, 64 }));
568 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK
:
569 RET((uint64_t []) { 1024 });
571 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE
:
572 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
574 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE
:
575 RET((uint64_t []) { 32768 });
577 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE
:
578 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE
:
579 RET((uint64_t []) { 4096 });
581 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE
:
582 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
584 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
:
585 RET((uint32_t []) { 800 /* MHz -- TODO */ });
587 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS
:
588 RET((uint32_t []) { 9999 }); // TODO
590 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED
:
591 RET((uint32_t []) { 1 }); // TODO
593 case PIPE_COMPUTE_CAP_SUBGROUP_SIZE
:
594 RET((uint32_t []) { 32 }); // TODO
596 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK
:
597 RET((uint64_t []) { 1024 }); // TODO
604 panfrost_destroy_screen(struct pipe_screen
*pscreen
)
606 panfrost_close_device(pan_device(pscreen
));
607 ralloc_free(pscreen
);
611 panfrost_get_timestamp(struct pipe_screen
*_screen
)
613 return os_time_get_nano();
617 panfrost_fence_reference(struct pipe_screen
*pscreen
,
618 struct pipe_fence_handle
**ptr
,
619 struct pipe_fence_handle
*fence
)
621 struct panfrost_device
*dev
= pan_device(pscreen
);
622 struct panfrost_fence
**p
= (struct panfrost_fence
**)ptr
;
623 struct panfrost_fence
*f
= (struct panfrost_fence
*)fence
;
624 struct panfrost_fence
*old
= *p
;
626 if (pipe_reference(&(*p
)->reference
, &f
->reference
)) {
627 drmSyncobjDestroy(dev
->fd
, old
->syncobj
);
634 panfrost_fence_finish(struct pipe_screen
*pscreen
,
635 struct pipe_context
*ctx
,
636 struct pipe_fence_handle
*fence
,
639 struct panfrost_device
*dev
= pan_device(pscreen
);
640 struct panfrost_fence
*f
= (struct panfrost_fence
*)fence
;
646 uint64_t abs_timeout
= os_time_get_absolute_timeout(timeout
);
647 if (abs_timeout
== OS_TIMEOUT_INFINITE
)
648 abs_timeout
= INT64_MAX
;
650 ret
= drmSyncobjWait(dev
->fd
, &f
->syncobj
,
652 abs_timeout
, DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL
,
655 f
->signaled
= (ret
>= 0);
659 struct panfrost_fence
*
660 panfrost_fence_create(struct panfrost_context
*ctx
,
663 struct panfrost_fence
*f
= calloc(1, sizeof(*f
));
667 pipe_reference_init(&f
->reference
, 1);
668 f
->syncobj
= syncobj
;
674 panfrost_screen_get_compiler_options(struct pipe_screen
*pscreen
,
675 enum pipe_shader_ir ir
,
676 enum pipe_shader_type shader
)
678 if (pan_device(pscreen
)->quirks
& IS_BIFROST
)
679 return &bifrost_nir_options
;
681 return &midgard_nir_options
;
685 panfrost_create_screen(int fd
, struct renderonly
*ro
)
687 /* Create the screen */
688 struct panfrost_screen
*screen
= rzalloc(NULL
, struct panfrost_screen
);
693 struct panfrost_device
*dev
= pan_device(&screen
->base
);
694 panfrost_open_device(screen
, fd
, dev
);
696 dev
->debug
= debug_get_flags_option("PAN_MESA_DEBUG", debug_options
, 0);
699 dev
->ro
= renderonly_dup(ro
);
701 if (dev
->debug
& PAN_DBG_MSGS
)
702 fprintf(stderr
, "Failed to dup renderonly object\n");
709 /* Check if we're loading against a supported GPU model. */
711 switch (dev
->gpu_id
) {
712 case 0x720: /* T720 */
713 case 0x750: /* T760 */
714 case 0x820: /* T820 */
715 case 0x860: /* T860 */
717 case 0x7093: /* G31 */
718 case 0x7212: /* G52 */
719 if (dev
->debug
& PAN_DBG_BIFROST
)
724 /* Fail to load against untested models */
725 debug_printf("panfrost: Unsupported model %X", dev
->gpu_id
);
726 panfrost_destroy_screen(&(screen
->base
));
730 if (dev
->debug
& (PAN_DBG_TRACE
| PAN_DBG_SYNC
))
731 pandecode_initialize(!(dev
->debug
& PAN_DBG_TRACE
));
733 screen
->base
.destroy
= panfrost_destroy_screen
;
735 screen
->base
.get_name
= panfrost_get_name
;
736 screen
->base
.get_vendor
= panfrost_get_vendor
;
737 screen
->base
.get_device_vendor
= panfrost_get_device_vendor
;
738 screen
->base
.get_param
= panfrost_get_param
;
739 screen
->base
.get_shader_param
= panfrost_get_shader_param
;
740 screen
->base
.get_compute_param
= panfrost_get_compute_param
;
741 screen
->base
.get_paramf
= panfrost_get_paramf
;
742 screen
->base
.get_timestamp
= panfrost_get_timestamp
;
743 screen
->base
.is_format_supported
= panfrost_is_format_supported
;
744 screen
->base
.query_dmabuf_modifiers
= panfrost_query_dmabuf_modifiers
;
745 screen
->base
.context_create
= panfrost_create_context
;
746 screen
->base
.get_compiler_options
= panfrost_screen_get_compiler_options
;
747 screen
->base
.fence_reference
= panfrost_fence_reference
;
748 screen
->base
.fence_finish
= panfrost_fence_finish
;
749 screen
->base
.set_damage_region
= panfrost_resource_set_damage_region
;
751 panfrost_resource_screen_init(&screen
->base
);
753 if (!(dev
->quirks
& IS_BIFROST
))
754 panfrost_init_blit_shaders(dev
);
756 return &screen
->base
;