src/gallium/drivers/panfrost/pan_screen.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 VMware, Inc.
   4  * Copyright 2014 Broadcom
   5  * Copyright 2018 Alyssa Rosenzweig
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the
  10  * "Software"), to deal in the Software without restriction, including
  11  * without limitation the rights to use, copy, modify, merge, publish,
  12  * distribute, sub license, and/or sell copies of the Software, and to
  13  * permit persons to whom the Software is furnished to do so, subject to
  14  * the following conditions:
  15  *
  16  * The above copyright notice and this permission notice (including the
  17  * next paragraph) shall be included in all copies or substantial portions
  18  * of the Software.
  19  *
  20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27  *
  28  **************************************************************************/
  29
  30
  31 #include "util/u_debug.h"
  32 #include "util/u_memory.h"
  33 #include "util/u_format.h"
  34 #include "util/u_format_s3tc.h"
  35 #include "util/u_video.h"
  36 #include "util/u_screen.h"
  37 #include "util/os_time.h"
  38 #include "pipe/p_defines.h"
  39 #include "pipe/p_screen.h"
  40 #include "draw/draw_context.h"
  41 #include <xf86drm.h>
  42
  43 #include <fcntl.h>
  44
  45 #include "drm-uapi/drm_fourcc.h"
  46
  47 #include "pan_screen.h"
  48 #include "pan_resource.h"
  49 #include "pan_public.h"
  50 #include "pan_util.h"
  51
  52 #include "pan_context.h"
  53 #include "midgard/midgard_compile.h"
  54
  55 static const struct debug_named_value debug_options[] = {
  56         {"msgs",      PAN_DBG_MSGS,     "Print debug messages"},
  57         DEBUG_NAMED_VALUE_END
  58 };
  59
  60 DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
  61
  62 int pan_debug = 0;
  63
  64 struct panfrost_driver *panfrost_create_drm_driver(int fd);
  65
  66 const char *pan_counters_base = NULL;
  67
  68 static const char *
  69 panfrost_get_name(struct pipe_screen *screen)
  70 {
  71         return "panfrost";
  72 }
  73
  74 static const char *
  75 panfrost_get_vendor(struct pipe_screen *screen)
  76 {
  77         return "panfrost";
  78 }
  79
  80 static const char *
  81 panfrost_get_device_vendor(struct pipe_screen *screen)
  82 {
  83         return "Arm";
  84 }
  85
  86 static int
  87 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
  88 {
  89         switch (param) {
  90         case PIPE_CAP_NPOT_TEXTURES:
  91         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  92         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  93                 return 1;
  94
  95         case PIPE_CAP_SM3:
  96         case PIPE_CAP_POINT_SPRITE:
  97                 return 1;
  98
  99         case PIPE_CAP_MAX_RENDER_TARGETS:
 100         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 101                 return 1;
 102
 103         case PIPE_CAP_OCCLUSION_QUERY:
 104         case PIPE_CAP_QUERY_TIME_ELAPSED:
 105         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 106                 return 1; /* TODO: Queries */
 107
 108         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 109         case PIPE_CAP_TEXTURE_SWIZZLE:
 110                 return 1;
 111
 112         /* TODO: ES3. We expose these caps so we can access higher dEQP
 113          * tests; in actuality they are nonfunctional */
 114         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 115                 return 4;
 116         case PIPE_CAP_TGSI_INSTANCEID:
 117         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 118                 return 1;
 119
 120         case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 121                 return 4096;
 122         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 123         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 124                 return 13;
 125
 126         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 127                 return 1;
 128
 129         case PIPE_CAP_INDEP_BLEND_ENABLE:
 130                 return 1;
 131
 132         case PIPE_CAP_INDEP_BLEND_FUNC:
 133                 return 1;
 134
 135         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 136                 /* Hardware is natively upper left */
 137                 return 0;
 138
 139         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 140                 return 1;
 141         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 142         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 143                 return 1;
 144
 145         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 146                 return 1;
 147
 148         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 149         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 150                 return 16 * 4;
 151
 152         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 153         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 154                 return 1024;
 155
 156         case PIPE_CAP_MAX_VERTEX_STREAMS:
 157                 return 1;
 158
 159         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 160                 return 1;
 161
 162         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 163         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 164                 return 1;
 165
 166         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 167                 return 256; /* for GL3 */
 168
 169         case PIPE_CAP_CONDITIONAL_RENDER:
 170                 return 1;
 171
 172         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 173         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 174         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 175                 return 1;
 176
 177         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 178                 return 330;
 179
 180         case PIPE_CAP_USER_VERTEX_BUFFERS: /* TODO */
 181         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 182                 return 0;
 183
 184         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 185         case PIPE_CAP_DOUBLES:
 186         case PIPE_CAP_INT64:
 187         case PIPE_CAP_INT64_DIVMOD:
 188                 return 1;
 189
 190         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 191                 return 16;
 192
 193         case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
 194                 return 0xffff;
 195
 196         case PIPE_CAP_QUERY_TIMESTAMP:
 197         case PIPE_CAP_CUBE_MAP_ARRAY:
 198                 return 1;
 199
 200         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 201                 return 1;
 202
 203         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 204                 return 65536;
 205
 206         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 207                 return 0;
 208
 209         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 210                 return 0;
 211
 212         case PIPE_CAP_MAX_VIEWPORTS:
 213                 return PIPE_MAX_VIEWPORTS;
 214
 215         case PIPE_CAP_ENDIANNESS:
 216                 return PIPE_ENDIAN_NATIVE;
 217
 218         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 219                 return 4;
 220
 221         case PIPE_CAP_TEXTURE_GATHER_SM5:
 222         case PIPE_CAP_TEXTURE_QUERY_LOD:
 223         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 224         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 225         case PIPE_CAP_FAKE_SW_MSAA:
 226                 return 1;
 227
 228         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 229                 return -32;
 230
 231         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 232                 return 31;
 233
 234         case PIPE_CAP_DRAW_INDIRECT:
 235                 return 1;
 236
 237         case PIPE_CAP_QUERY_SO_OVERFLOW:
 238                 return 1;
 239
 240         case PIPE_CAP_VENDOR_ID:
 241                 return 0xFFFFFFFF;
 242
 243         case PIPE_CAP_DEVICE_ID:
 244                 return 0xFFFFFFFF;
 245
 246         case PIPE_CAP_ACCELERATED:
 247                 return 1;
 248
 249         case PIPE_CAP_VIDEO_MEMORY: {
 250                 uint64_t system_memory;
 251
 252                 if (!os_get_total_physical_memory(&system_memory))
 253                         return 0;
 254
 255                 return (int)(system_memory >> 20);
 256         }
 257
 258         case PIPE_CAP_UMA:
 259                 return 1;
 260
 261         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 262         case PIPE_CAP_CLIP_HALFZ:
 263         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 264         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 265         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 266         case PIPE_CAP_CULL_DISTANCE:
 267         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 268         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 269         case PIPE_CAP_CLEAR_TEXTURE:
 270                 return 1;
 271
 272         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 273                 return 4;
 274
 275         case PIPE_CAP_MAX_VARYINGS:
 276                 return 16;
 277
 278         default:
 279                 return u_pipe_screen_get_param_defaults(screen, param);
 280         }
 281 }
 282
 283 static int
 284 panfrost_get_shader_param(struct pipe_screen *screen,
 285                           enum pipe_shader_type shader,
 286                           enum pipe_shader_cap param)
 287 {
 288         if (shader != PIPE_SHADER_VERTEX &&
 289                         shader != PIPE_SHADER_FRAGMENT) {
 290                 return 0;
 291         }
 292
 293         /* this is probably not totally correct.. but it's a start: */
 294         switch (param) {
 295         case PIPE_SHADER_CAP_SCALAR_ISA:
 296                 return 0;
 297
 298         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 299                 return 0;
 300         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 301         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 302         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 303                 return 16384;
 304
 305         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 306                 return 1024;
 307
 308         case PIPE_SHADER_CAP_MAX_INPUTS:
 309                 return 16;
 310
 311         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 312                 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
 313
 314         case PIPE_SHADER_CAP_MAX_TEMPS:
 315                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 316
 317         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 318                 return 16 * 1024 * sizeof(float);
 319
 320         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 321                 return 4;
 322
 323         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 324                 return 0;
 325
 326         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 327                 return 1;
 328         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 329                 return 0;
 330
 331         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 332                 return 0;
 333
 334         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 335                 return 1;
 336
 337         case PIPE_SHADER_CAP_SUBROUTINES:
 338                 return 0;
 339
 340         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 341                 return 0;
 342
 343         case PIPE_SHADER_CAP_INTEGERS:
 344                 return 1;
 345
 346         case PIPE_SHADER_CAP_INT64_ATOMICS:
 347         case PIPE_SHADER_CAP_FP16:
 348         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 349         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 350         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 351         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 352         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 353                 return 0;
 354
 355         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 356         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 357                 return 16; /* XXX: How many? */
 358
 359         case PIPE_SHADER_CAP_PREFERRED_IR:
 360                 return PIPE_SHADER_IR_NIR;
 361
 362         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 363                 return 0;
 364
 365         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 366                 return 32;
 367
 368         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 369         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 370         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 371         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 372         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 373         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 374                 return 0;
 375
 376         default:
 377                 fprintf(stderr, "unknown shader param %d\n", param);
 378                 return 0;
 379         }
 380
 381         return 0;
 382 }
 383
 384 static float
 385 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 386 {
 387         switch (param) {
 388         case PIPE_CAPF_MAX_LINE_WIDTH:
 389
 390         /* fall-through */
 391         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 392                 return 255.0; /* arbitrary */
 393
 394         case PIPE_CAPF_MAX_POINT_WIDTH:
 395
 396         /* fall-through */
 397         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 398                 return 255.0; /* arbitrary */
 399
 400         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 401                 return 16.0;
 402
 403         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 404                 return 16.0; /* arbitrary */
 405
 406         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 407         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 408         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 409                 return 0.0f;
 410
 411         default:
 412                 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 413                 return 0.0;
 414         }
 415 }
 416
 417 /**
 418  * Query format support for creating a texture, drawing surface, etc.
 419  * \param format  the format to test
 420  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 421  */
 422 static boolean
 423 panfrost_is_format_supported( struct pipe_screen *screen,
 424                               enum pipe_format format,
 425                               enum pipe_texture_target target,
 426                               unsigned sample_count,
 427                               unsigned storage_sample_count,
 428                               unsigned bind)
 429 {
 430         const struct util_format_description *format_desc;
 431
 432         assert(target == PIPE_BUFFER ||
 433                target == PIPE_TEXTURE_1D ||
 434                target == PIPE_TEXTURE_1D_ARRAY ||
 435                target == PIPE_TEXTURE_2D ||
 436                target == PIPE_TEXTURE_2D_ARRAY ||
 437                target == PIPE_TEXTURE_RECT ||
 438                target == PIPE_TEXTURE_3D ||
 439                target == PIPE_TEXTURE_CUBE ||
 440                target == PIPE_TEXTURE_CUBE_ARRAY);
 441
 442         format_desc = util_format_description(format);
 443
 444         if (!format_desc)
 445                 return FALSE;
 446
 447         if (sample_count > 1)
 448                 return FALSE;
 449
 450         /* Format wishlist */
 451         if (format == PIPE_FORMAT_Z24X8_UNORM || format == PIPE_FORMAT_X8Z24_UNORM)
 452                 return FALSE;
 453
 454         if (format == PIPE_FORMAT_A1B5G5R5_UNORM || format == PIPE_FORMAT_X1B5G5R5_UNORM)
 455                 return FALSE;
 456
 457         if (bind & PIPE_BIND_RENDER_TARGET) {
 458                 /* TODO: Support all the formats! :) */
 459                 bool supported = util_format_is_rgba8_variant(format_desc);
 460                 supported |= format == PIPE_FORMAT_B5G6R5_UNORM;
 461
 462                 if (!supported)
 463                         return FALSE;
 464
 465                 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
 466                         return FALSE;
 467
 468                 /*
 469                  * Although possible, it is unnatural to render into compressed or YUV
 470                  * surfaces. So disable these here to avoid going into weird paths
 471                  * inside the state trackers.
 472                  */
 473                 if (format_desc->block.width != 1 ||
 474                                 format_desc->block.height != 1)
 475                         return FALSE;
 476         }
 477
 478         if (bind & PIPE_BIND_DEPTH_STENCIL) {
 479                 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
 480                         return FALSE;
 481         }
 482
 483         if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC ||
 484                         format_desc->layout == UTIL_FORMAT_LAYOUT_ASTC ||
 485                         format_desc->layout == UTIL_FORMAT_LAYOUT_ETC) {
 486                 /* Compressed formats not yet hooked up. */
 487                 return FALSE;
 488         }
 489
 490         if ((bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW)) &&
 491                         ((bind & PIPE_BIND_DISPLAY_TARGET) == 0) &&
 492                         target != PIPE_BUFFER) {
 493                 const struct util_format_description *desc =
 494                         util_format_description(format);
 495
 496                 if (desc->nr_channels == 3 && desc->is_array) {
 497                         /* Don't support any 3-component formats for rendering/texturing
 498                          * since we don't support the corresponding 8-bit 3 channel UNORM
 499                          * formats.  This allows us to support GL_ARB_copy_image between
 500                          * GL_RGB8 and GL_RGB8UI, for example.  Otherwise, we may be asked to
 501                          * do a resource copy between PIPE_FORMAT_R8G8B8_UINT and
 502                          * PIPE_FORMAT_R8G8B8X8_UNORM, for example, which will not work
 503                          * (different bpp).
 504                          */
 505                         return FALSE;
 506                 }
 507         }
 508
 509         return TRUE;
 510 }
 511
 512
 513 static void
 514 panfrost_destroy_screen( struct pipe_screen *screen )
 515 {
 516         FREE(screen);
 517 }
 518
 519 static void
 520 panfrost_flush_frontbuffer(struct pipe_screen *_screen,
 521                            struct pipe_resource *resource,
 522                            unsigned level, unsigned layer,
 523                            void *context_private,
 524                            struct pipe_box *sub_box)
 525 {
 526         /* TODO: Display target integration */
 527 }
 528
 529 static uint64_t
 530 panfrost_get_timestamp(struct pipe_screen *_screen)
 531 {
 532         return os_time_get_nano();
 533 }
 534
 535 static void
 536 panfrost_fence_reference(struct pipe_screen *pscreen,
 537                          struct pipe_fence_handle **ptr,
 538                          struct pipe_fence_handle *fence)
 539 {
 540         struct panfrost_screen *screen = pan_screen(pscreen);
 541         screen->driver->fence_reference(pscreen, ptr, fence);
 542 }
 543
 544 static boolean
 545 panfrost_fence_finish(struct pipe_screen *pscreen,
 546                       struct pipe_context *ctx,
 547                       struct pipe_fence_handle *fence,
 548                       uint64_t timeout)
 549 {
 550         struct panfrost_screen *screen = pan_screen(pscreen);
 551         return screen->driver->fence_finish(pscreen, ctx, fence, timeout);
 552 }
 553
 554 static const void *
 555 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
 556                                      enum pipe_shader_ir ir,
 557                                      enum pipe_shader_type shader)
 558 {
 559         return &midgard_nir_options;
 560 }
 561
 562 struct pipe_screen *
 563 panfrost_create_screen(int fd, struct renderonly *ro)
 564 {
 565         struct panfrost_screen *screen = CALLOC_STRUCT(panfrost_screen);
 566
 567         pan_debug = debug_get_option_pan_debug();
 568
 569         if (!screen)
 570                 return NULL;
 571
 572         if (ro) {
 573                 screen->ro = renderonly_dup(ro);
 574                 if (!screen->ro) {
 575                         fprintf(stderr, "Failed to dup renderonly object\n");
 576                         free(screen);
 577                         return NULL;
 578                 }
 579         }
 580
 581         screen->driver = panfrost_create_drm_driver(fd);
 582
 583         /* Dump memory and/or performance counters iff asked for in the environment */
 584         const char *pantrace_base = getenv("PANTRACE_BASE");
 585         pan_counters_base = getenv("PANCOUNTERS_BASE");
 586
 587         if (pantrace_base) {
 588                 pantrace_initialize(pantrace_base);
 589         }
 590
 591         if (pan_counters_base) {
 592                 screen->driver->allocate_slab(screen, &screen->perf_counters, 64, true, 0, 0, 0);
 593                 screen->driver->enable_counters(screen);
 594         }
 595
 596         screen->base.destroy = panfrost_destroy_screen;
 597
 598         screen->base.get_name = panfrost_get_name;
 599         screen->base.get_vendor = panfrost_get_vendor;
 600         screen->base.get_device_vendor = panfrost_get_device_vendor;
 601         screen->base.get_param = panfrost_get_param;
 602         screen->base.get_shader_param = panfrost_get_shader_param;
 603         screen->base.get_paramf = panfrost_get_paramf;
 604         screen->base.get_timestamp = panfrost_get_timestamp;
 605         screen->base.is_format_supported = panfrost_is_format_supported;
 606         screen->base.context_create = panfrost_create_context;
 607         screen->base.flush_frontbuffer = panfrost_flush_frontbuffer;
 608         screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
 609         screen->base.fence_reference = panfrost_fence_reference;
 610         screen->base.fence_finish = panfrost_fence_finish;
 611
 612         screen->last_fragment_flushed = true;
 613         screen->last_job = NULL;
 614
 615         panfrost_resource_screen_init(screen);
 616
 617         return &screen->base;
 618 }