src/gallium/drivers/panfrost/pan_screen.c

   1 /*
   2  * Copyright (C) 2008 VMware, Inc.
   3  * Copyright (C) 2014 Broadcom
   4  * Copyright (C) 2018 Alyssa Rosenzweig
   5  * Copyright (C) 2019 Collabora, Ltd.
   6  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25  * SOFTWARE.
  26  *
  27  */
  28
  29 #include "util/u_debug.h"
  30 #include "util/u_memory.h"
  31 #include "util/format/u_format.h"
  32 #include "util/format/u_format_s3tc.h"
  33 #include "util/u_video.h"
  34 #include "util/u_screen.h"
  35 #include "util/os_time.h"
  36 #include "util/u_process.h"
  37 #include "pipe/p_defines.h"
  38 #include "pipe/p_screen.h"
  39 #include "draw/draw_context.h"
  40
  41 #include <fcntl.h>
  42
  43 #include "drm-uapi/drm_fourcc.h"
  44 #include "drm-uapi/panfrost_drm.h"
  45
  46 #include "pan_bo.h"
  47 #include "pan_screen.h"
  48 #include "pan_resource.h"
  49 #include "pan_public.h"
  50 #include "pan_util.h"
  51 #include "pandecode/decode.h"
  52
  53 #include "pan_context.h"
  54 #include "midgard/midgard_compile.h"
  55 #include "panfrost-quirks.h"
  56
  57 static const struct debug_named_value debug_options[] = {
  58         {"msgs",      PAN_DBG_MSGS,     "Print debug messages"},
  59         {"trace",     PAN_DBG_TRACE,    "Trace the command stream"},
  60         {"deqp",      PAN_DBG_DEQP,     "Hacks for dEQP"},
  61         {"afbc",      PAN_DBG_AFBC,     "Enable non-conformant AFBC impl"},
  62         DEBUG_NAMED_VALUE_END
  63 };
  64
  65 DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
  66
  67 int pan_debug = 0;
  68
  69 static const char *
  70 panfrost_get_name(struct pipe_screen *screen)
  71 {
  72         return "panfrost";
  73 }
  74
  75 static const char *
  76 panfrost_get_vendor(struct pipe_screen *screen)
  77 {
  78         return "panfrost";
  79 }
  80
  81 static const char *
  82 panfrost_get_device_vendor(struct pipe_screen *screen)
  83 {
  84         return "Arm";
  85 }
  86
  87 static int
  88 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
  89 {
  90         /* We expose in-dev stuff for dEQP that we don't want apps to use yet */
  91         bool is_deqp = pan_debug & PAN_DBG_DEQP;
  92
  93         switch (param) {
  94         case PIPE_CAP_NPOT_TEXTURES:
  95         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  96         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  97         case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
  98         case PIPE_CAP_VERTEX_SHADER_SATURATE:
  99         case PIPE_CAP_POINT_SPRITE:
 100                 return 1;
 101
 102         case PIPE_CAP_MAX_RENDER_TARGETS:
 103                 return is_deqp ? 4 : 1;
 104
 105         /* Throttling frames breaks pipelining */
 106         case PIPE_CAP_THROTTLE:
 107                 return 0;
 108
 109         case PIPE_CAP_OCCLUSION_QUERY:
 110                 return 1;
 111         case PIPE_CAP_QUERY_TIME_ELAPSED:
 112         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 113         case PIPE_CAP_QUERY_TIMESTAMP:
 114         case PIPE_CAP_QUERY_SO_OVERFLOW:
 115                 return 0;
 116
 117         case PIPE_CAP_TEXTURE_SWIZZLE:
 118                 return 1;
 119
 120         case PIPE_CAP_TGSI_INSTANCEID:
 121         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 122                 return is_deqp ? 1 : 0;
 123
 124         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 125                 return is_deqp ? 4 : 0;
 126         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 127         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 128                 return is_deqp ? 64 : 0;
 129         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 130                 return 1;
 131
 132         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 133                 return is_deqp ? 256 : 0; /* for GL3 */
 134
 135         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 136         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 137                 return is_deqp ? 140 : 120;
 138         case PIPE_CAP_ESSL_FEATURE_LEVEL:
 139                 return is_deqp ? 300 : 120;
 140
 141         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 142                 return is_deqp ? 16 : 0;
 143
 144         case PIPE_CAP_CUBE_MAP_ARRAY:
 145                 return is_deqp;
 146
 147         /* For faking GLES 3.1 for dEQP-GLES31 */
 148         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 149         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 150         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 151         case PIPE_CAP_IMAGE_LOAD_FORMATTED:
 152                 return is_deqp;
 153
 154         /* For faking compute shaders */
 155         case PIPE_CAP_COMPUTE:
 156                 return is_deqp;
 157
 158         /* TODO: Where does this req come from in practice? */
 159         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 160                 return 1;
 161
 162         case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 163                 return 4096;
 164         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 165         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 166                 return 13;
 167
 168         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 169         case PIPE_CAP_INDEP_BLEND_ENABLE:
 170         case PIPE_CAP_INDEP_BLEND_FUNC:
 171                 return 1;
 172
 173         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 174                 /* Hardware is natively upper left */
 175                 return 0;
 176
 177         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 178         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 179         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 180         case PIPE_CAP_GENERATE_MIPMAP:
 181                 return 1;
 182
 183         /* We would prefer varyings */
 184         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 185         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 186                 return 0;
 187
 188         /* I really don't want to set this CAP but let's not swim against the
 189          * tide.. */
 190         case PIPE_CAP_TGSI_TEXCOORD:
 191                 return 1;
 192
 193         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 194         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 195                 return 1;
 196
 197         case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
 198                 return 0xffff;
 199
 200         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 201                 return 1;
 202
 203         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 204                 return 65536;
 205
 206         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 207                 return 0;
 208
 209         case PIPE_CAP_ENDIANNESS:
 210                 return PIPE_ENDIAN_NATIVE;
 211
 212         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 213                 return 1;
 214
 215         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 216                 return -8;
 217
 218         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 219                 return 7;
 220
 221         case PIPE_CAP_VENDOR_ID:
 222         case PIPE_CAP_DEVICE_ID:
 223                 return 0xFFFFFFFF;
 224
 225         case PIPE_CAP_ACCELERATED:
 226         case PIPE_CAP_UMA:
 227         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 228         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 229         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 230         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 231                 return 1;
 232
 233         case PIPE_CAP_VIDEO_MEMORY: {
 234                 uint64_t system_memory;
 235
 236                 if (!os_get_total_physical_memory(&system_memory))
 237                         return 0;
 238
 239                 return (int)(system_memory >> 20);
 240         }
 241
 242         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 243                 return 4;
 244
 245         case PIPE_CAP_MAX_VARYINGS:
 246                 return 16;
 247
 248         case PIPE_CAP_ALPHA_TEST:
 249                 return 0;
 250
 251         default:
 252                 return u_pipe_screen_get_param_defaults(screen, param);
 253         }
 254 }
 255
 256 static int
 257 panfrost_get_shader_param(struct pipe_screen *screen,
 258                           enum pipe_shader_type shader,
 259                           enum pipe_shader_cap param)
 260 {
 261         bool is_deqp = pan_debug & PAN_DBG_DEQP;
 262
 263         if (shader != PIPE_SHADER_VERTEX &&
 264             shader != PIPE_SHADER_FRAGMENT &&
 265             !(shader == PIPE_SHADER_COMPUTE && is_deqp))
 266                 return 0;
 267
 268         /* this is probably not totally correct.. but it's a start: */
 269         switch (param) {
 270         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 271         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 272         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 273         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 274                 return 16384;
 275
 276         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 277                 return 1024;
 278
 279         case PIPE_SHADER_CAP_MAX_INPUTS:
 280                 return 16;
 281
 282         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 283                 return shader == PIPE_SHADER_FRAGMENT ? 4 : 8;
 284
 285         case PIPE_SHADER_CAP_MAX_TEMPS:
 286                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 287
 288         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 289                 return 16 * 1024 * sizeof(float);
 290
 291         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 292                 return PAN_MAX_CONST_BUFFERS;
 293
 294         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 295                 return 0;
 296
 297         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 298                 return 1;
 299         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 300                 return 0;
 301
 302         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 303                 return 0;
 304
 305         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 306                 return 1;
 307
 308         case PIPE_SHADER_CAP_SUBROUTINES:
 309                 return 0;
 310
 311         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 312                 return 0;
 313
 314         case PIPE_SHADER_CAP_INTEGERS:
 315                 return 1;
 316
 317         case PIPE_SHADER_CAP_INT64_ATOMICS:
 318         case PIPE_SHADER_CAP_FP16:
 319         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 320         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 321         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 322         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 323         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 324                 return 0;
 325
 326         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 327         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 328                 return 16; /* XXX: How many? */
 329
 330         case PIPE_SHADER_CAP_PREFERRED_IR:
 331                 return PIPE_SHADER_IR_NIR;
 332
 333         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 334                 return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED);
 335
 336         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 337                 return 32;
 338
 339         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 340         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 341                 return is_deqp ? 4 : 0;
 342         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 343         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 344                 return 0;
 345
 346         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 347         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 348                 return 0;
 349
 350         default:
 351                 fprintf(stderr, "unknown shader param %d\n", param);
 352                 return 0;
 353         }
 354
 355         return 0;
 356 }
 357
 358 static float
 359 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 360 {
 361         switch (param) {
 362         case PIPE_CAPF_MAX_LINE_WIDTH:
 363
 364         /* fall-through */
 365         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 366                 return 255.0; /* arbitrary */
 367
 368         case PIPE_CAPF_MAX_POINT_WIDTH:
 369
 370         /* fall-through */
 371         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 372                 return 1024.0;
 373
 374         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 375                 return 16.0;
 376
 377         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 378                 return 16.0; /* arbitrary */
 379
 380         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 381         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 382         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 383                 return 0.0f;
 384
 385         default:
 386                 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 387                 return 0.0;
 388         }
 389 }
 390
 391 /**
 392  * Query format support for creating a texture, drawing surface, etc.
 393  * \param format  the format to test
 394  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 395  */
 396 static bool
 397 panfrost_is_format_supported( struct pipe_screen *screen,
 398                               enum pipe_format format,
 399                               enum pipe_texture_target target,
 400                               unsigned sample_count,
 401                               unsigned storage_sample_count,
 402                               unsigned bind)
 403 {
 404         const struct util_format_description *format_desc;
 405
 406         assert(target == PIPE_BUFFER ||
 407                target == PIPE_TEXTURE_1D ||
 408                target == PIPE_TEXTURE_1D_ARRAY ||
 409                target == PIPE_TEXTURE_2D ||
 410                target == PIPE_TEXTURE_2D_ARRAY ||
 411                target == PIPE_TEXTURE_RECT ||
 412                target == PIPE_TEXTURE_3D ||
 413                target == PIPE_TEXTURE_CUBE ||
 414                target == PIPE_TEXTURE_CUBE_ARRAY);
 415
 416         format_desc = util_format_description(format);
 417
 418         if (!format_desc)
 419                 return false;
 420
 421         if (sample_count > 1)
 422                 return false;
 423
 424         /* Format wishlist */
 425         if (format == PIPE_FORMAT_X8Z24_UNORM)
 426                 return false;
 427
 428         if (format == PIPE_FORMAT_A1B5G5R5_UNORM || format == PIPE_FORMAT_X1B5G5R5_UNORM)
 429                 return false;
 430
 431         /* TODO */
 432         if (format == PIPE_FORMAT_B5G5R5A1_UNORM)
 433                 return FALSE;
 434
 435         /* Don't confuse poorly written apps (workaround dEQP bug) that expect
 436          * more alpha than they ask for */
 437
 438         bool scanout = bind & (PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | PIPE_BIND_DISPLAY_TARGET);
 439         bool renderable = bind & PIPE_BIND_RENDER_TARGET;
 440
 441         if (scanout && renderable && !util_format_is_rgba8_variant(format_desc))
 442                 return false;
 443
 444         if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN &&
 445             format_desc->layout != UTIL_FORMAT_LAYOUT_OTHER) {
 446                 /* Compressed formats not yet hooked up. */
 447                 return false;
 448         }
 449
 450         /* Internally, formats that are depth/stencil renderable are limited.
 451          *
 452          * In particular: Z16, Z24, Z24S8, S8 are all identical from the GPU
 453          * rendering perspective. That is, we render to Z24S8 (which we can
 454          * AFBC compress), ignore the different when texturing (who cares?),
 455          * and then in the off-chance there's a CPU read we blit back to
 456          * staging.
 457          *
 458          * ...alternatively, we can make the state tracker deal with that. */
 459
 460         if (bind & PIPE_BIND_DEPTH_STENCIL) {
 461                 switch (format) {
 462                         case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 463                         case PIPE_FORMAT_Z24X8_UNORM:
 464                         case PIPE_FORMAT_Z32_UNORM:
 465                         case PIPE_FORMAT_Z32_FLOAT:
 466                         case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 467                                 return true;
 468
 469                         default:
 470                                 return false;
 471                 }
 472         }
 473
 474         return true;
 475 }
 476
 477 static int
 478 panfrost_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
 479                 enum pipe_compute_cap param, void *ret)
 480 {
 481         const char * const ir = "panfrost";
 482
 483         if (!(pan_debug & PAN_DBG_DEQP))
 484                 return 0;
 485
 486 #define RET(x) do {                  \
 487    if (ret)                          \
 488       memcpy(ret, x, sizeof(x));     \
 489    return sizeof(x);                 \
 490 } while (0)
 491
 492         switch (param) {
 493         case PIPE_COMPUTE_CAP_ADDRESS_BITS:
 494                 RET((uint32_t []){ 64 });
 495
 496         case PIPE_COMPUTE_CAP_IR_TARGET:
 497                 if (ret)
 498                         sprintf(ret, "%s", ir);
 499                 return strlen(ir) * sizeof(char);
 500
 501         case PIPE_COMPUTE_CAP_GRID_DIMENSION:
 502                 RET((uint64_t []) { 3 });
 503
 504         case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 505                 RET(((uint64_t []) { 65535, 65535, 65535 }));
 506
 507         case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 508                 RET(((uint64_t []) { 1024, 1024, 64 }));
 509
 510         case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 511                 RET((uint64_t []) { 1024 });
 512
 513         case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
 514                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 515
 516         case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 517                 RET((uint64_t []) { 32768 });
 518
 519         case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
 520         case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
 521                 RET((uint64_t []) { 4096 });
 522
 523         case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
 524                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 525
 526         case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
 527                 RET((uint32_t []) { 800 /* MHz -- TODO */ });
 528
 529         case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
 530                 RET((uint32_t []) { 9999 });  // TODO
 531
 532         case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
 533                 RET((uint32_t []) { 1 }); // TODO
 534
 535         case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
 536                 RET((uint32_t []) { 32 });  // TODO
 537
 538         case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
 539                 RET((uint64_t []) { 1024 }); // TODO
 540         }
 541
 542         return 0;
 543 }
 544
 545 static void
 546 panfrost_destroy_screen(struct pipe_screen *pscreen)
 547 {
 548         struct panfrost_screen *screen = pan_screen(pscreen);
 549         panfrost_bo_cache_evict_all(screen);
 550         pthread_mutex_destroy(&screen->bo_cache.lock);
 551         pthread_mutex_destroy(&screen->active_bos_lock);
 552         drmFreeVersion(screen->kernel_version);
 553         ralloc_free(screen);
 554 }
 555
 556 static void
 557 panfrost_flush_frontbuffer(struct pipe_screen *_screen,
 558                            struct pipe_resource *resource,
 559                            unsigned level, unsigned layer,
 560                            void *context_private,
 561                            struct pipe_box *sub_box)
 562 {
 563         /* TODO: Display target integration */
 564 }
 565
 566 static uint64_t
 567 panfrost_get_timestamp(struct pipe_screen *_screen)
 568 {
 569         return os_time_get_nano();
 570 }
 571
 572 static void
 573 panfrost_fence_reference(struct pipe_screen *pscreen,
 574                          struct pipe_fence_handle **ptr,
 575                          struct pipe_fence_handle *fence)
 576 {
 577         struct panfrost_fence **p = (struct panfrost_fence **)ptr;
 578         struct panfrost_fence *f = (struct panfrost_fence *)fence;
 579         struct panfrost_fence *old = *p;
 580
 581         if (pipe_reference(&(*p)->reference, &f->reference)) {
 582                 util_dynarray_foreach(&old->syncfds, int, fd)
 583                         close(*fd);
 584                 util_dynarray_fini(&old->syncfds);
 585                 free(old);
 586         }
 587         *p = f;
 588 }
 589
 590 static bool
 591 panfrost_fence_finish(struct pipe_screen *pscreen,
 592                       struct pipe_context *ctx,
 593                       struct pipe_fence_handle *fence,
 594                       uint64_t timeout)
 595 {
 596         struct panfrost_screen *screen = pan_screen(pscreen);
 597         struct panfrost_fence *f = (struct panfrost_fence *)fence;
 598         struct util_dynarray syncobjs;
 599         int ret;
 600
 601         /* All fences were already signaled */
 602         if (!util_dynarray_num_elements(&f->syncfds, int))
 603                 return true;
 604
 605         util_dynarray_init(&syncobjs, NULL);
 606         util_dynarray_foreach(&f->syncfds, int, fd) {
 607                 uint32_t syncobj;
 608
 609                 ret = drmSyncobjCreate(screen->fd, 0, &syncobj);
 610                 assert(!ret);
 611
 612                 ret = drmSyncobjImportSyncFile(screen->fd, syncobj, *fd);
 613                 assert(!ret);
 614                 util_dynarray_append(&syncobjs, uint32_t, syncobj);
 615         }
 616
 617         uint64_t abs_timeout = os_time_get_absolute_timeout(timeout);
 618         if (abs_timeout == OS_TIMEOUT_INFINITE)
 619                 abs_timeout = INT64_MAX;
 620
 621         ret = drmSyncobjWait(screen->fd, util_dynarray_begin(&syncobjs),
 622                              util_dynarray_num_elements(&syncobjs, uint32_t),
 623                              abs_timeout, DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL,
 624                              NULL);
 625
 626         util_dynarray_foreach(&syncobjs, uint32_t, syncobj)
 627                 drmSyncobjDestroy(screen->fd, *syncobj);
 628
 629         return ret >= 0;
 630 }
 631
 632 struct panfrost_fence *
 633 panfrost_fence_create(struct panfrost_context *ctx,
 634                       struct util_dynarray *fences)
 635 {
 636         struct panfrost_screen *screen = pan_screen(ctx->base.screen);
 637         struct panfrost_fence *f = calloc(1, sizeof(*f));
 638         if (!f)
 639                 return NULL;
 640
 641         util_dynarray_init(&f->syncfds, NULL);
 642
 643         /* Export fences from all pending batches. */
 644         util_dynarray_foreach(fences, struct panfrost_batch_fence *, fence) {
 645                 int fd = -1;
 646
 647                 /* The fence is already signaled, no need to export it. */
 648                 if ((*fence)->signaled)
 649                         continue;
 650
 651                 drmSyncobjExportSyncFile(screen->fd, (*fence)->syncobj, &fd);
 652                 if (fd == -1)
 653                         fprintf(stderr, "export failed: %m\n");
 654
 655                 assert(fd != -1);
 656                 util_dynarray_append(&f->syncfds, int, fd);
 657         }
 658
 659         pipe_reference_init(&f->reference, 1);
 660
 661         return f;
 662 }
 663
 664 static const void *
 665 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
 666                                      enum pipe_shader_ir ir,
 667                                      enum pipe_shader_type shader)
 668 {
 669         return &midgard_nir_options;
 670 }
 671
 672 static unsigned
 673 panfrost_query_gpu_version(struct panfrost_screen *screen)
 674 {
 675         struct drm_panfrost_get_param get_param = {0,};
 676         ASSERTED int ret;
 677
 678         get_param.param = DRM_PANFROST_PARAM_GPU_PROD_ID;
 679         ret = drmIoctl(screen->fd, DRM_IOCTL_PANFROST_GET_PARAM, &get_param);
 680         assert(!ret);
 681
 682         return get_param.value;
 683 }
 684
 685 static uint32_t
 686 panfrost_active_bos_hash(const void *key)
 687 {
 688         const struct panfrost_bo *bo = key;
 689
 690         return _mesa_hash_data(&bo->gem_handle, sizeof(bo->gem_handle));
 691 }
 692
 693 static bool
 694 panfrost_active_bos_cmp(const void *keya, const void *keyb)
 695 {
 696         const struct panfrost_bo *a = keya, *b = keyb;
 697
 698         return a->gem_handle == b->gem_handle;
 699 }
 700
 701 struct pipe_screen *
 702 panfrost_create_screen(int fd, struct renderonly *ro)
 703 {
 704         pan_debug = debug_get_option_pan_debug();
 705
 706         /* Blacklist apps known to be buggy under Panfrost */
 707         const char *proc = util_get_process_name();
 708         const char *blacklist[] = {
 709                 "chromium",
 710                 "chrome",
 711         };
 712
 713         for (unsigned i = 0; i < ARRAY_SIZE(blacklist); ++i) {
 714                 if ((strcmp(blacklist[i], proc) == 0))
 715                         return NULL;
 716         }
 717
 718         /* Create the screen */
 719         struct panfrost_screen *screen = rzalloc(NULL, struct panfrost_screen);
 720
 721         if (!screen)
 722                 return NULL;
 723
 724         if (ro) {
 725                 screen->ro = renderonly_dup(ro);
 726                 if (!screen->ro) {
 727                         fprintf(stderr, "Failed to dup renderonly object\n");
 728                         free(screen);
 729                         return NULL;
 730                 }
 731         }
 732
 733         screen->fd = fd;
 734
 735         screen->gpu_id = panfrost_query_gpu_version(screen);
 736         screen->quirks = panfrost_get_quirks(screen->gpu_id);
 737         screen->kernel_version = drmGetVersion(fd);
 738
 739         /* Check if we're loading against a supported GPU model. */
 740
 741         switch (screen->gpu_id) {
 742         case 0x750: /* T760 */
 743         case 0x820: /* T820 */
 744         case 0x860: /* T860 */
 745                 break;
 746         default:
 747                 /* Fail to load against untested models */
 748                 debug_printf("panfrost: Unsupported model %X", screen->gpu_id);
 749                 return NULL;
 750         }
 751
 752         pthread_mutex_init(&screen->active_bos_lock, NULL);
 753         screen->active_bos = _mesa_set_create(screen, panfrost_active_bos_hash,
 754                                               panfrost_active_bos_cmp);
 755
 756         pthread_mutex_init(&screen->bo_cache.lock, NULL);
 757         list_inithead(&screen->bo_cache.lru);
 758         for (unsigned i = 0; i < ARRAY_SIZE(screen->bo_cache.buckets); ++i)
 759                 list_inithead(&screen->bo_cache.buckets[i]);
 760
 761         if (pan_debug & PAN_DBG_TRACE)
 762                 pandecode_initialize();
 763
 764         screen->base.destroy = panfrost_destroy_screen;
 765
 766         screen->base.get_name = panfrost_get_name;
 767         screen->base.get_vendor = panfrost_get_vendor;
 768         screen->base.get_device_vendor = panfrost_get_device_vendor;
 769         screen->base.get_param = panfrost_get_param;
 770         screen->base.get_shader_param = panfrost_get_shader_param;
 771         screen->base.get_compute_param = panfrost_get_compute_param;
 772         screen->base.get_paramf = panfrost_get_paramf;
 773         screen->base.get_timestamp = panfrost_get_timestamp;
 774         screen->base.is_format_supported = panfrost_is_format_supported;
 775         screen->base.context_create = panfrost_create_context;
 776         screen->base.flush_frontbuffer = panfrost_flush_frontbuffer;
 777         screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
 778         screen->base.fence_reference = panfrost_fence_reference;
 779         screen->base.fence_finish = panfrost_fence_finish;
 780         screen->base.set_damage_region = panfrost_resource_set_damage_region;
 781
 782         panfrost_resource_screen_init(screen);
 783
 784         return &screen->base;
 785 }