src/gallium/drivers/panfrost/pan_screen.c

   1 /*
   2  * Copyright (C) 2008 VMware, Inc.
   3  * Copyright (C) 2014 Broadcom
   4  * Copyright (C) 2018 Alyssa Rosenzweig
   5  * Copyright (C) 2019 Collabora, Ltd.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the "Software"),
   9  * to deal in the Software without restriction, including without limitation
  10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11  * and/or sell copies of the Software, and to permit persons to whom the
  12  * Software is furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the next
  15  * paragraph) shall be included in all copies or substantial portions of the
  16  * Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  24  * SOFTWARE.
  25  *
  26  */
  27
  28 #include "util/u_debug.h"
  29 #include "util/u_memory.h"
  30 #include "util/u_format.h"
  31 #include "util/u_format_s3tc.h"
  32 #include "util/u_video.h"
  33 #include "util/u_screen.h"
  34 #include "util/os_time.h"
  35 #include "pipe/p_defines.h"
  36 #include "pipe/p_screen.h"
  37 #include "draw/draw_context.h"
  38 #include <xf86drm.h>
  39
  40 #include <fcntl.h>
  41
  42 #include "drm-uapi/drm_fourcc.h"
  43
  44 #include "pan_screen.h"
  45 #include "pan_resource.h"
  46 #include "pan_public.h"
  47 #include "pan_util.h"
  48 #include "pandecode/decode.h"
  49
  50 #include "pan_context.h"
  51 #include "midgard/midgard_compile.h"
  52
  53 static const struct debug_named_value debug_options[] = {
  54         {"msgs",      PAN_DBG_MSGS,     "Print debug messages"},
  55         {"trace",     PAN_DBG_TRACE,    "Trace the command stream"},
  56         {"deqp",      PAN_DBG_DEQP,     "Hacks for dEQP"},
  57         {"afbc",      PAN_DBG_AFBC,     "Enable non-conformant AFBC impl"},
  58         DEBUG_NAMED_VALUE_END
  59 };
  60
  61 DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
  62
  63 int pan_debug = 0;
  64
  65 static const char *
  66 panfrost_get_name(struct pipe_screen *screen)
  67 {
  68         return "panfrost";
  69 }
  70
  71 static const char *
  72 panfrost_get_vendor(struct pipe_screen *screen)
  73 {
  74         return "panfrost";
  75 }
  76
  77 static const char *
  78 panfrost_get_device_vendor(struct pipe_screen *screen)
  79 {
  80         return "Arm";
  81 }
  82
  83 static int
  84 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
  85 {
  86         /* We expose in-dev stuff for dEQP that we don't want apps to use yet */
  87         bool is_deqp = pan_debug & PAN_DBG_DEQP;
  88
  89         switch (param) {
  90         case PIPE_CAP_NPOT_TEXTURES:
  91         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  92         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  93         case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
  94         case PIPE_CAP_VERTEX_SHADER_SATURATE:
  95         case PIPE_CAP_POINT_SPRITE:
  96                 return 1;
  97
  98         case PIPE_CAP_MAX_RENDER_TARGETS:
  99                 return is_deqp ? 4 : 1;
 100
 101
 102         case PIPE_CAP_OCCLUSION_QUERY:
 103                 return 1;
 104         case PIPE_CAP_QUERY_TIME_ELAPSED:
 105         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 106         case PIPE_CAP_QUERY_TIMESTAMP:
 107         case PIPE_CAP_QUERY_SO_OVERFLOW:
 108                 return 0;
 109
 110         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 111         case PIPE_CAP_TEXTURE_SWIZZLE:
 112                 return 1;
 113
 114         case PIPE_CAP_TGSI_INSTANCEID:
 115         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 116                 return is_deqp ? 1 : 0;
 117
 118         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 119                 return is_deqp ? 4 : 0;
 120         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 121         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 122                 return is_deqp ? 64 : 0;
 123
 124         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 125                 return is_deqp ? 256 : 0; /* for GL3 */
 126
 127         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 128         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 129                 return is_deqp ? 140 : 120;
 130         case PIPE_CAP_ESSL_FEATURE_LEVEL:
 131                 return is_deqp ? 300 : 120;
 132
 133         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 134                 return is_deqp ? 16 : 0;
 135
 136         case PIPE_CAP_CUBE_MAP_ARRAY:
 137                 return is_deqp;
 138
 139         /* For faking GLES 3.1 for dEQP-GLES31 */
 140         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 141         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 142         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 143         case PIPE_CAP_IMAGE_LOAD_FORMATTED:
 144                 return is_deqp;
 145
 146         /* TODO: Where does this req come from in practice? */
 147         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 148                 return 1;
 149
 150         case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 151                 return 4096;
 152         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 153         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 154                 return 13;
 155
 156         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 157         case PIPE_CAP_INDEP_BLEND_ENABLE:
 158         case PIPE_CAP_INDEP_BLEND_FUNC:
 159                 return 1;
 160
 161         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 162                 /* Hardware is natively upper left */
 163                 return 0;
 164
 165         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 166         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 167         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 168         case PIPE_CAP_GENERATE_MIPMAP:
 169                 return 1;
 170
 171         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 172         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 173                 return 1;
 174
 175         case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
 176                 return 0xffff;
 177
 178         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 179                 return 1;
 180
 181         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 182                 return 65536;
 183
 184         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 185                 return 0;
 186
 187         case PIPE_CAP_ENDIANNESS:
 188                 return PIPE_ENDIAN_NATIVE;
 189
 190         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 191                 return 1;
 192
 193         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 194                 return -8;
 195
 196         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 197                 return 7;
 198
 199         case PIPE_CAP_VENDOR_ID:
 200         case PIPE_CAP_DEVICE_ID:
 201                 return 0xFFFFFFFF;
 202
 203         case PIPE_CAP_ACCELERATED:
 204         case PIPE_CAP_UMA:
 205         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 206         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 207         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 208         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 209                 return 1;
 210
 211         case PIPE_CAP_VIDEO_MEMORY: {
 212                 uint64_t system_memory;
 213
 214                 if (!os_get_total_physical_memory(&system_memory))
 215                         return 0;
 216
 217                 return (int)(system_memory >> 20);
 218         }
 219
 220         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 221                 return 4;
 222
 223         case PIPE_CAP_MAX_VARYINGS:
 224                 return 16;
 225
 226         default:
 227                 return u_pipe_screen_get_param_defaults(screen, param);
 228         }
 229 }
 230
 231 static int
 232 panfrost_get_shader_param(struct pipe_screen *screen,
 233                           enum pipe_shader_type shader,
 234                           enum pipe_shader_cap param)
 235 {
 236         if (shader != PIPE_SHADER_VERTEX &&
 237             shader != PIPE_SHADER_FRAGMENT) {
 238                 return 0;
 239         }
 240
 241         bool is_deqp = pan_debug & PAN_DBG_DEQP;
 242
 243         /* this is probably not totally correct.. but it's a start: */
 244         switch (param) {
 245         case PIPE_SHADER_CAP_SCALAR_ISA:
 246                 return 0;
 247
 248         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 249                 return 0;
 250         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 251         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 252         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 253                 return 16384;
 254
 255         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 256                 return 1024;
 257
 258         case PIPE_SHADER_CAP_MAX_INPUTS:
 259                 return 16;
 260
 261         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 262                 return shader == PIPE_SHADER_FRAGMENT ? 4 : 8;
 263
 264         case PIPE_SHADER_CAP_MAX_TEMPS:
 265                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 266
 267         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 268                 return 16 * 1024 * sizeof(float);
 269
 270         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 271                 return PAN_MAX_CONST_BUFFERS;
 272
 273         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 274                 return 0;
 275
 276         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 277                 return 1;
 278         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 279                 return 0;
 280
 281         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 282                 return 0;
 283
 284         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 285                 return 1;
 286
 287         case PIPE_SHADER_CAP_SUBROUTINES:
 288                 return 0;
 289
 290         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 291                 return 0;
 292
 293         case PIPE_SHADER_CAP_INTEGERS:
 294                 return 1;
 295
 296         case PIPE_SHADER_CAP_INT64_ATOMICS:
 297         case PIPE_SHADER_CAP_FP16:
 298         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 299         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 300         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 301         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 302         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 303                 return 0;
 304
 305         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 306         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 307                 return 16; /* XXX: How many? */
 308
 309         case PIPE_SHADER_CAP_PREFERRED_IR:
 310                 return PIPE_SHADER_IR_NIR;
 311
 312         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 313                 return 0;
 314
 315         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 316                 return 32;
 317
 318         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 319         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 320         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 321         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 322                 return is_deqp;
 323
 324         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 325         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 326                 return 0;
 327
 328         default:
 329                 fprintf(stderr, "unknown shader param %d\n", param);
 330                 return 0;
 331         }
 332
 333         return 0;
 334 }
 335
 336 static float
 337 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 338 {
 339         switch (param) {
 340         case PIPE_CAPF_MAX_LINE_WIDTH:
 341
 342         /* fall-through */
 343         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 344                 return 255.0; /* arbitrary */
 345
 346         case PIPE_CAPF_MAX_POINT_WIDTH:
 347
 348         /* fall-through */
 349         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 350                 return 1024.0;
 351
 352         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 353                 return 16.0;
 354
 355         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 356                 return 16.0; /* arbitrary */
 357
 358         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 359         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 360         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 361                 return 0.0f;
 362
 363         default:
 364                 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 365                 return 0.0;
 366         }
 367 }
 368
 369 /**
 370  * Query format support for creating a texture, drawing surface, etc.
 371  * \param format  the format to test
 372  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 373  */
 374 static bool
 375 panfrost_is_format_supported( struct pipe_screen *screen,
 376                               enum pipe_format format,
 377                               enum pipe_texture_target target,
 378                               unsigned sample_count,
 379                               unsigned storage_sample_count,
 380                               unsigned bind)
 381 {
 382         const struct util_format_description *format_desc;
 383
 384         assert(target == PIPE_BUFFER ||
 385                target == PIPE_TEXTURE_1D ||
 386                target == PIPE_TEXTURE_1D_ARRAY ||
 387                target == PIPE_TEXTURE_2D ||
 388                target == PIPE_TEXTURE_2D_ARRAY ||
 389                target == PIPE_TEXTURE_RECT ||
 390                target == PIPE_TEXTURE_3D ||
 391                target == PIPE_TEXTURE_CUBE ||
 392                target == PIPE_TEXTURE_CUBE_ARRAY);
 393
 394         format_desc = util_format_description(format);
 395
 396         if (!format_desc)
 397                 return false;
 398
 399         if (sample_count > 1)
 400                 return false;
 401
 402         /* Format wishlist */
 403         if (format == PIPE_FORMAT_X8Z24_UNORM)
 404                 return false;
 405
 406         if (format == PIPE_FORMAT_A1B5G5R5_UNORM || format == PIPE_FORMAT_X1B5G5R5_UNORM)
 407                 return false;
 408
 409         /* TODO */
 410         if (format == PIPE_FORMAT_B5G5R5A1_UNORM)
 411                 return FALSE;
 412
 413         /* Don't confuse poorly written apps (workaround dEQP bug) that expect
 414          * more alpha than they ask for */
 415
 416         bool scanout = bind & (PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | PIPE_BIND_DISPLAY_TARGET);
 417         bool renderable = bind & PIPE_BIND_RENDER_TARGET;
 418
 419         if (scanout && renderable && !util_format_is_rgba8_variant(format_desc))
 420                 return false;
 421
 422         if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN &&
 423             format_desc->layout != UTIL_FORMAT_LAYOUT_OTHER) {
 424                 /* Compressed formats not yet hooked up. */
 425                 return false;
 426         }
 427
 428         /* Internally, formats that are depth/stencil renderable are limited.
 429          *
 430          * In particular: Z16, Z24, Z24S8, S8 are all identical from the GPU
 431          * rendering perspective. That is, we render to Z24S8 (which we can
 432          * AFBC compress), ignore the different when texturing (who cares?),
 433          * and then in the off-chance there's a CPU read we blit back to
 434          * staging.
 435          *
 436          * ...alternatively, we can make the state tracker deal with that. */
 437
 438         if (bind & PIPE_BIND_DEPTH_STENCIL) {
 439                 switch (format) {
 440                         case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 441                         case PIPE_FORMAT_Z24X8_UNORM:
 442                         case PIPE_FORMAT_Z32_UNORM:
 443                         case PIPE_FORMAT_Z32_FLOAT:
 444                         case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 445                                 return true;
 446
 447                         default:
 448                                 return false;
 449                 }
 450         }
 451
 452         return true;
 453 }
 454
 455
 456 static void
 457 panfrost_destroy_screen(struct pipe_screen *pscreen)
 458 {
 459         struct panfrost_screen *screen = pan_screen(pscreen);
 460         panfrost_bo_cache_evict_all(screen);
 461         ralloc_free(screen);
 462 }
 463
 464 static void
 465 panfrost_flush_frontbuffer(struct pipe_screen *_screen,
 466                            struct pipe_resource *resource,
 467                            unsigned level, unsigned layer,
 468                            void *context_private,
 469                            struct pipe_box *sub_box)
 470 {
 471         /* TODO: Display target integration */
 472 }
 473
 474 static uint64_t
 475 panfrost_get_timestamp(struct pipe_screen *_screen)
 476 {
 477         return os_time_get_nano();
 478 }
 479
 480 static void
 481 panfrost_fence_reference(struct pipe_screen *pscreen,
 482                          struct pipe_fence_handle **ptr,
 483                          struct pipe_fence_handle *fence)
 484 {
 485         panfrost_drm_fence_reference(pscreen, ptr, fence);
 486 }
 487
 488 static bool
 489 panfrost_fence_finish(struct pipe_screen *pscreen,
 490                       struct pipe_context *ctx,
 491                       struct pipe_fence_handle *fence,
 492                       uint64_t timeout)
 493 {
 494         return panfrost_drm_fence_finish(pscreen, ctx, fence, timeout);
 495 }
 496
 497 static const void *
 498 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
 499                                      enum pipe_shader_ir ir,
 500                                      enum pipe_shader_type shader)
 501 {
 502         return &midgard_nir_options;
 503 }
 504
 505 struct pipe_screen *
 506 panfrost_create_screen(int fd, struct renderonly *ro)
 507 {
 508         struct panfrost_screen *screen = rzalloc(NULL, struct panfrost_screen);
 509
 510         pan_debug = debug_get_option_pan_debug();
 511
 512         if (!screen)
 513                 return NULL;
 514
 515         if (ro) {
 516                 screen->ro = renderonly_dup(ro);
 517                 if (!screen->ro) {
 518                         fprintf(stderr, "Failed to dup renderonly object\n");
 519                         free(screen);
 520                         return NULL;
 521                 }
 522         }
 523
 524         screen->fd = fd;
 525
 526         screen->gpu_id = panfrost_drm_query_gpu_version(screen);
 527
 528         /* Check if we're loading against a supported GPU model. */
 529
 530         switch (screen->gpu_id) {
 531         case 0x750: /* T760 */
 532         case 0x820: /* T820 */
 533         case 0x860: /* T860 */
 534                 break;
 535         default:
 536                 /* Fail to load against untested models */
 537                 debug_printf("panfrost: Unsupported model %X",
 538                              screen->gpu_id);
 539                 return NULL;
 540         }
 541
 542         util_dynarray_init(&screen->transient_bo, screen);
 543
 544         for (unsigned i = 0; i < ARRAY_SIZE(screen->bo_cache); ++i)
 545                 list_inithead(&screen->bo_cache[i]);
 546
 547         if (pan_debug & PAN_DBG_TRACE)
 548                 pandecode_initialize();
 549
 550         screen->base.destroy = panfrost_destroy_screen;
 551
 552         screen->base.get_name = panfrost_get_name;
 553         screen->base.get_vendor = panfrost_get_vendor;
 554         screen->base.get_device_vendor = panfrost_get_device_vendor;
 555         screen->base.get_param = panfrost_get_param;
 556         screen->base.get_shader_param = panfrost_get_shader_param;
 557         screen->base.get_paramf = panfrost_get_paramf;
 558         screen->base.get_timestamp = panfrost_get_timestamp;
 559         screen->base.is_format_supported = panfrost_is_format_supported;
 560         screen->base.context_create = panfrost_create_context;
 561         screen->base.flush_frontbuffer = panfrost_flush_frontbuffer;
 562         screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
 563         screen->base.fence_reference = panfrost_fence_reference;
 564         screen->base.fence_finish = panfrost_fence_finish;
 565
 566         screen->last_fragment_flushed = true;
 567         screen->last_job = NULL;
 568
 569         panfrost_resource_screen_init(screen);
 570
 571         return &screen->base;
 572 }