1 /**************************************************************************
3 * Copyright 2008 VMware, Inc.
4 * Copyright 2014 Broadcom
5 * Copyright 2018 Alyssa Rosenzweig
6 * Copyright 2019 Collabora
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the
11 * "Software"), to deal in the Software without restriction, including
12 * without limitation the rights to use, copy, modify, merge, publish,
13 * distribute, sub license, and/or sell copies of the Software, and to
14 * permit persons to whom the Software is furnished to do so, subject to
15 * the following conditions:
17 * The above copyright notice and this permission notice (including the
18 * next paragraph) shall be included in all copies or substantial portions
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
22 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
24 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
25 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
26 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
27 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 **************************************************************************/
32 #include "util/u_debug.h"
33 #include "util/u_memory.h"
34 #include "util/u_format.h"
35 #include "util/u_format_s3tc.h"
36 #include "util/u_video.h"
37 #include "util/u_screen.h"
38 #include "util/os_time.h"
39 #include "pipe/p_defines.h"
40 #include "pipe/p_screen.h"
41 #include "draw/draw_context.h"
46 #include "drm-uapi/drm_fourcc.h"
48 #include "pan_screen.h"
49 #include "pan_resource.h"
50 #include "pan_public.h"
52 #include "pandecode/decode.h"
54 #include "pan_context.h"
55 #include "midgard/midgard_compile.h"
57 static const struct debug_named_value debug_options
[] = {
58 {"msgs", PAN_DBG_MSGS
, "Print debug messages"},
59 {"trace", PAN_DBG_TRACE
, "Trace the command stream"},
63 DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug
, "PAN_MESA_DEBUG", debug_options
, 0)
67 struct panfrost_driver
*panfrost_create_drm_driver(int fd
);
70 panfrost_get_name(struct pipe_screen
*screen
)
76 panfrost_get_vendor(struct pipe_screen
*screen
)
82 panfrost_get_device_vendor(struct pipe_screen
*screen
)
88 panfrost_get_param(struct pipe_screen
*screen
, enum pipe_cap param
)
91 case PIPE_CAP_NPOT_TEXTURES
:
92 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES
:
93 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS
:
97 case PIPE_CAP_POINT_SPRITE
:
100 case PIPE_CAP_MAX_RENDER_TARGETS
:
101 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS
:
104 case PIPE_CAP_OCCLUSION_QUERY
:
105 case PIPE_CAP_QUERY_TIME_ELAPSED
:
106 case PIPE_CAP_QUERY_PIPELINE_STATISTICS
:
107 return 1; /* TODO: Queries */
109 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
110 case PIPE_CAP_TEXTURE_SWIZZLE
:
113 /* TODO: ES3. We expose these caps so we can access higher dEQP
114 * tests; in actuality they are nonfunctional */
115 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS
:
117 case PIPE_CAP_TGSI_INSTANCEID
:
118 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
121 case PIPE_CAP_MAX_TEXTURE_2D_SIZE
:
123 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
124 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
127 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
130 case PIPE_CAP_INDEP_BLEND_ENABLE
:
133 case PIPE_CAP_INDEP_BLEND_FUNC
:
136 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
137 /* Hardware is natively upper left */
140 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
142 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
143 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
146 case PIPE_CAP_DEPTH_CLIP_DISABLE
:
149 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS
:
150 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS
:
153 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES
:
154 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS
:
157 case PIPE_CAP_MAX_VERTEX_STREAMS
:
160 case PIPE_CAP_SHADER_STENCIL_EXPORT
:
163 case PIPE_CAP_SEAMLESS_CUBE_MAP
:
164 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE
:
167 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
:
168 return 256; /* for GL3 */
170 case PIPE_CAP_CONDITIONAL_RENDER
:
173 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED
:
174 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED
:
175 case PIPE_CAP_VERTEX_COLOR_CLAMPED
:
178 case PIPE_CAP_GLSL_FEATURE_LEVEL
:
181 case PIPE_CAP_USER_VERTEX_BUFFERS
: /* TODO */
182 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY
:
185 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT
:
186 case PIPE_CAP_DOUBLES
:
188 case PIPE_CAP_INT64_DIVMOD
:
191 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
:
194 case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET
:
197 case PIPE_CAP_QUERY_TIMESTAMP
:
198 case PIPE_CAP_CUBE_MAP_ARRAY
:
201 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS
:
204 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE
:
207 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT
:
210 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER
:
213 case PIPE_CAP_MAX_VIEWPORTS
:
214 return PIPE_MAX_VIEWPORTS
;
216 case PIPE_CAP_ENDIANNESS
:
217 return PIPE_ENDIAN_NATIVE
;
219 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS
:
222 case PIPE_CAP_TEXTURE_GATHER_SM5
:
223 case PIPE_CAP_TEXTURE_QUERY_LOD
:
224 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION
:
225 case PIPE_CAP_SAMPLER_VIEW_TARGET
:
226 case PIPE_CAP_FAKE_SW_MSAA
:
229 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET
:
232 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET
:
235 case PIPE_CAP_DRAW_INDIRECT
:
238 case PIPE_CAP_QUERY_SO_OVERFLOW
:
241 case PIPE_CAP_VENDOR_ID
:
244 case PIPE_CAP_DEVICE_ID
:
247 case PIPE_CAP_ACCELERATED
:
250 case PIPE_CAP_VIDEO_MEMORY
: {
251 uint64_t system_memory
;
253 if (!os_get_total_physical_memory(&system_memory
))
256 return (int)(system_memory
>> 20);
262 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED
:
263 case PIPE_CAP_CLIP_HALFZ
:
264 case PIPE_CAP_TEXTURE_FLOAT_LINEAR
:
265 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR
:
266 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT
:
267 case PIPE_CAP_CULL_DISTANCE
:
268 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS
:
269 case PIPE_CAP_TGSI_ARRAY_COMPONENTS
:
270 case PIPE_CAP_CLEAR_TEXTURE
:
273 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT
:
276 case PIPE_CAP_MAX_VARYINGS
:
280 return u_pipe_screen_get_param_defaults(screen
, param
);
285 panfrost_get_shader_param(struct pipe_screen
*screen
,
286 enum pipe_shader_type shader
,
287 enum pipe_shader_cap param
)
289 if (shader
!= PIPE_SHADER_VERTEX
&&
290 shader
!= PIPE_SHADER_FRAGMENT
) {
294 /* this is probably not totally correct.. but it's a start: */
296 case PIPE_SHADER_CAP_SCALAR_ISA
:
299 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
301 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
302 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
303 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
306 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
309 case PIPE_SHADER_CAP_MAX_INPUTS
:
312 case PIPE_SHADER_CAP_MAX_OUTPUTS
:
313 return shader
== PIPE_SHADER_FRAGMENT
? 1 : 8;
315 case PIPE_SHADER_CAP_MAX_TEMPS
:
316 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
318 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
:
319 return 16 * 1024 * sizeof(float);
321 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
324 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
327 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
329 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
332 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
335 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
338 case PIPE_SHADER_CAP_SUBROUTINES
:
341 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
:
344 case PIPE_SHADER_CAP_INTEGERS
:
347 case PIPE_SHADER_CAP_INT64_ATOMICS
:
348 case PIPE_SHADER_CAP_FP16
:
349 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED
:
350 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED
:
351 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED
:
352 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED
:
353 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE
:
356 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
357 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS
:
358 return 16; /* XXX: How many? */
360 case PIPE_SHADER_CAP_PREFERRED_IR
:
361 return PIPE_SHADER_IR_NIR
;
363 case PIPE_SHADER_CAP_SUPPORTED_IRS
:
366 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT
:
369 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS
:
370 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES
:
371 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD
:
372 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS
:
373 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS
:
374 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS
:
378 fprintf(stderr
, "unknown shader param %d\n", param
);
386 panfrost_get_paramf(struct pipe_screen
*screen
, enum pipe_capf param
)
389 case PIPE_CAPF_MAX_LINE_WIDTH
:
392 case PIPE_CAPF_MAX_LINE_WIDTH_AA
:
393 return 255.0; /* arbitrary */
395 case PIPE_CAPF_MAX_POINT_WIDTH
:
398 case PIPE_CAPF_MAX_POINT_WIDTH_AA
:
399 return 255.0; /* arbitrary */
401 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
:
404 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
:
405 return 16.0; /* arbitrary */
407 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE
:
408 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE
:
409 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY
:
413 debug_printf("Unexpected PIPE_CAPF %d query\n", param
);
419 * Query format support for creating a texture, drawing surface, etc.
420 * \param format the format to test
421 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
424 panfrost_is_format_supported( struct pipe_screen
*screen
,
425 enum pipe_format format
,
426 enum pipe_texture_target target
,
427 unsigned sample_count
,
428 unsigned storage_sample_count
,
431 const struct util_format_description
*format_desc
;
433 assert(target
== PIPE_BUFFER
||
434 target
== PIPE_TEXTURE_1D
||
435 target
== PIPE_TEXTURE_1D_ARRAY
||
436 target
== PIPE_TEXTURE_2D
||
437 target
== PIPE_TEXTURE_2D_ARRAY
||
438 target
== PIPE_TEXTURE_RECT
||
439 target
== PIPE_TEXTURE_3D
||
440 target
== PIPE_TEXTURE_CUBE
||
441 target
== PIPE_TEXTURE_CUBE_ARRAY
);
443 format_desc
= util_format_description(format
);
448 if (sample_count
> 1)
451 /* Format wishlist */
452 if (format
== PIPE_FORMAT_Z24X8_UNORM
|| format
== PIPE_FORMAT_X8Z24_UNORM
)
455 if (format
== PIPE_FORMAT_A1B5G5R5_UNORM
|| format
== PIPE_FORMAT_X1B5G5R5_UNORM
)
458 if (bind
& PIPE_BIND_RENDER_TARGET
) {
459 /* TODO: Support all the formats! :) */
460 bool supported
= util_format_is_rgba8_variant(format_desc
);
461 supported
|= format
== PIPE_FORMAT_B5G6R5_UNORM
;
466 if (format_desc
->colorspace
== UTIL_FORMAT_COLORSPACE_ZS
)
470 * Although possible, it is unnatural to render into compressed or YUV
471 * surfaces. So disable these here to avoid going into weird paths
472 * inside the state trackers.
474 if (format_desc
->block
.width
!= 1 ||
475 format_desc
->block
.height
!= 1)
479 if (bind
& PIPE_BIND_DEPTH_STENCIL
) {
480 if (format_desc
->colorspace
!= UTIL_FORMAT_COLORSPACE_ZS
)
484 if (format_desc
->layout
== UTIL_FORMAT_LAYOUT_BPTC
||
485 format_desc
->layout
== UTIL_FORMAT_LAYOUT_ASTC
||
486 format_desc
->layout
== UTIL_FORMAT_LAYOUT_ETC
) {
487 /* Compressed formats not yet hooked up. */
491 if ((bind
& (PIPE_BIND_RENDER_TARGET
| PIPE_BIND_SAMPLER_VIEW
)) &&
492 ((bind
& PIPE_BIND_DISPLAY_TARGET
) == 0) &&
493 target
!= PIPE_BUFFER
) {
494 const struct util_format_description
*desc
=
495 util_format_description(format
);
497 if (desc
->nr_channels
== 3 && desc
->is_array
) {
498 /* Don't support any 3-component formats for rendering/texturing
499 * since we don't support the corresponding 8-bit 3 channel UNORM
500 * formats. This allows us to support GL_ARB_copy_image between
501 * GL_RGB8 and GL_RGB8UI, for example. Otherwise, we may be asked to
502 * do a resource copy between PIPE_FORMAT_R8G8B8_UINT and
503 * PIPE_FORMAT_R8G8B8X8_UNORM, for example, which will not work
515 panfrost_destroy_screen(struct pipe_screen
*pscreen
)
517 struct panfrost_screen
*screen
= pan_screen(pscreen
);
518 panfrost_resource_screen_deinit(screen
);
523 panfrost_flush_frontbuffer(struct pipe_screen
*_screen
,
524 struct pipe_resource
*resource
,
525 unsigned level
, unsigned layer
,
526 void *context_private
,
527 struct pipe_box
*sub_box
)
529 /* TODO: Display target integration */
533 panfrost_get_timestamp(struct pipe_screen
*_screen
)
535 return os_time_get_nano();
539 panfrost_fence_reference(struct pipe_screen
*pscreen
,
540 struct pipe_fence_handle
**ptr
,
541 struct pipe_fence_handle
*fence
)
543 struct panfrost_screen
*screen
= pan_screen(pscreen
);
544 screen
->driver
->fence_reference(pscreen
, ptr
, fence
);
548 panfrost_fence_finish(struct pipe_screen
*pscreen
,
549 struct pipe_context
*ctx
,
550 struct pipe_fence_handle
*fence
,
553 struct panfrost_screen
*screen
= pan_screen(pscreen
);
554 return screen
->driver
->fence_finish(pscreen
, ctx
, fence
, timeout
);
558 panfrost_screen_get_compiler_options(struct pipe_screen
*pscreen
,
559 enum pipe_shader_ir ir
,
560 enum pipe_shader_type shader
)
562 return &midgard_nir_options
;
566 panfrost_create_screen(int fd
, struct renderonly
*ro
)
568 struct panfrost_screen
*screen
= rzalloc(NULL
, struct panfrost_screen
);
570 pan_debug
= debug_get_option_pan_debug();
576 screen
->ro
= renderonly_dup(ro
);
578 fprintf(stderr
, "Failed to dup renderonly object\n");
584 screen
->driver
= panfrost_create_drm_driver(fd
);
586 if (pan_debug
& PAN_DBG_TRACE
)
587 pandecode_initialize();
589 screen
->base
.destroy
= panfrost_destroy_screen
;
591 screen
->base
.get_name
= panfrost_get_name
;
592 screen
->base
.get_vendor
= panfrost_get_vendor
;
593 screen
->base
.get_device_vendor
= panfrost_get_device_vendor
;
594 screen
->base
.get_param
= panfrost_get_param
;
595 screen
->base
.get_shader_param
= panfrost_get_shader_param
;
596 screen
->base
.get_paramf
= panfrost_get_paramf
;
597 screen
->base
.get_timestamp
= panfrost_get_timestamp
;
598 screen
->base
.is_format_supported
= panfrost_is_format_supported
;
599 screen
->base
.context_create
= panfrost_create_context
;
600 screen
->base
.flush_frontbuffer
= panfrost_flush_frontbuffer
;
601 screen
->base
.get_compiler_options
= panfrost_screen_get_compiler_options
;
602 screen
->base
.fence_reference
= panfrost_fence_reference
;
603 screen
->base
.fence_finish
= panfrost_fence_finish
;
605 screen
->last_fragment_flushed
= true;
606 screen
->last_job
= NULL
;
608 panfrost_resource_screen_init(screen
);
610 return &screen
->base
;