panfrost: Stop passing has_draws to panfrost_drm_submit_vs_fs_batch()
[mesa.git] / src / gallium / drivers / panfrost / pan_screen.h
1 /**************************************************************************
2 *
3 * Copyright 2018-2019 Alyssa Rosenzweig
4 * Copyright 2018-2019 Collabora, Ltd.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
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12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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28
29 #ifndef PAN_SCREEN_H
30 #define PAN_SCREEN_H
31
32 #include <xf86drm.h>
33 #include "pipe/p_screen.h"
34 #include "pipe/p_defines.h"
35 #include "renderonly/renderonly.h"
36 #include "util/u_dynarray.h"
37 #include "util/bitset.h"
38
39 #include <panfrost-misc.h>
40 #include "pan_allocate.h"
41
42 struct panfrost_batch;
43 struct panfrost_context;
44 struct panfrost_resource;
45 struct panfrost_screen;
46
47 /* Driver limits */
48 #define PAN_MAX_CONST_BUFFERS 16
49
50 /* Flags for allocated memory */
51
52 /* This memory region is executable */
53 #define PAN_ALLOCATE_EXECUTE (1 << 0)
54
55 /* This memory region should be lazily allocated and grow-on-page-fault. Must
56 * be used in conjunction with INVISIBLE */
57 #define PAN_ALLOCATE_GROWABLE (1 << 1)
58
59 /* This memory region should not be mapped to the CPU */
60 #define PAN_ALLOCATE_INVISIBLE (1 << 2)
61
62 /* This memory region will be used for varyings and needs to have the cache
63 * bits twiddled accordingly */
64 #define PAN_ALLOCATE_COHERENT_LOCAL (1 << 3)
65
66 /* This region may not be used immediately and will not mmap on allocate
67 * (semantically distinct from INVISIBLE, which cannot never be mmaped) */
68 #define PAN_ALLOCATE_DELAY_MMAP (1 << 4)
69
70 /* Transient slab size. This is a balance between fragmentation against cache
71 * locality and ease of bookkeeping */
72
73 #define TRANSIENT_SLAB_PAGES (32) /* 128kb */
74 #define TRANSIENT_SLAB_SIZE (4096 * TRANSIENT_SLAB_PAGES)
75
76 /* Maximum number of transient slabs so we don't need dynamic arrays. Most
77 * interesting Mali boards are 4GB RAM max, so if the entire RAM was filled
78 * with transient slabs, you could never exceed (4GB / TRANSIENT_SLAB_SIZE)
79 * allocations anyway. By capping, we can use a fixed-size bitset for tracking
80 * free slabs, eliminating quite a bit of complexity. We can pack the free
81 * state of 8 slabs into a single byte, so for 128kb transient slabs the bitset
82 * occupies a cheap 4kb of memory */
83
84 #define MAX_TRANSIENT_SLABS (1024*1024 / TRANSIENT_SLAB_PAGES)
85
86 /* How many power-of-two levels in the BO cache do we want? 2^12
87 * minimum chosen as it is the page size that all allocations are
88 * rounded to */
89
90 #define MIN_BO_CACHE_BUCKET (12) /* 2^12 = 4KB */
91 #define MAX_BO_CACHE_BUCKET (22) /* 2^22 = 4MB */
92
93 /* Fencepost problem, hence the off-by-one */
94 #define NR_BO_CACHE_BUCKETS (MAX_BO_CACHE_BUCKET - MIN_BO_CACHE_BUCKET + 1)
95
96 struct panfrost_screen {
97 struct pipe_screen base;
98 int fd;
99
100 /* Properties of the GPU in use */
101 unsigned gpu_id;
102 bool require_sfbd;
103
104 drmVersionPtr kernel_version;
105
106 struct renderonly *ro;
107
108 pthread_mutex_t bo_cache_lock;
109
110 /* The BO cache is a set of buckets with power-of-two sizes ranging
111 * from 2^12 (4096, the page size) to 2^(12 + MAX_BO_CACHE_BUCKETS).
112 * Each bucket is a linked list of free panfrost_bo objects. */
113
114 struct list_head bo_cache[NR_BO_CACHE_BUCKETS];
115 };
116
117 static inline struct panfrost_screen *
118 pan_screen(struct pipe_screen *p)
119 {
120 return (struct panfrost_screen *)p;
121 }
122
123 struct panfrost_bo *
124 panfrost_drm_create_bo(struct panfrost_screen *screen, size_t size,
125 uint32_t flags);
126 void
127 panfrost_drm_mmap_bo(struct panfrost_screen *screen, struct panfrost_bo *bo);
128 void
129 panfrost_drm_release_bo(struct panfrost_screen *screen, struct panfrost_bo *bo, bool cacheable);
130 struct panfrost_bo *
131 panfrost_drm_import_bo(struct panfrost_screen *screen, int fd);
132 int
133 panfrost_drm_export_bo(struct panfrost_screen *screen, const struct panfrost_bo *bo);
134 int
135 panfrost_drm_submit_vs_fs_batch(struct panfrost_batch *batch);
136 unsigned
137 panfrost_drm_query_gpu_version(struct panfrost_screen *screen);
138 int
139 panfrost_drm_init_context(struct panfrost_context *ctx);
140 void
141 panfrost_drm_fence_reference(struct pipe_screen *screen,
142 struct pipe_fence_handle **ptr,
143 struct pipe_fence_handle *fence);
144 boolean
145 panfrost_drm_fence_finish(struct pipe_screen *pscreen,
146 struct pipe_context *ctx,
147 struct pipe_fence_handle *fence,
148 uint64_t timeout);
149 struct panfrost_bo *
150 panfrost_bo_cache_fetch(
151 struct panfrost_screen *screen,
152 size_t size, uint32_t flags);
153
154 bool
155 panfrost_bo_cache_put(
156 struct panfrost_screen *screen,
157 struct panfrost_bo *bo);
158
159 void
160 panfrost_bo_cache_evict_all(
161 struct panfrost_screen *screen);
162
163 #endif /* PAN_SCREEN_H */