2 * Copyright (C) 2005 Ben Skeggs.
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 #include "r300_fragprog.h"
34 static void presub_string(char out
[10], unsigned int inst
)
36 switch(inst
& 0x600000){
37 case R300_ALU_SRCP_1_MINUS_2_SRC0
:
40 case R300_ALU_SRCP_SRC1_MINUS_SRC0
:
43 case R300_ALU_SRCP_SRC1_PLUS_SRC0
:
46 case R300_ALU_SRCP_1_MINUS_SRC0
:
52 static int get_msb(unsigned int bit
, unsigned int r400_ext_addr
)
54 return (r400_ext_addr
& bit
) ? 1 << 5 : 0;
57 /* just some random things... */
58 void r300FragmentProgramDump(struct radeon_compiler
*c
, void *user
)
60 struct r300_fragment_program_compiler
*compiler
= (struct r300_fragment_program_compiler
*)c
;
61 struct r300_fragment_program_code
*code
= &compiler
->code
->code
.r300
;
65 fprintf(stderr
, "pc=%d*************************************\n", pc
++);
67 fprintf(stderr
, "Hardware program\n");
68 fprintf(stderr
, "----------------\n");
70 fprintf(stderr
, "code_offset_ext: %08x\n", code
->r400_code_offset_ext
);
73 for (n
= 0; n
<= (code
->config
& 3); n
++) {
74 uint32_t code_addr
= code
->code_addr
[3 - (code
->config
& 3) + n
];
75 unsigned int alu_offset
= ((code_addr
& R300_ALU_START_MASK
) >> R300_ALU_START_SHIFT
) +
76 (((code
->r400_code_offset_ext
>> (24 - (n
* 6))) & 0x7) << 6);
77 unsigned int alu_end
= ((code_addr
& R300_ALU_SIZE_MASK
) >> R300_ALU_SIZE_SHIFT
) +
78 (((code
->r400_code_offset_ext
>> (27 - (n
* 6))) & 0x7) << 6);
79 int tex_offset
= (code_addr
& R300_TEX_START_MASK
) >> R300_TEX_START_SHIFT
;
80 int tex_end
= (code_addr
& R300_TEX_SIZE_MASK
) >> R300_TEX_SIZE_SHIFT
;
82 fprintf(stderr
, "NODE %d: alu_offset: %u, tex_offset: %d, "
83 "alu_end: %u, tex_end: %d (code_addr: %08x)\n", n
,
84 alu_offset
, tex_offset
, alu_end
, tex_end
, code_addr
);
86 if (n
> 0 || (code
->config
& R300_PFS_CNTL_FIRST_NODE_HAS_TEX
)) {
87 fprintf(stderr
, " TEX:\n");
89 i
<= tex_offset
+ tex_end
;
94 inst
[i
] >> R300_TEX_INST_SHIFT
) &
102 case R300_TEX_OP_TXP
:
105 case R300_TEX_OP_TXB
:
113 " %s t%i, %c%i, texture[%i] (%08x)\n",
116 inst
[i
] >> R300_DST_ADDR_SHIFT
) & 31,
119 inst
[i
] >> R300_SRC_ADDR_SHIFT
) & 31,
121 inst
[i
] & R300_TEX_ID_MASK
) >>
128 i
<= alu_offset
+ alu_end
; ++i
) {
129 char srcc
[4][10], dstc
[20];
130 char srca
[4][10], dsta
[20];
133 char flags
[5], tmp
[10];
135 for (j
= 0; j
< 3; ++j
) {
136 int regc
= code
->alu
.inst
[i
].rgb_addr
>> (j
* 6);
137 int rega
= code
->alu
.inst
[i
].alpha_addr
>> (j
* 6);
138 int msbc
= get_msb(R400_ADDR_EXT_RGB_MSB_BIT(j
),
139 code
->alu
.inst
[i
].r400_ext_addr
);
140 int msba
= get_msb(R400_ADDR_EXT_A_MSB_BIT(j
),
141 code
->alu
.inst
[i
].r400_ext_addr
);
143 sprintf(srcc
[j
], "%c%i",
144 (regc
& 32) ? 'c' : 't', (regc
& 31) | msbc
);
145 sprintf(srca
[j
], "%c%i",
146 (rega
& 32) ? 'c' : 't', (rega
& 31) | msba
);
150 sprintf(flags
, "%s%s%s",
152 rgb_addr
& R300_ALU_DSTC_REG_X
) ? "x" : "",
154 rgb_addr
& R300_ALU_DSTC_REG_Y
) ? "y" : "",
156 rgb_addr
& R300_ALU_DSTC_REG_Z
) ? "z" : "");
158 unsigned int msb
= get_msb(
159 R400_ADDRD_EXT_RGB_MSB_BIT
,
160 code
->alu
.inst
[i
].r400_ext_addr
);
162 sprintf(dstc
, "t%i.%s ",
164 rgb_addr
>> R300_ALU_DSTC_SHIFT
)
168 sprintf(flags
, "%s%s%s",
170 rgb_addr
& R300_ALU_DSTC_OUTPUT_X
) ? "x" : "",
172 rgb_addr
& R300_ALU_DSTC_OUTPUT_Y
) ? "y" : "",
174 rgb_addr
& R300_ALU_DSTC_OUTPUT_Z
) ? "z" : "");
176 sprintf(tmp
, "o%i.%s",
183 presub_string(srcc
[3], code
->alu
.inst
[i
].rgb_inst
);
184 presub_string(srca
[3], code
->alu
.inst
[i
].alpha_inst
);
187 if (code
->alu
.inst
[i
].alpha_addr
& R300_ALU_DSTA_REG
) {
188 unsigned int msb
= get_msb(
189 R400_ADDRD_EXT_A_MSB_BIT
,
190 code
->alu
.inst
[i
].r400_ext_addr
);
191 sprintf(dsta
, "t%i.w ",
193 alpha_addr
>> R300_ALU_DSTA_SHIFT
) & 31)
196 if (code
->alu
.inst
[i
].alpha_addr
& R300_ALU_DSTA_OUTPUT
) {
197 sprintf(tmp
, "o%i.w ",
199 alpha_addr
>> 25) & 3);
202 if (code
->alu
.inst
[i
].alpha_addr
& R300_ALU_DSTA_DEPTH
) {
207 "%3i: xyz: %3s %3s %3s %5s-> %-20s (%08x)\n"
208 " w: %3s %3s %3s %5s-> %-20s (%08x)\n", i
,
209 srcc
[0], srcc
[1], srcc
[2], srcc
[3], dstc
,
210 code
->alu
.inst
[i
].rgb_addr
, srca
[0], srca
[1],
211 srca
[2], srca
[3], dsta
,
212 code
->alu
.inst
[i
].alpha_addr
);
214 for (j
= 0; j
< 3; ++j
) {
215 int regc
= code
->alu
.inst
[i
].rgb_inst
>> (j
* 7);
216 int rega
= code
->alu
.inst
[i
].alpha_inst
>> (j
* 7);
223 case R300_ALU_ARGC_SRC0C_XYZ
:
224 sprintf(buf
, "%s.xyz",
227 case R300_ALU_ARGC_SRC0C_XXX
:
228 sprintf(buf
, "%s.xxx",
231 case R300_ALU_ARGC_SRC0C_YYY
:
232 sprintf(buf
, "%s.yyy",
235 case R300_ALU_ARGC_SRC0C_ZZZ
:
236 sprintf(buf
, "%s.zzz",
241 sprintf(buf
, "%s.www", srca
[d
- 12]);
242 } else if (d
< 20 ) {
244 case R300_ALU_ARGC_SRCP_XYZ
:
245 sprintf(buf
, "srcp.xyz");
247 case R300_ALU_ARGC_SRCP_XXX
:
248 sprintf(buf
, "srcp.xxx");
250 case R300_ALU_ARGC_SRCP_YYY
:
251 sprintf(buf
, "srcp.yyy");
253 case R300_ALU_ARGC_SRCP_ZZZ
:
254 sprintf(buf
, "srcp.zzz");
256 case R300_ALU_ARGC_SRCP_WWW
:
257 sprintf(buf
, "srcp.www");
260 } else if (d
== 20) {
262 } else if (d
== 21) {
264 } else if (d
== 22) {
266 } else if (d
>= 23 && d
< 32) {
270 sprintf(buf
, "%s.yzx",
274 sprintf(buf
, "%s.zxy",
278 sprintf(buf
, "%s.Wzy",
283 sprintf(buf
, "%i", d
);
286 sprintf(argc
[j
], "%s%s%s%s",
287 (regc
& 32) ? "-" : "",
288 (regc
& 64) ? "|" : "",
289 buf
, (regc
& 64) ? "|" : "");
293 sprintf(buf
, "%s.%c", srcc
[d
/ 3],
294 'x' + (char)(d
% 3));
296 sprintf(buf
, "%s.w", srca
[d
- 9]);
299 case R300_ALU_ARGA_SRCP_X
:
300 sprintf(buf
, "srcp.x");
302 case R300_ALU_ARGA_SRCP_Y
:
303 sprintf(buf
, "srcp.y");
305 case R300_ALU_ARGA_SRCP_Z
:
306 sprintf(buf
, "srcp.z");
308 case R300_ALU_ARGA_SRCP_W
:
309 sprintf(buf
, "srcp.w");
312 } else if (d
== 16) {
314 } else if (d
== 17) {
316 } else if (d
== 18) {
319 sprintf(buf
, "%i", d
);
322 sprintf(arga
[j
], "%s%s%s%s",
323 (rega
& 32) ? "-" : "",
324 (rega
& 64) ? "|" : "",
325 buf
, (rega
& 64) ? "|" : "");
328 fprintf(stderr
, " xyz: %8s %8s %8s op: %08x %s\n"
329 " w: %8s %8s %8s op: %08x\n",
330 argc
[0], argc
[1], argc
[2],
331 code
->alu
.inst
[i
].rgb_inst
,
332 code
->alu
.inst
[i
].rgb_inst
& R300_ALU_INSERT_NOP
?
334 arga
[0], arga
[1],arga
[2],
335 code
->alu
.inst
[i
].alpha_inst
);