src/gallium/drivers/r300/compiler/r500_fragprog.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  */
  27
  28 #include "r500_fragprog.h"
  29
  30 #include <stdio.h>
  31
  32 #include "radeon_compiler_util.h"
  33 #include "radeon_list.h"
  34 #include "radeon_variable.h"
  35 #include "../r300_reg.h"
  36
  37 /**
  38  * Rewrite IF instructions to use the ALU result special register.
  39  */
  40 int r500_transform_IF(
  41         struct radeon_compiler * c,
  42         struct rc_instruction * inst_if,
  43         void *data)
  44 {
  45         struct rc_variable * writer;
  46         struct rc_list * writer_list, * list_ptr;
  47         struct rc_list * var_list = rc_get_variables(c);
  48         unsigned int generic_if = 0;
  49         unsigned int alu_chan;
  50
  51         if (inst_if->U.I.Opcode != RC_OPCODE_IF) {
  52                 return 0;
  53         }
  54
  55         writer_list = rc_variable_list_get_writers(
  56                         var_list, inst_if->Type, &inst_if->U.I.SrcReg[0]);
  57         if (!writer_list) {
  58                 generic_if = 1;
  59         } else {
  60
  61                 /* Make sure it is safe for the writers to write to
  62                  * ALU Result */
  63                 for (list_ptr = writer_list; list_ptr;
  64                                                 list_ptr = list_ptr->Next) {
  65                         struct rc_instruction * inst;
  66                         writer = list_ptr->Item;
  67                         /* We are going to modify the destination register
  68                          * of writer, so if it has a reader other than
  69                          * inst_if (aka ReaderCount > 1) we must fall back to
  70                          * our generic IF.
  71                          * If the writer has a lower IP than inst_if, this
  72                          * means that inst_if is above the writer in a loop.
  73                          * I'm not sure why this would ever happen, but
  74                          * if it does we want to make sure we fall back
  75                          * to our generic IF. */
  76                         if (writer->ReaderCount > 1 || writer->Inst->IP < inst_if->IP) {
  77                                 generic_if = 1;
  78                                 break;
  79                         }
  80
  81                         /* The ALU Result is not preserved across IF
  82                          * instructions, so if there is another IF
  83                          * instruction between writer and inst_if, then
  84                          * we need to fall back to generic IF. */
  85                         for (inst = writer->Inst; inst != inst_if; inst = inst->Next) {
  86                                 const struct rc_opcode_info * info =
  87                                         rc_get_opcode_info(inst->U.I.Opcode);
  88                                 if (info->IsFlowControl) {
  89                                         generic_if = 1;
  90                                         break;
  91                                 }
  92                         }
  93                         if (generic_if) {
  94                                 break;
  95                         }
  96                 }
  97         }
  98
  99         if (GET_SWZ(inst_if->U.I.SrcReg[0].Swizzle, 0) == RC_SWIZZLE_X) {
 100                 alu_chan = RC_ALURESULT_X;
 101         } else {
 102                 alu_chan = RC_ALURESULT_W;
 103         }
 104         if (generic_if) {
 105                 struct rc_instruction * inst_mov =
 106                                 rc_insert_new_instruction(c, inst_if->Prev);
 107
 108                 inst_mov->U.I.Opcode = RC_OPCODE_MOV;
 109                 inst_mov->U.I.DstReg.WriteMask = 0;
 110                 inst_mov->U.I.DstReg.File = RC_FILE_NONE;
 111                 inst_mov->U.I.ALUResultCompare = RC_COMPARE_FUNC_NOTEQUAL;
 112                 inst_mov->U.I.WriteALUResult = alu_chan;
 113                 inst_mov->U.I.SrcReg[0] = inst_if->U.I.SrcReg[0];
 114                 if (alu_chan == RC_ALURESULT_X) {
 115                         inst_mov->U.I.SrcReg[0].Swizzle = combine_swizzles4(
 116                                         inst_mov->U.I.SrcReg[0].Swizzle,
 117                                         RC_SWIZZLE_X, RC_SWIZZLE_UNUSED,
 118                                         RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED);
 119                 } else {
 120                         inst_mov->U.I.SrcReg[0].Swizzle = combine_swizzles4(
 121                                         inst_mov->U.I.SrcReg[0].Swizzle,
 122                                         RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED,
 123                                         RC_SWIZZLE_UNUSED, RC_SWIZZLE_Z);
 124                 }
 125         } else {
 126                 rc_compare_func compare_func = RC_COMPARE_FUNC_NEVER;
 127                 unsigned int reverse_srcs = 0;
 128                 unsigned int preserve_opcode = 0;
 129                 for (list_ptr = writer_list; list_ptr;
 130                                                 list_ptr = list_ptr->Next) {
 131                         writer = list_ptr->Item;
 132                         switch(writer->Inst->U.I.Opcode) {
 133                         case RC_OPCODE_SEQ:
 134                                 compare_func = RC_COMPARE_FUNC_EQUAL;
 135                                 break;
 136                         case RC_OPCODE_SNE:
 137                                 compare_func = RC_COMPARE_FUNC_NOTEQUAL;
 138                                 break;
 139                         case RC_OPCODE_SLE:
 140                                 reverse_srcs = 1;
 141                                 /* Fall through */
 142                         case RC_OPCODE_SGE:
 143                                 compare_func = RC_COMPARE_FUNC_GEQUAL;
 144                                 break;
 145                         case RC_OPCODE_SGT:
 146                                 reverse_srcs = 1;
 147                                 /* Fall through */
 148                         case RC_OPCODE_SLT:
 149                                 compare_func = RC_COMPARE_FUNC_LESS;
 150                                 break;
 151                         default:
 152                                 compare_func = RC_COMPARE_FUNC_NOTEQUAL;
 153                                 preserve_opcode = 1;
 154                                 break;
 155                         }
 156                         if (!preserve_opcode) {
 157                                 writer->Inst->U.I.Opcode = RC_OPCODE_SUB;
 158                         }
 159                         writer->Inst->U.I.DstReg.WriteMask = 0;
 160                         writer->Inst->U.I.DstReg.File = RC_FILE_NONE;
 161                         writer->Inst->U.I.WriteALUResult = alu_chan;
 162                         writer->Inst->U.I.ALUResultCompare = compare_func;
 163                         if (reverse_srcs) {
 164                                 struct rc_src_register temp_src;
 165                                 temp_src = writer->Inst->U.I.SrcReg[0];
 166                                 writer->Inst->U.I.SrcReg[0] =
 167                                         writer->Inst->U.I.SrcReg[1];
 168                                 writer->Inst->U.I.SrcReg[1] = temp_src;
 169                         }
 170                 }
 171         }
 172
 173         inst_if->U.I.SrcReg[0].File = RC_FILE_SPECIAL;
 174         inst_if->U.I.SrcReg[0].Index = RC_SPECIAL_ALU_RESULT;
 175         inst_if->U.I.SrcReg[0].Swizzle = RC_MAKE_SWIZZLE(
 176                                 RC_SWIZZLE_X, RC_SWIZZLE_UNUSED,
 177                                 RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED);
 178         inst_if->U.I.SrcReg[0].Negate = 0;
 179
 180         return 1;
 181 }
 182
 183 static int r500_swizzle_is_native(rc_opcode opcode, struct rc_src_register reg)
 184 {
 185         unsigned int relevant;
 186         int i;
 187
 188         if (opcode == RC_OPCODE_TEX ||
 189             opcode == RC_OPCODE_TXB ||
 190             opcode == RC_OPCODE_TXP ||
 191             opcode == RC_OPCODE_TXD ||
 192             opcode == RC_OPCODE_TXL ||
 193             opcode == RC_OPCODE_KIL) {
 194                 if (reg.Abs)
 195                         return 0;
 196
 197                 if (opcode == RC_OPCODE_KIL && (reg.Swizzle != RC_SWIZZLE_XYZW || reg.Negate != RC_MASK_NONE))
 198                         return 0;
 199
 200                 for(i = 0; i < 4; ++i) {
 201                         unsigned int swz = GET_SWZ(reg.Swizzle, i);
 202                         if (swz == RC_SWIZZLE_UNUSED) {
 203                                 reg.Negate &= ~(1 << i);
 204                                 continue;
 205                         }
 206                         if (swz >= 4)
 207                                 return 0;
 208                 }
 209
 210                 if (reg.Negate)
 211                         return 0;
 212
 213                 return 1;
 214         } else if (opcode == RC_OPCODE_DDX || opcode == RC_OPCODE_DDY) {
 215                 /* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
 216                  * if it doesn't fit perfectly into a .xyzw case... */
 217                 if (reg.Swizzle == RC_SWIZZLE_XYZW && !reg.Abs && !reg.Negate)
 218                         return 1;
 219
 220                 return 0;
 221         } else {
 222                 /* ALU instructions support almost everything */
 223                 relevant = 0;
 224                 for(i = 0; i < 3; ++i) {
 225                         unsigned int swz = GET_SWZ(reg.Swizzle, i);
 226                         if (swz != RC_SWIZZLE_UNUSED && swz != RC_SWIZZLE_ZERO)
 227                                 relevant |= 1 << i;
 228                 }
 229                 if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant))
 230                         return 0;
 231
 232                 return 1;
 233         }
 234 }
 235
 236 /**
 237  * Split source register access.
 238  *
 239  * The only thing we *cannot* do in an ALU instruction is per-component
 240  * negation.
 241  */
 242 static void r500_swizzle_split(struct rc_src_register src, unsigned int usemask,
 243                 struct rc_swizzle_split * split)
 244 {
 245         unsigned int negatebase[2] = { 0, 0 };
 246         int i;
 247
 248         for(i = 0; i < 4; ++i) {
 249                 unsigned int swz = GET_SWZ(src.Swizzle, i);
 250                 if (swz == RC_SWIZZLE_UNUSED || !GET_BIT(usemask, i))
 251                         continue;
 252                 negatebase[GET_BIT(src.Negate, i)] |= 1 << i;
 253         }
 254
 255         split->NumPhases = 0;
 256
 257         for(i = 0; i <= 1; ++i) {
 258                 if (!negatebase[i])
 259                         continue;
 260
 261                 split->Phase[split->NumPhases++] = negatebase[i];
 262         }
 263 }
 264
 265 struct rc_swizzle_caps r500_swizzle_caps = {
 266         .IsNative = r500_swizzle_is_native,
 267         .Split = r500_swizzle_split
 268 };
 269
 270 static char *toswiz(int swiz_val) {
 271   switch(swiz_val) {
 272   case 0: return "R";
 273   case 1: return "G";
 274   case 2: return "B";
 275   case 3: return "A";
 276   case 4: return "0";
 277   case 5: return "H";
 278   case 6: return "1";
 279   case 7: return "U";
 280   }
 281   return NULL;
 282 }
 283
 284 static char *toop(int op_val)
 285 {
 286   char *str = NULL;
 287   switch (op_val) {
 288   case 0: str = "MAD"; break;
 289   case 1: str = "DP3"; break;
 290   case 2: str = "DP4"; break;
 291   case 3: str = "D2A"; break;
 292   case 4: str = "MIN"; break;
 293   case 5: str = "MAX"; break;
 294   case 6: str = "Reserved"; break;
 295   case 7: str = "CND"; break;
 296   case 8: str = "CMP"; break;
 297   case 9: str = "FRC"; break;
 298   case 10: str = "SOP"; break;
 299   case 11: str = "MDH"; break;
 300   case 12: str = "MDV"; break;
 301   }
 302   return str;
 303 }
 304
 305 static char *to_alpha_op(int op_val)
 306 {
 307   char *str = NULL;
 308   switch (op_val) {
 309   case 0: str = "MAD"; break;
 310   case 1: str = "DP"; break;
 311   case 2: str = "MIN"; break;
 312   case 3: str = "MAX"; break;
 313   case 4: str = "Reserved"; break;
 314   case 5: str = "CND"; break;
 315   case 6: str = "CMP"; break;
 316   case 7: str = "FRC"; break;
 317   case 8: str = "EX2"; break;
 318   case 9: str = "LN2"; break;
 319   case 10: str = "RCP"; break;
 320   case 11: str = "RSQ"; break;
 321   case 12: str = "SIN"; break;
 322   case 13: str = "COS"; break;
 323   case 14: str = "MDH"; break;
 324   case 15: str = "MDV"; break;
 325   }
 326   return str;
 327 }
 328
 329 static char *to_mask(int val)
 330 {
 331   char *str = NULL;
 332   switch(val) {
 333   case 0: str = "NONE"; break;
 334   case 1: str = "R"; break;
 335   case 2: str = "G"; break;
 336   case 3: str = "RG"; break;
 337   case 4: str = "B"; break;
 338   case 5: str = "RB"; break;
 339   case 6: str = "GB"; break;
 340   case 7: str = "RGB"; break;
 341   case 8: str = "A"; break;
 342   case 9: str = "AR"; break;
 343   case 10: str = "AG"; break;
 344   case 11: str = "ARG"; break;
 345   case 12: str = "AB"; break;
 346   case 13: str = "ARB"; break;
 347   case 14: str = "AGB"; break;
 348   case 15: str = "ARGB"; break;
 349   }
 350   return str;
 351 }
 352
 353 static char *to_texop(int val)
 354 {
 355   switch(val) {
 356   case 0: return "NOP";
 357   case 1: return "LD";
 358   case 2: return "TEXKILL";
 359   case 3: return "PROJ";
 360   case 4: return "LODBIAS";
 361   case 5: return "LOD";
 362   case 6: return "DXDY";
 363   }
 364   return NULL;
 365 }
 366
 367 void r500FragmentProgramDump(struct radeon_compiler *c, void *user)
 368 {
 369   struct r300_fragment_program_compiler *compiler = (struct r300_fragment_program_compiler*)c;
 370   struct r500_fragment_program_code *code = &compiler->code->code.r500;
 371   int n, i;
 372   uint32_t inst;
 373   uint32_t inst0;
 374   char *str = NULL;
 375   fprintf(stderr, "R500 Fragment Program:\n--------\n");
 376
 377   for (n = 0; n < code->inst_end+1; n++) {
 378     inst0 = inst = code->inst[n].inst0;
 379     fprintf(stderr,"%d\t0:CMN_INST   0x%08x:", n, inst);
 380     switch(inst & 0x3) {
 381     case R500_INST_TYPE_ALU: str = "ALU"; break;
 382     case R500_INST_TYPE_OUT: str = "OUT"; break;
 383     case R500_INST_TYPE_FC: str = "FC"; break;
 384     case R500_INST_TYPE_TEX: str = "TEX"; break;
 385     };
 386     fprintf(stderr,"%s %s %s %s %s ", str,
 387             inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
 388             inst & R500_INST_LAST ? "LAST" : "",
 389             inst & R500_INST_NOP ? "NOP" : "",
 390             inst & R500_INST_ALU_WAIT ? "ALU WAIT" : "");
 391     fprintf(stderr,"wmask: %s omask: %s\n", to_mask((inst >> 11) & 0xf),
 392             to_mask((inst >> 15) & 0xf));
 393
 394     switch(inst0 & 0x3) {
 395     case R500_INST_TYPE_ALU:
 396     case R500_INST_TYPE_OUT:
 397       fprintf(stderr,"\t1:RGB_ADDR   0x%08x:", code->inst[n].inst1);
 398       inst = code->inst[n].inst1;
 399
 400       fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
 401               inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
 402               (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
 403               (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
 404               (inst >> 30));
 405
 406       fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", code->inst[n].inst2);
 407       inst = code->inst[n].inst2;
 408       fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
 409               inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
 410               (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
 411               (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
 412               (inst >> 30));
 413       fprintf(stderr,"\t3 RGB_INST:  0x%08x:", code->inst[n].inst3);
 414       inst = code->inst[n].inst3;
 415       fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d targ: %d\n",
 416               (inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7),
 417               (inst >> 11) & 0x3,
 418               (inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7),
 419               (inst >> 24) & 0x3, (inst >> 29) & 0x3);
 420
 421
 422       fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", code->inst[n].inst4);
 423       inst = code->inst[n].inst4;
 424       fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d targ %d w:%d\n", to_alpha_op(inst & 0xf),
 425               (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
 426               (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3,
 427               (inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3,
 428               (inst >> 29) & 0x3,
 429               (inst >> 31) & 0x1);
 430
 431       fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", code->inst[n].inst5);
 432       inst = code->inst[n].inst5;
 433       fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf),
 434               (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
 435               (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7),
 436               (inst >> 23) & 0x3,
 437               (inst >> 25) & 0x3, toswiz((inst >> 27) & 0x7), (inst >> 30) & 0x3);
 438       break;
 439     case R500_INST_TYPE_FC:
 440       fprintf(stderr, "\t2:FC_INST    0x%08x:", code->inst[n].inst2);
 441       inst = code->inst[n].inst2;
 442       /* JUMP_FUNC JUMP_ANY*/
 443       fprintf(stderr, "0x%02x %1x ", inst >> 8 & 0xff,
 444           (inst & R500_FC_JUMP_ANY) >> 5);
 445
 446       /* OP */
 447       switch(inst & 0x7){
 448       case R500_FC_OP_JUMP:
 449         fprintf(stderr, "JUMP");
 450         break;
 451       case R500_FC_OP_LOOP:
 452         fprintf(stderr, "LOOP");
 453         break;
 454       case R500_FC_OP_ENDLOOP:
 455         fprintf(stderr, "ENDLOOP");
 456         break;
 457       case R500_FC_OP_REP:
 458         fprintf(stderr, "REP");
 459         break;
 460       case R500_FC_OP_ENDREP:
 461         fprintf(stderr, "ENDREP");
 462         break;
 463       case R500_FC_OP_BREAKLOOP:
 464         fprintf(stderr, "BREAKLOOP");
 465         break;
 466       case R500_FC_OP_BREAKREP:
 467         fprintf(stderr, "BREAKREP");
 468         break;
 469       case R500_FC_OP_CONTINUE:
 470         fprintf(stderr, "CONTINUE");
 471         break;
 472       }
 473       fprintf(stderr," ");
 474       /* A_OP */
 475       switch(inst & (0x3 << 6)){
 476       case R500_FC_A_OP_NONE:
 477         fprintf(stderr, "NONE");
 478         break;
 479       case R500_FC_A_OP_POP:
 480         fprintf(stderr, "POP");
 481         break;
 482       case R500_FC_A_OP_PUSH:
 483         fprintf(stderr, "PUSH");
 484         break;
 485       }
 486       /* B_OP0 B_OP1 */
 487       for(i=0; i<2; i++){
 488         fprintf(stderr, " ");
 489         switch(inst & (0x3 << (24 + (i * 2)))){
 490         /* R500_FC_B_OP0_NONE
 491          * R500_FC_B_OP1_NONE */
 492         case 0:
 493           fprintf(stderr, "NONE");
 494           break;
 495         case R500_FC_B_OP0_DECR:
 496         case R500_FC_B_OP1_DECR:
 497           fprintf(stderr, "DECR");
 498           break;
 499         case R500_FC_B_OP0_INCR:
 500         case R500_FC_B_OP1_INCR:
 501           fprintf(stderr, "INCR");
 502           break;
 503         }
 504       }
 505       /*POP_CNT B_ELSE */
 506       fprintf(stderr, " %d %1x", (inst >> 16) & 0x1f, (inst & R500_FC_B_ELSE) >> 4);
 507       inst = code->inst[n].inst3;
 508       /* JUMP_ADDR */
 509       fprintf(stderr, " %d", inst >> 16);
 510
 511       if(code->inst[n].inst2 & R500_FC_IGNORE_UNCOVERED){
 512         fprintf(stderr, " IGN_UNC");
 513       }
 514       inst = code->inst[n].inst3;
 515       fprintf(stderr, "\n\t3:FC_ADDR    0x%08x:", inst);
 516       fprintf(stderr, "BOOL: 0x%02x, INT: 0x%02x, JUMP_ADDR: %d, JMP_GLBL: %1x\n",
 517       inst & 0x1f, (inst >> 8) & 0x1f, (inst >> 16) & 0x1ff, inst >> 31);
 518       break;
 519     case R500_INST_TYPE_TEX:
 520       inst = code->inst[n].inst1;
 521       fprintf(stderr,"\t1:TEX_INST:  0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf,
 522               to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "",
 523               (inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED");
 524       inst = code->inst[n].inst2;
 525       fprintf(stderr,"\t2:TEX_ADDR:  0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst,
 526               inst & 127, inst & (1<<7) ? "(rel)" : "",
 527               toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3),
 528               toswiz((inst >> 12) & 0x3), toswiz((inst >> 14) & 0x3),
 529               (inst >> 16) & 127, inst & (1<<23) ? "(rel)" : "",
 530               toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3),
 531               toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3));
 532
 533       fprintf(stderr,"\t3:TEX_DXDY:  0x%08x\n", code->inst[n].inst3);
 534       break;
 535     }
 536     fprintf(stderr,"\n");
 537   }
 538
 539 }