2 * Copyright (C) 2009 Nicolai Haehnle.
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 #include "radeon_opcodes.h"
29 #include "radeon_program.h"
31 #include "radeon_program_constants.h"
33 struct rc_opcode_info rc_opcodes
[MAX_RC_OPCODE
] = {
35 .Opcode
= RC_OPCODE_NOP
,
39 .Opcode
= RC_OPCODE_ILLEGAL_OPCODE
,
40 .Name
= "ILLEGAL OPCODE"
43 .Opcode
= RC_OPCODE_ABS
,
50 .Opcode
= RC_OPCODE_ADD
,
57 .Opcode
= RC_OPCODE_ARL
,
63 .Opcode
= RC_OPCODE_CEIL
,
70 .Opcode
= RC_OPCODE_CLAMP
,
77 .Opcode
= RC_OPCODE_CMP
,
84 .Opcode
= RC_OPCODE_CND
,
91 .Opcode
= RC_OPCODE_COS
,
98 .Opcode
= RC_OPCODE_DDX
,
105 .Opcode
= RC_OPCODE_DDY
,
112 .Opcode
= RC_OPCODE_DP2
,
118 .Opcode
= RC_OPCODE_DP3
,
124 .Opcode
= RC_OPCODE_DP4
,
130 .Opcode
= RC_OPCODE_DPH
,
136 .Opcode
= RC_OPCODE_DST
,
142 .Opcode
= RC_OPCODE_EX2
,
146 .IsStandardScalar
= 1
149 .Opcode
= RC_OPCODE_EXP
,
155 .Opcode
= RC_OPCODE_FLR
,
162 .Opcode
= RC_OPCODE_FRC
,
169 .Opcode
= RC_OPCODE_KIL
,
174 .Opcode
= RC_OPCODE_LG2
,
178 .IsStandardScalar
= 1
181 .Opcode
= RC_OPCODE_LIT
,
187 .Opcode
= RC_OPCODE_LOG
,
193 .Opcode
= RC_OPCODE_LRP
,
200 .Opcode
= RC_OPCODE_MAD
,
207 .Opcode
= RC_OPCODE_MAX
,
214 .Opcode
= RC_OPCODE_MIN
,
221 .Opcode
= RC_OPCODE_MOV
,
228 .Opcode
= RC_OPCODE_MUL
,
235 .Opcode
= RC_OPCODE_POW
,
239 .IsStandardScalar
= 1
242 .Opcode
= RC_OPCODE_RCP
,
246 .IsStandardScalar
= 1
249 .Opcode
= RC_OPCODE_ROUND
,
256 .Opcode
= RC_OPCODE_RSQ
,
260 .IsStandardScalar
= 1
263 .Opcode
= RC_OPCODE_SCS
,
269 .Opcode
= RC_OPCODE_SEQ
,
276 .Opcode
= RC_OPCODE_SFL
,
283 .Opcode
= RC_OPCODE_SGE
,
290 .Opcode
= RC_OPCODE_SGT
,
297 .Opcode
= RC_OPCODE_SIN
,
301 .IsStandardScalar
= 1
304 .Opcode
= RC_OPCODE_SLE
,
311 .Opcode
= RC_OPCODE_SLT
,
318 .Opcode
= RC_OPCODE_SNE
,
325 .Opcode
= RC_OPCODE_SSG
,
332 .Opcode
= RC_OPCODE_SUB
,
339 .Opcode
= RC_OPCODE_SWZ
,
346 .Opcode
= RC_OPCODE_TRUNC
,
353 .Opcode
= RC_OPCODE_XPD
,
359 .Opcode
= RC_OPCODE_TEX
,
366 .Opcode
= RC_OPCODE_TXB
,
373 .Opcode
= RC_OPCODE_TXD
,
380 .Opcode
= RC_OPCODE_TXL
,
387 .Opcode
= RC_OPCODE_TXP
,
394 .Opcode
= RC_OPCODE_IF
,
400 .Opcode
= RC_OPCODE_ELSE
,
406 .Opcode
= RC_OPCODE_ENDIF
,
412 .Opcode
= RC_OPCODE_BGNLOOP
,
418 .Opcode
= RC_OPCODE_BRK
,
424 .Opcode
= RC_OPCODE_ENDLOOP
,
430 .Opcode
= RC_OPCODE_CONT
,
436 .Opcode
= RC_OPCODE_REPL_ALPHA
,
437 .Name
= "REPL_ALPHA",
441 .Opcode
= RC_OPCODE_BEGIN_TEX
,
445 .Opcode
= RC_OPCODE_KILP
,
449 .Opcode
= RC_ME_PRED_SEQ
,
450 .Name
= "ME_PRED_SEQ",
455 .Opcode
= RC_ME_PRED_SGT
,
456 .Name
= "ME_PRED_SGT",
461 .Opcode
= RC_ME_PRED_SGE
,
462 .Name
= "ME_PRED_SGE",
467 .Opcode
= RC_ME_PRED_SNEQ
,
468 .Name
= "ME_PRED_SNEQ",
473 .Opcode
= RC_ME_PRED_SET_CLR
,
474 .Name
= "ME_PRED_SET_CLEAR",
479 .Opcode
= RC_ME_PRED_SET_INV
,
480 .Name
= "ME_PRED_SET_INV",
485 .Opcode
= RC_ME_PRED_SET_POP
,
486 .Name
= "ME_PRED_SET_POP",
491 .Opcode
= RC_ME_PRED_SET_RESTORE
,
492 .Name
= "ME_PRED_SET_RESTORE",
497 .Opcode
= RC_VE_PRED_SEQ_PUSH
,
498 .Name
= "VE_PRED_SEQ_PUSH",
503 .Opcode
= RC_VE_PRED_SGT_PUSH
,
504 .Name
= "VE_PRED_SGT_PUSH",
509 .Opcode
= RC_VE_PRED_SGE_PUSH
,
510 .Name
= "VE_PRED_SGE_PUSH",
515 .Opcode
= RC_VE_PRED_SNEQ_PUSH
,
516 .Name
= "VE_PRED_SNEQ_PUSH",
522 void rc_compute_sources_for_writemask(
523 const struct rc_instruction
*inst
,
524 unsigned int writemask
,
525 unsigned int *srcmasks
)
527 const struct rc_opcode_info
* opcode
= rc_get_opcode_info(inst
->U
.I
.Opcode
);
532 if (opcode
->Opcode
== RC_OPCODE_KIL
)
533 srcmasks
[0] |= RC_MASK_XYZW
;
534 else if (opcode
->Opcode
== RC_OPCODE_IF
)
535 srcmasks
[0] |= RC_MASK_X
;
540 if (opcode
->IsComponentwise
) {
541 for(unsigned int src
= 0; src
< opcode
->NumSrcRegs
; ++src
)
542 srcmasks
[src
] |= writemask
;
543 } else if (opcode
->IsStandardScalar
) {
544 for(unsigned int src
= 0; src
< opcode
->NumSrcRegs
; ++src
)
545 srcmasks
[src
] |= writemask
;
547 switch(opcode
->Opcode
) {
549 srcmasks
[0] |= RC_MASK_X
;
552 srcmasks
[0] |= RC_MASK_XY
;
553 srcmasks
[1] |= RC_MASK_XY
;
557 srcmasks
[0] |= RC_MASK_XYZ
;
558 srcmasks
[1] |= RC_MASK_XYZ
;
561 srcmasks
[0] |= RC_MASK_XYZW
;
562 srcmasks
[1] |= RC_MASK_XYZW
;
565 srcmasks
[0] |= RC_MASK_XYZ
;
566 srcmasks
[1] |= RC_MASK_XYZW
;
571 srcmasks
[0] |= RC_MASK_W
;
574 switch (inst
->U
.I
.TexSrcTarget
) {
576 srcmasks
[0] |= RC_MASK_X
;
579 case RC_TEXTURE_RECT
:
580 case RC_TEXTURE_1D_ARRAY
:
581 srcmasks
[0] |= RC_MASK_XY
;
584 case RC_TEXTURE_CUBE
:
585 case RC_TEXTURE_2D_ARRAY
:
586 srcmasks
[0] |= RC_MASK_XYZ
;
591 switch (inst
->U
.I
.TexSrcTarget
) {
592 case RC_TEXTURE_1D_ARRAY
:
593 srcmasks
[0] |= RC_MASK_Y
;
596 srcmasks
[0] |= RC_MASK_X
;
597 srcmasks
[1] |= RC_MASK_X
;
598 srcmasks
[2] |= RC_MASK_X
;
600 case RC_TEXTURE_2D_ARRAY
:
601 srcmasks
[0] |= RC_MASK_Z
;
604 case RC_TEXTURE_RECT
:
605 srcmasks
[0] |= RC_MASK_XY
;
606 srcmasks
[1] |= RC_MASK_XY
;
607 srcmasks
[2] |= RC_MASK_XY
;
610 case RC_TEXTURE_CUBE
:
611 srcmasks
[0] |= RC_MASK_XYZ
;
612 srcmasks
[1] |= RC_MASK_XYZ
;
613 srcmasks
[2] |= RC_MASK_XYZ
;
618 srcmasks
[0] |= RC_MASK_Y
| RC_MASK_Z
;
619 srcmasks
[1] |= RC_MASK_Y
| RC_MASK_W
;
623 srcmasks
[0] |= RC_MASK_XY
;
626 srcmasks
[0] |= RC_MASK_X
| RC_MASK_Y
| RC_MASK_W
;