src/gallium/drivers/r300/r300_chipset.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #include "r300_chipset.h"
  24
  25 #include "util/u_debug.h"
  26
  27 #include <stdio.h>
  28
  29 /* r300_chipset: A file all to itself for deducing the various properties of
  30  * Radeons. */
  31
  32 /* Parse a PCI ID and fill an r300_capabilities struct with information. */
  33 void r300_parse_chipset(struct r300_capabilities* caps)
  34 {
  35     /* Reasonable defaults */
  36     caps->num_vert_fpus = 2;
  37     caps->num_tex_units = 16;
  38     caps->has_tcl = debug_get_bool_option("RADEON_NO_TCL", FALSE) ? FALSE : TRUE;
  39     caps->has_hiz = TRUE;
  40     caps->is_r400 = FALSE;
  41     caps->is_r500 = FALSE;
  42     caps->high_second_pipe = FALSE;
  43
  44     /* Note: These are not ordered by PCI ID. I leave that task to GCC,
  45      * which will perform the ordering while collating jump tables. Instead,
  46      * I've tried to group them according to capabilities and age. */
  47     switch (caps->pci_id) {
  48         case 0x4144:
  49             caps->family = CHIP_FAMILY_R300;
  50             caps->high_second_pipe = TRUE;
  51             caps->num_vert_fpus = 4;
  52             break;
  53
  54         case 0x4145:
  55         case 0x4146:
  56         case 0x4147:
  57         case 0x4E44:
  58         case 0x4E45:
  59         case 0x4E46:
  60         case 0x4E47:
  61             caps->family = CHIP_FAMILY_R300;
  62             caps->high_second_pipe = TRUE;
  63             caps->num_vert_fpus = 4;
  64             break;
  65
  66         case 0x4150:
  67         case 0x4151:
  68         case 0x4152:
  69         case 0x4153:
  70         case 0x4154:
  71         case 0x4155:
  72         case 0x4156:
  73         case 0x4E50:
  74         case 0x4E51:
  75         case 0x4E52:
  76         case 0x4E53:
  77         case 0x4E54:
  78         case 0x4E56:
  79             caps->family = CHIP_FAMILY_RV350;
  80             caps->has_hiz = FALSE;
  81             caps->high_second_pipe = TRUE;
  82             break;
  83
  84         case 0x4148:
  85         case 0x4149:
  86         case 0x414A:
  87         case 0x414B:
  88         case 0x4E48:
  89         case 0x4E49:
  90         case 0x4E4B:
  91             caps->family = CHIP_FAMILY_R350;
  92             caps->high_second_pipe = TRUE;
  93             caps->num_vert_fpus = 4;
  94             break;
  95
  96         case 0x4E4A:
  97             caps->family = CHIP_FAMILY_R360;
  98             caps->high_second_pipe = TRUE;
  99             caps->num_vert_fpus = 4;
 100             break;
 101
 102         case 0x5460:
 103         case 0x5462:
 104         case 0x5464:
 105         case 0x5B60:
 106         case 0x5B62:
 107         case 0x5B63:
 108         case 0x5B64:
 109         case 0x5B65:
 110             caps->family = CHIP_FAMILY_RV370;
 111             caps->has_hiz = FALSE;
 112             caps->high_second_pipe = TRUE;
 113             break;
 114
 115         case 0x3150:
 116         case 0x3152:
 117         case 0x3154:
 118         case 0x3155:
 119         case 0x3E50:
 120         case 0x3E54:
 121             caps->family = CHIP_FAMILY_RV380;
 122             caps->high_second_pipe = TRUE;
 123             break;
 124
 125         case 0x4A48:
 126         case 0x4A49:
 127         case 0x4A4A:
 128         case 0x4A4B:
 129         case 0x4A4C:
 130         case 0x4A4D:
 131         case 0x4A4E:
 132         case 0x4A4F:
 133         case 0x4A50:
 134         case 0x4A54:
 135             caps->family = CHIP_FAMILY_R420;
 136             caps->num_vert_fpus = 6;
 137             caps->is_r400 = TRUE;
 138             break;
 139
 140         case 0x5548:
 141         case 0x5549:
 142         case 0x554A:
 143         case 0x554B:
 144         case 0x5550:
 145         case 0x5551:
 146         case 0x5552:
 147         case 0x5554:
 148         case 0x5D57:
 149             caps->family = CHIP_FAMILY_R423;
 150             caps->num_vert_fpus = 6;
 151             caps->is_r400 = TRUE;
 152             break;
 153
 154         case 0x554C:
 155         case 0x554D:
 156         case 0x554E:
 157         case 0x554F:
 158         case 0x5D48:
 159         case 0x5D49:
 160         case 0x5D4A:
 161             caps->family = CHIP_FAMILY_R430;
 162             caps->num_vert_fpus = 6;
 163             caps->is_r400 = TRUE;
 164             break;
 165
 166         case 0x5D4C:
 167         case 0x5D4D:
 168         case 0x5D4E:
 169         case 0x5D4F:
 170         case 0x5D50:
 171         case 0x5D52:
 172             caps->family = CHIP_FAMILY_R480;
 173             caps->num_vert_fpus = 6;
 174             caps->is_r400 = TRUE;
 175             break;
 176
 177         case 0x4B48:
 178         case 0x4B49:
 179         case 0x4B4A:
 180         case 0x4B4B:
 181         case 0x4B4C:
 182             caps->family = CHIP_FAMILY_R481;
 183             caps->num_vert_fpus = 6;
 184             caps->is_r400 = TRUE;
 185             break;
 186
 187         case 0x5E4C:
 188         case 0x5E4F:
 189         case 0x564A:
 190         case 0x564B:
 191         case 0x564F:
 192         case 0x5652:
 193         case 0x5653:
 194         case 0x5657:
 195         case 0x5E48:
 196         case 0x5E4A:
 197         case 0x5E4B:
 198         case 0x5E4D:
 199             caps->family = CHIP_FAMILY_RV410;
 200             caps->num_vert_fpus = 6;
 201             caps->is_r400 = TRUE;
 202             break;
 203
 204         case 0x5954:
 205         case 0x5955:
 206             caps->family = CHIP_FAMILY_RS480;
 207             caps->has_hiz = FALSE;
 208             caps->has_tcl = FALSE;
 209             break;
 210
 211         case 0x5974:
 212         case 0x5975:
 213             caps->family = CHIP_FAMILY_RS482;
 214             caps->has_hiz = FALSE;
 215             caps->has_tcl = FALSE;
 216             break;
 217
 218         case 0x5A41:
 219         case 0x5A42:
 220             caps->family = CHIP_FAMILY_RS400;
 221             caps->has_hiz = FALSE;
 222             caps->has_tcl = FALSE;
 223             break;
 224
 225         case 0x5A61:
 226         case 0x5A62:
 227             caps->family = CHIP_FAMILY_RC410;
 228             caps->has_hiz = FALSE;
 229             caps->has_tcl = FALSE;
 230             break;
 231
 232         case 0x791E:
 233         case 0x791F:
 234             caps->family = CHIP_FAMILY_RS690;
 235             caps->has_tcl = FALSE;
 236             caps->is_r400 = TRUE;
 237             break;
 238
 239         case 0x793F:
 240         case 0x7941:
 241         case 0x7942:
 242             caps->family = CHIP_FAMILY_RS600;
 243             caps->has_tcl = FALSE;
 244             caps->is_r400 = TRUE;
 245             break;
 246
 247         case 0x796C:
 248         case 0x796D:
 249         case 0x796E:
 250         case 0x796F:
 251             caps->family = CHIP_FAMILY_RS740;
 252             caps->has_tcl = FALSE;
 253             caps->is_r400 = TRUE;
 254             break;
 255
 256         case 0x7100:
 257         case 0x7101:
 258         case 0x7102:
 259         case 0x7103:
 260         case 0x7104:
 261         case 0x7105:
 262         case 0x7106:
 263         case 0x7108:
 264         case 0x7109:
 265         case 0x710A:
 266         case 0x710B:
 267         case 0x710C:
 268         case 0x710E:
 269         case 0x710F:
 270             caps->family = CHIP_FAMILY_R520;
 271             caps->num_vert_fpus = 8;
 272             caps->is_r500 = TRUE;
 273             break;
 274
 275         case 0x7140:
 276         case 0x7141:
 277         case 0x7142:
 278         case 0x7143:
 279         case 0x7144:
 280         case 0x7145:
 281         case 0x7146:
 282         case 0x7147:
 283         case 0x7149:
 284         case 0x714A:
 285         case 0x714B:
 286         case 0x714C:
 287         case 0x714D:
 288         case 0x714E:
 289         case 0x714F:
 290         case 0x7151:
 291         case 0x7152:
 292         case 0x7153:
 293         case 0x715E:
 294         case 0x715F:
 295         case 0x7180:
 296         case 0x7181:
 297         case 0x7183:
 298         case 0x7186:
 299         case 0x7187:
 300         case 0x7188:
 301         case 0x718A:
 302         case 0x718B:
 303         case 0x718C:
 304         case 0x718D:
 305         case 0x718F:
 306         case 0x7193:
 307         case 0x7196:
 308         case 0x719B:
 309         case 0x719F:
 310         case 0x7200:
 311         case 0x7210:
 312         case 0x7211:
 313             caps->family = CHIP_FAMILY_RV515;
 314             caps->num_vert_fpus = 2;
 315             caps->is_r500 = TRUE;
 316             break;
 317
 318         case 0x71C0:
 319         case 0x71C1:
 320         case 0x71C2:
 321         case 0x71C3:
 322         case 0x71C4:
 323         case 0x71C5:
 324         case 0x71C6:
 325         case 0x71C7:
 326         case 0x71CD:
 327         case 0x71CE:
 328         case 0x71D2:
 329         case 0x71D4:
 330         case 0x71D5:
 331         case 0x71D6:
 332         case 0x71DA:
 333         case 0x71DE:
 334             caps->family = CHIP_FAMILY_RV530;
 335             caps->num_vert_fpus = 5;
 336             caps->is_r500 = TRUE;
 337             break;
 338
 339         case 0x7240:
 340         case 0x7243:
 341         case 0x7244:
 342         case 0x7245:
 343         case 0x7246:
 344         case 0x7247:
 345         case 0x7248:
 346         case 0x7249:
 347         case 0x724A:
 348         case 0x724B:
 349         case 0x724C:
 350         case 0x724D:
 351         case 0x724E:
 352         case 0x724F:
 353         case 0x7284:
 354             caps->family = CHIP_FAMILY_R580;
 355             caps->num_vert_fpus = 8;
 356             caps->is_r500 = TRUE;
 357             break;
 358
 359         case 0x7280:
 360             caps->family = CHIP_FAMILY_RV570;
 361             caps->num_vert_fpus = 8;
 362             caps->is_r500 = TRUE;
 363             break;
 364
 365         case 0x7281:
 366         case 0x7283:
 367         case 0x7287:
 368         case 0x7288:
 369         case 0x7289:
 370         case 0x728B:
 371         case 0x728C:
 372         case 0x7290:
 373         case 0x7291:
 374         case 0x7293:
 375         case 0x7297:
 376             caps->family = CHIP_FAMILY_RV560;
 377             caps->num_vert_fpus = 8;
 378             caps->is_r500 = TRUE;
 379             break;
 380
 381         default:
 382             fprintf(stderr, "r300: Warning: Unknown chipset 0x%x\n",
 383                     caps->pci_id);
 384     }
 385
 386     caps->is_rv350 = caps->family >= CHIP_FAMILY_RV350;
 387 }