2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23 #include "r300_chipset.h"
25 #include "util/u_debug.h"
29 /* r300_chipset: A file all to itself for deducing the various properties of
32 /* Parse a PCI ID and fill an r300_capabilities struct with information. */
33 void r300_parse_chipset(struct r300_capabilities
* caps
)
35 /* Reasonable defaults */
36 caps
->num_vert_fpus
= 2;
37 caps
->num_tex_units
= 16;
38 caps
->has_tcl
= debug_get_bool_option("RADEON_NO_TCL", FALSE
) ? FALSE
: TRUE
;
40 caps
->is_r400
= FALSE
;
41 caps
->is_r500
= FALSE
;
42 caps
->high_second_pipe
= FALSE
;
44 /* Note: These are not ordered by PCI ID. I leave that task to GCC,
45 * which will perform the ordering while collating jump tables. Instead,
46 * I've tried to group them according to capabilities and age. */
47 switch (caps
->pci_id
) {
49 caps
->family
= CHIP_FAMILY_R300
;
50 caps
->high_second_pipe
= TRUE
;
51 caps
->num_vert_fpus
= 4;
52 caps
->hiz_ram
= R300_HIZ_LIMIT
;
53 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
63 caps
->family
= CHIP_FAMILY_R300
;
64 caps
->high_second_pipe
= TRUE
;
65 caps
->num_vert_fpus
= 4;
66 caps
->hiz_ram
= R300_HIZ_LIMIT
;
67 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
83 caps
->family
= CHIP_FAMILY_RV350
;
84 caps
->high_second_pipe
= TRUE
;
85 caps
->zmask_ram
= RV3xx_ZMASK_SIZE
;
95 caps
->family
= CHIP_FAMILY_R350
;
96 caps
->high_second_pipe
= TRUE
;
97 caps
->num_vert_fpus
= 4;
98 caps
->hiz_ram
= R300_HIZ_LIMIT
;
99 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
103 caps
->family
= CHIP_FAMILY_R360
;
104 caps
->high_second_pipe
= TRUE
;
105 caps
->num_vert_fpus
= 4;
106 caps
->hiz_ram
= R300_HIZ_LIMIT
;
107 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
118 caps
->family
= CHIP_FAMILY_RV370
;
119 caps
->high_second_pipe
= TRUE
;
120 caps
->zmask_ram
= RV3xx_ZMASK_SIZE
;
129 caps
->family
= CHIP_FAMILY_RV380
;
130 caps
->high_second_pipe
= TRUE
;
131 caps
->hiz_ram
= R300_HIZ_LIMIT
;
132 caps
->zmask_ram
= RV3xx_ZMASK_SIZE
;
145 caps
->family
= CHIP_FAMILY_R420
;
146 caps
->num_vert_fpus
= 6;
147 caps
->is_r400
= TRUE
;
148 caps
->hiz_ram
= R300_HIZ_LIMIT
;
149 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
161 caps
->family
= CHIP_FAMILY_R423
;
162 caps
->num_vert_fpus
= 6;
163 caps
->is_r400
= TRUE
;
164 caps
->hiz_ram
= R300_HIZ_LIMIT
;
165 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
175 caps
->family
= CHIP_FAMILY_R430
;
176 caps
->num_vert_fpus
= 6;
177 caps
->is_r400
= TRUE
;
178 caps
->hiz_ram
= R300_HIZ_LIMIT
;
179 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
188 caps
->family
= CHIP_FAMILY_R480
;
189 caps
->num_vert_fpus
= 6;
190 caps
->is_r400
= TRUE
;
191 caps
->hiz_ram
= R300_HIZ_LIMIT
;
192 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
200 caps
->family
= CHIP_FAMILY_R481
;
201 caps
->num_vert_fpus
= 6;
202 caps
->is_r400
= TRUE
;
203 caps
->hiz_ram
= R300_HIZ_LIMIT
;
204 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
219 caps
->family
= CHIP_FAMILY_RV410
;
220 caps
->num_vert_fpus
= 6;
221 caps
->is_r400
= TRUE
;
222 caps
->hiz_ram
= R300_HIZ_LIMIT
;
223 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
228 caps
->family
= CHIP_FAMILY_RS480
;
229 caps
->has_tcl
= FALSE
;
230 caps
->zmask_ram
= RV3xx_ZMASK_SIZE
;
235 caps
->family
= CHIP_FAMILY_RS482
;
236 caps
->has_tcl
= FALSE
;
237 caps
->zmask_ram
= RV3xx_ZMASK_SIZE
;
242 caps
->family
= CHIP_FAMILY_RS400
;
243 caps
->has_tcl
= FALSE
;
244 caps
->zmask_ram
= RV3xx_ZMASK_SIZE
;
249 caps
->family
= CHIP_FAMILY_RC410
;
250 caps
->has_tcl
= FALSE
;
251 caps
->zmask_ram
= RV3xx_ZMASK_SIZE
;
256 caps
->family
= CHIP_FAMILY_RS690
;
257 caps
->has_tcl
= FALSE
;
258 caps
->is_r400
= TRUE
;
259 caps
->hiz_ram
= R300_HIZ_LIMIT
;
260 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
266 caps
->family
= CHIP_FAMILY_RS600
;
267 caps
->has_tcl
= FALSE
;
268 caps
->is_r400
= TRUE
;
269 caps
->hiz_ram
= R300_HIZ_LIMIT
;
270 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
277 caps
->family
= CHIP_FAMILY_RS740
;
278 caps
->has_tcl
= FALSE
;
279 caps
->is_r400
= TRUE
;
280 caps
->hiz_ram
= R300_HIZ_LIMIT
;
281 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
298 caps
->family
= CHIP_FAMILY_R520
;
299 caps
->num_vert_fpus
= 8;
300 caps
->is_r500
= TRUE
;
301 caps
->hiz_ram
= R300_HIZ_LIMIT
;
302 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
343 caps
->family
= CHIP_FAMILY_RV515
;
344 caps
->num_vert_fpus
= 2;
345 caps
->is_r500
= TRUE
;
346 caps
->hiz_ram
= R300_HIZ_LIMIT
;
347 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
366 caps
->family
= CHIP_FAMILY_RV530
;
367 caps
->num_vert_fpus
= 5;
368 caps
->is_r500
= TRUE
;
369 /*caps->hiz_ram = RV530_HIZ_LIMIT;*/
370 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
388 caps
->family
= CHIP_FAMILY_R580
;
389 caps
->num_vert_fpus
= 8;
390 caps
->is_r500
= TRUE
;
391 caps
->hiz_ram
= RV530_HIZ_LIMIT
;
392 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
396 caps
->family
= CHIP_FAMILY_RV570
;
397 caps
->num_vert_fpus
= 8;
398 caps
->is_r500
= TRUE
;
399 caps
->hiz_ram
= RV530_HIZ_LIMIT
;
400 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
414 caps
->family
= CHIP_FAMILY_RV560
;
415 caps
->num_vert_fpus
= 8;
416 caps
->is_r500
= TRUE
;
417 caps
->hiz_ram
= RV530_HIZ_LIMIT
;
418 caps
->zmask_ram
= PIPE_ZMASK_SIZE
;
422 fprintf(stderr
, "r300: Warning: Unknown chipset 0x%x\n",
426 caps
->is_rv350
= caps
->family
>= CHIP_FAMILY_RV350
;