2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23 #include "r300_chipset.h"
25 #include "util/u_debug.h"
27 /* r300_chipset: A file all to itself for deducing the various properties of
30 /* Parse a PCI ID and fill an r300_capabilities struct with information. */
31 void r300_parse_chipset(struct r300_capabilities
* caps
)
33 /* Reasonable defaults */
34 caps
->num_vert_fpus
= 4;
35 caps
->has_tcl
= debug_get_bool_option("RADEON_NO_TCL", FALSE
) ? FALSE
: TRUE
;
36 caps
->is_r500
= FALSE
;
37 caps
->high_second_pipe
= FALSE
;
40 /* Note: These are not ordered by PCI ID. I leave that task to GCC,
41 * which will perform the ordering while collating jump tables. Instead,
42 * I've tried to group them according to capabilities and age. */
43 switch (caps
->pci_id
) {
45 caps
->family
= CHIP_FAMILY_R300
;
46 caps
->high_second_pipe
= TRUE
;
56 caps
->family
= CHIP_FAMILY_R300
;
57 caps
->high_second_pipe
= TRUE
;
73 caps
->family
= CHIP_FAMILY_RV350
;
74 caps
->high_second_pipe
= TRUE
;
84 caps
->family
= CHIP_FAMILY_R350
;
85 caps
->high_second_pipe
= TRUE
;
89 caps
->family
= CHIP_FAMILY_R360
;
90 caps
->high_second_pipe
= TRUE
;
101 caps
->family
= CHIP_FAMILY_RV370
;
102 caps
->high_second_pipe
= TRUE
;
110 caps
->family
= CHIP_FAMILY_RV380
;
111 caps
->high_second_pipe
= TRUE
;
124 caps
->family
= CHIP_FAMILY_R420
;
125 caps
->num_vert_fpus
= 6;
137 caps
->family
= CHIP_FAMILY_R423
;
138 caps
->num_vert_fpus
= 6;
148 caps
->family
= CHIP_FAMILY_R430
;
149 caps
->num_vert_fpus
= 6;
158 caps
->family
= CHIP_FAMILY_R480
;
159 caps
->num_vert_fpus
= 6;
167 caps
->family
= CHIP_FAMILY_R481
;
168 caps
->num_vert_fpus
= 6;
183 caps
->family
= CHIP_FAMILY_RV410
;
184 caps
->num_vert_fpus
= 6;
189 caps
->family
= CHIP_FAMILY_RS480
;
190 caps
->has_tcl
= FALSE
;
195 caps
->family
= CHIP_FAMILY_RS482
;
196 caps
->has_tcl
= FALSE
;
201 caps
->family
= CHIP_FAMILY_RS400
;
202 caps
->has_tcl
= FALSE
;
207 caps
->family
= CHIP_FAMILY_RC410
;
208 caps
->has_tcl
= FALSE
;
213 caps
->family
= CHIP_FAMILY_RS690
;
214 caps
->has_tcl
= FALSE
;
220 caps
->family
= CHIP_FAMILY_RS600
;
221 caps
->has_tcl
= FALSE
;
228 caps
->family
= CHIP_FAMILY_RS740
;
229 caps
->has_tcl
= FALSE
;
246 caps
->family
= CHIP_FAMILY_R520
;
247 caps
->num_vert_fpus
= 8;
248 caps
->is_r500
= TRUE
;
289 caps
->family
= CHIP_FAMILY_RV515
;
290 caps
->num_vert_fpus
= 2;
291 caps
->is_r500
= TRUE
;
310 caps
->family
= CHIP_FAMILY_RV530
;
311 caps
->num_vert_fpus
= 5;
312 caps
->is_r500
= TRUE
;
330 caps
->family
= CHIP_FAMILY_R580
;
331 caps
->num_vert_fpus
= 8;
332 caps
->is_r500
= TRUE
;
336 caps
->family
= CHIP_FAMILY_RV570
;
337 caps
->num_vert_fpus
= 5;
338 caps
->is_r500
= TRUE
;
352 caps
->family
= CHIP_FAMILY_RV560
;
353 caps
->num_vert_fpus
= 5;
354 caps
->is_r500
= TRUE
;
358 debug_printf("r300: Warning: Unknown chipset 0x%x\n",