Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
[mesa.git] / src / gallium / drivers / r300 / r300_chipset.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #include "r300_chipset.h"
24 #include "util/u_debug.h"
25
26 /* r300_chipset: A file all to itself for deducing the various properties of
27 * Radeons. */
28
29 /* Parse a PCI ID and fill an r300_capabilities struct with information. */
30 void r300_parse_chipset(struct r300_capabilities* caps)
31 {
32 /* Reasonable defaults */
33 caps->num_vert_fpus = 4;
34 caps->has_tcl = getenv("RADEON_NO_TCL") ? FALSE : TRUE;
35 caps->is_r500 = FALSE;
36 caps->high_second_pipe = FALSE;
37
38
39 /* Note: These are not ordered by PCI ID. I leave that task to GCC,
40 * which will perform the ordering while collating jump tables. Instead,
41 * I've tried to group them according to capabilities and age. */
42 switch (caps->pci_id) {
43 case 0x4144:
44 caps->family = CHIP_FAMILY_R300;
45 caps->high_second_pipe = TRUE;
46 break;
47
48 case 0x4145:
49 case 0x4146:
50 case 0x4147:
51 case 0x4E44:
52 case 0x4E45:
53 case 0x4E46:
54 case 0x4E47:
55 caps->family = CHIP_FAMILY_R300;
56 caps->high_second_pipe = TRUE;
57 break;
58
59 case 0x4150:
60 case 0x4151:
61 case 0x4152:
62 case 0x4153:
63 case 0x4154:
64 case 0x4155:
65 case 0x4156:
66 case 0x4E50:
67 case 0x4E51:
68 case 0x4E52:
69 case 0x4E53:
70 case 0x4E54:
71 case 0x4E56:
72 caps->family = CHIP_FAMILY_RV350;
73 caps->high_second_pipe = TRUE;
74 break;
75
76 case 0x4148:
77 case 0x4149:
78 case 0x414A:
79 case 0x414B:
80 case 0x4E48:
81 case 0x4E49:
82 case 0x4E4B:
83 caps->family = CHIP_FAMILY_R350;
84 caps->high_second_pipe = TRUE;
85 break;
86
87 case 0x4E4A:
88 caps->family = CHIP_FAMILY_R360;
89 caps->high_second_pipe = TRUE;
90 break;
91
92 case 0x5460:
93 case 0x5462:
94 case 0x5464:
95 case 0x5B60:
96 case 0x5B62:
97 case 0x5B63:
98 case 0x5B64:
99 case 0x5B65:
100 caps->family = CHIP_FAMILY_RV370;
101 caps->high_second_pipe = TRUE;
102 break;
103
104 case 0x3150:
105 case 0x3152:
106 case 0x3154:
107 case 0x3E50:
108 case 0x3E54:
109 caps->family = CHIP_FAMILY_RV380;
110 caps->high_second_pipe = TRUE;
111 break;
112
113 case 0x4A48:
114 case 0x4A49:
115 case 0x4A4A:
116 case 0x4A4B:
117 case 0x4A4C:
118 case 0x4A4D:
119 case 0x4A4E:
120 case 0x4A4F:
121 case 0x4A50:
122 case 0x4A54:
123 caps->family = CHIP_FAMILY_R420;
124 caps->num_vert_fpus = 6;
125 break;
126
127 case 0x5548:
128 case 0x5549:
129 case 0x554A:
130 case 0x554B:
131 case 0x5550:
132 case 0x5551:
133 case 0x5552:
134 case 0x5554:
135 case 0x5D57:
136 caps->family = CHIP_FAMILY_R423;
137 caps->num_vert_fpus = 6;
138 break;
139
140 case 0x554C:
141 case 0x554D:
142 case 0x554E:
143 case 0x554F:
144 case 0x5D48:
145 case 0x5D49:
146 case 0x5D4A:
147 caps->family = CHIP_FAMILY_R430;
148 caps->num_vert_fpus = 6;
149 break;
150
151 case 0x5D4C:
152 case 0x5D4D:
153 case 0x5D4E:
154 case 0x5D4F:
155 case 0x5D50:
156 case 0x5D52:
157 caps->family = CHIP_FAMILY_R480;
158 caps->num_vert_fpus = 6;
159 break;
160
161 case 0x4B48:
162 case 0x4B49:
163 case 0x4B4A:
164 case 0x4B4B:
165 case 0x4B4C:
166 caps->family = CHIP_FAMILY_R481;
167 caps->num_vert_fpus = 6;
168 break;
169
170 case 0x5E4C:
171 case 0x5E4F:
172 case 0x564A:
173 case 0x564B:
174 case 0x564F:
175 case 0x5652:
176 case 0x5653:
177 case 0x5657:
178 case 0x5E48:
179 case 0x5E4A:
180 case 0x5E4B:
181 case 0x5E4D:
182 caps->family = CHIP_FAMILY_RV410;
183 caps->num_vert_fpus = 6;
184 break;
185
186 case 0x5954:
187 case 0x5955:
188 caps->family = CHIP_FAMILY_RS480;
189 caps->has_tcl = FALSE;
190 break;
191
192 case 0x5974:
193 case 0x5975:
194 caps->family = CHIP_FAMILY_RS482;
195 caps->has_tcl = FALSE;
196 break;
197
198 case 0x5A41:
199 case 0x5A42:
200 caps->family = CHIP_FAMILY_RS400;
201 caps->has_tcl = FALSE;
202 break;
203
204 case 0x5A61:
205 case 0x5A62:
206 caps->family = CHIP_FAMILY_RC410;
207 caps->has_tcl = FALSE;
208 break;
209
210 case 0x791E:
211 case 0x791F:
212 caps->family = CHIP_FAMILY_RS690;
213 caps->has_tcl = FALSE;
214 break;
215
216 case 0x793F:
217 case 0x7941:
218 case 0x7942:
219 caps->family = CHIP_FAMILY_RS600;
220 caps->has_tcl = FALSE;
221 break;
222
223 case 0x796C:
224 case 0x796D:
225 case 0x796E:
226 case 0x796F:
227 caps->family = CHIP_FAMILY_RS740;
228 caps->has_tcl = FALSE;
229 break;
230
231 case 0x7100:
232 case 0x7101:
233 case 0x7102:
234 case 0x7103:
235 case 0x7104:
236 case 0x7105:
237 case 0x7106:
238 case 0x7108:
239 case 0x7109:
240 case 0x710A:
241 case 0x710B:
242 case 0x710C:
243 case 0x710E:
244 case 0x710F:
245 caps->family = CHIP_FAMILY_R520;
246 caps->num_vert_fpus = 8;
247 caps->is_r500 = TRUE;
248 break;
249
250 case 0x7140:
251 case 0x7141:
252 case 0x7142:
253 case 0x7143:
254 case 0x7144:
255 case 0x7145:
256 case 0x7146:
257 case 0x7147:
258 case 0x7149:
259 case 0x714A:
260 case 0x714B:
261 case 0x714C:
262 case 0x714D:
263 case 0x714E:
264 case 0x714F:
265 case 0x7151:
266 case 0x7152:
267 case 0x7153:
268 case 0x715E:
269 case 0x715F:
270 case 0x7180:
271 case 0x7181:
272 case 0x7183:
273 case 0x7186:
274 case 0x7187:
275 case 0x7188:
276 case 0x718A:
277 case 0x718B:
278 case 0x718C:
279 case 0x718D:
280 case 0x718F:
281 case 0x7193:
282 case 0x7196:
283 case 0x719B:
284 case 0x719F:
285 case 0x7200:
286 case 0x7210:
287 case 0x7211:
288 caps->family = CHIP_FAMILY_RV515;
289 caps->num_vert_fpus = 2;
290 caps->is_r500 = TRUE;
291 break;
292
293 case 0x71C0:
294 case 0x71C1:
295 case 0x71C2:
296 case 0x71C3:
297 case 0x71C4:
298 case 0x71C5:
299 case 0x71C6:
300 case 0x71C7:
301 case 0x71CD:
302 case 0x71CE:
303 case 0x71D2:
304 case 0x71D4:
305 case 0x71D5:
306 case 0x71D6:
307 case 0x71DA:
308 case 0x71DE:
309 caps->family = CHIP_FAMILY_RV530;
310 caps->num_vert_fpus = 5;
311 caps->is_r500 = TRUE;
312 break;
313
314 case 0x7240:
315 case 0x7243:
316 case 0x7244:
317 case 0x7245:
318 case 0x7246:
319 case 0x7247:
320 case 0x7248:
321 case 0x7249:
322 case 0x724A:
323 case 0x724B:
324 case 0x724C:
325 case 0x724D:
326 case 0x724E:
327 case 0x724F:
328 case 0x7284:
329 caps->family = CHIP_FAMILY_R580;
330 caps->num_vert_fpus = 8;
331 caps->is_r500 = TRUE;
332 break;
333
334 case 0x7280:
335 caps->family = CHIP_FAMILY_RV570;
336 caps->num_vert_fpus = 5;
337 caps->is_r500 = TRUE;
338 break;
339
340 case 0x7281:
341 case 0x7283:
342 case 0x7287:
343 case 0x7288:
344 case 0x7289:
345 case 0x728B:
346 case 0x728C:
347 case 0x7290:
348 case 0x7291:
349 case 0x7293:
350 case 0x7297:
351 caps->family = CHIP_FAMILY_RV560;
352 caps->num_vert_fpus = 5;
353 caps->is_r500 = TRUE;
354 break;
355
356 default:
357 debug_printf("r300: Warning: Unknown chipset 0x%x\n",
358 caps->pci_id);
359 break;
360 }
361 }